Compare commits
6 Commits
2023-03-22
...
kudu6
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1
.github/ISSUE_TEMPLATE/bug_report.md
vendored
1
.github/ISSUE_TEMPLATE/bug_report.md
vendored
@@ -10,7 +10,6 @@ assignees: []
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|||||||
- BIOS version: <!-- `cat /sys/class/dmi/id/bios_version` (e.g.: 2021-09-30_14b8a6e)-->
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- BIOS version: <!-- `cat /sys/class/dmi/id/bios_version` (e.g.: 2021-09-30_14b8a6e)-->
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||||||
- EC version: <!-- This will match the BIOS version unless you flashed it separately. -->
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- EC version: <!-- This will match the BIOS version unless you flashed it separately. -->
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||||||
- OS: <!-- e.g.: Pop!_OS 21.10, Fedora 35, Windows 11 -->
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- OS: <!-- e.g.: Pop!_OS 21.10, Fedora 35, Windows 11 -->
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||||||
- Kernel: <!-- `uname -r` (e.g.: 6.0.6-76060006-generic) -->
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||||||
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||||||
<!-- Briefly describe the problem. -->
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<!-- Briefly describe the problem. -->
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||||||
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||||||
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4
.gitmodules
vendored
4
.gitmodules
vendored
@@ -78,3 +78,7 @@
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|||||||
path = tools/apobtool
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path = tools/apobtool
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||||||
url = https://github.com/system76/apobtool.git
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url = https://github.com/system76/apobtool.git
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||||||
branch = master
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branch = master
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||||||
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[submodule "tools/PSPTool"]
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||||||
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path = tools/PSPTool
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||||||
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url = https://github.com/PSPReverse/PSPTool.git
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||||||
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branch = master
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||||||
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203
CHANGELOG.md
203
CHANGELOG.md
@@ -4,92 +4,29 @@ Changes are identified by the date of the released firmware including them. If
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|||||||
you are running System76 Open Firmware, opening the boot menu will show this
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you are running System76 Open Firmware, opening the boot menu will show this
|
||||||
date followed by an underscore and a short git revision.
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date followed by an underscore and a short git revision.
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||||||
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|
||||||
## unreleased
|
|
||||||
|
|
||||||
- Enabled support for Secure Boot
|
|
||||||
- Enabled minimal UI for enforcing Secure Boot and resetting keys
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|
||||||
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|
||||||
## 2022-11-21
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|
||||||
|
|
||||||
- lemp11: Added workaround to force S0ix entry on suspend
|
|
||||||
- tgl-u: Removed CPU PCIe RP RTD3 config to fix suspend with certain drives
|
|
||||||
- adl-p: Removed CPU PCIe RP RTD3 config to fix suspend with certain drives
|
|
||||||
- adl-p: Fixed ACPI brightness controls on Windows 10 and Linux 6.1
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|
||||||
- adl-p: Disabled SATA DevSlp to fix S0ix entry
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||||||
- tgl-u: Disabled SATA DevSlp to fix S0ix entry
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|
||||||
- Updated Rust toolchain to nightly-2022-03-18
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||||||
- adl-p: Added workaround to force S0ix entry on suspend
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|
||||||
- adl-p: Fixed case where system gets stuck in S5 due to power loss
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|
||||||
- tgl-u: Fixed case where system gets stuck in S5 due to power loss
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|
||||||
- galp5: Fixed power off failing due to WLAN GPIO
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|
||||||
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|
||||||
## 2022-10-14
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|
||||||
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|
||||||
- Fixed smart charger values for all boards
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||||||
- Fixed keyboard backlight color with custom values
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|
||||||
- lemp11: Removed RTD3 config for card reader to fix suspend
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||||||
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|
||||||
## 2022-09-26
|
|
||||||
|
|
||||||
- oryp8: Fixed brightness controls on Windows
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|
||||||
- oryp10: Added initial release of open firmware with System76 EC
|
|
||||||
|
|
||||||
## 2022-09-07
|
|
||||||
|
|
||||||
- Updated CSME for TGL-H to 15.0.41.2158
|
|
||||||
- Updated CSME for TGL-U to 15.0.41.2158
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|
||||||
- Changed build to use coreboot toolchain for edk2
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|
||||||
- Fixed signal used to detect S0ix
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||||||
- Fixed off-by-one for battery charging start/stop thresholds
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||||||
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||||||
## 2022-08-03
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|
||||||
|
|
||||||
- Updated coreboot to upstream commit 37bf8c6dd590
|
|
||||||
- Updated TGL-U microcode to revision 0xa4 from Intel's public repo
|
|
||||||
- Updated TGL-H microcode to revision 0x3e from Intel's public repo
|
|
||||||
- Updated ADL microcode to revision 0x41c from Intel's public repo
|
|
||||||
- Updated ADL FSP to C.0.69.74 from Intel's public repo
|
|
||||||
- Updated CSME for ADL-P to 16.0.15.1810v8 (16.0.15.1829)
|
|
||||||
- Fixed uncommon I2C HID initialization failure on boot
|
|
||||||
- Fixed smart charger values for all boards
|
|
||||||
- galp6: Added initial release of open firmware with System76 EC
|
|
||||||
|
|
||||||
## 2022-07-27
|
|
||||||
|
|
||||||
- gaze17-3050: Added initial release of open firmware with System76 EC
|
|
||||||
- gaze17-3060: Fixed suspend with WD drives
|
|
||||||
|
|
||||||
## 2022-07-20
|
|
||||||
|
|
||||||
- oryp9: Added initial release of open firmware with System76 EC
|
|
||||||
|
|
||||||
## 2022-07-13
|
|
||||||
|
|
||||||
- darp8: Fixed power off under load while on battery power
|
|
||||||
|
|
||||||
## 2022-07-05
|
## 2022-07-05
|
||||||
|
|
||||||
- lemp11: Added initial release of open firmare with System76 EC
|
- lemp11: Fix power off under load while on battery power
|
||||||
|
|
||||||
|
## 2022-06-29
|
||||||
|
|
||||||
|
- lemp11: Release of open firmare with System76 EC
|
||||||
|
|
||||||
## 2022-06-23
|
## 2022-06-23
|
||||||
|
|
||||||
- darp8: Added initial release of open firmware with System76 EC
|
- darp8: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2022-06-07
|
## 2022-06-07
|
||||||
|
|
||||||
- Fixed building for QEMU
|
- Fixed building for QEMU
|
||||||
- Updated coreboot to upstream commit 670572ff6a
|
- Updated coreboot to upstream commit 670572ff6a
|
||||||
- Fixed NVIDIA subsystem ID being lost on suspend
|
|
||||||
- TGL: Fixed Device Manager warning about missing drivers for Tiger Lake IPC
|
|
||||||
Controller and System76 EC ACPI devices
|
|
||||||
- Improved NVIDIA Optimus support
|
- Improved NVIDIA Optimus support
|
||||||
- tgl-u: Fixed suspend with certain drives
|
- gaze17-3060-b: Release of open firmware with System76 EC
|
||||||
- gaze17-3060-b: Added initial release of open firmware with System76 EC
|
|
||||||
|
|
||||||
## 2022-02-15
|
## 2022-02-15
|
||||||
|
|
||||||
- Updated ME for all supported systems
|
- Update ME for all supported systems
|
||||||
- Ensured that system powers off S5 plane if it fails to reach S0
|
- Ensure that system powers off S5 plane if it fails to reach S0
|
||||||
|
|
||||||
## 2022-01-06
|
## 2022-01-06
|
||||||
|
|
||||||
@@ -97,7 +34,7 @@ date followed by an underscore and a short git revision.
|
|||||||
- Enabled coreboot measured boot
|
- Enabled coreboot measured boot
|
||||||
- Updated Rust toolchain to nightly-2021-06-15
|
- Updated Rust toolchain to nightly-2021-06-15
|
||||||
- Updated coreboot to 4.15
|
- Updated coreboot to 4.15
|
||||||
- Updated EDK2 to edk2-stable202108
|
- Updated EDK2 to edk2-stabke202108
|
||||||
- Updated TGL-U microcode blobs to revision 0x9a
|
- Updated TGL-U microcode blobs to revision 0x9a
|
||||||
- Updated TGL-H microcode blobs to revision 0x3c
|
- Updated TGL-H microcode blobs to revision 0x3c
|
||||||
- Updated all other boards to use microcode blobs from Intel's public repo
|
- Updated all other boards to use microcode blobs from Intel's public repo
|
||||||
@@ -106,23 +43,23 @@ date followed by an underscore and a short git revision.
|
|||||||
|
|
||||||
## 2021-09-30
|
## 2021-09-30
|
||||||
|
|
||||||
- gaze16: Removed need to unplug the AC adapter after flashing
|
- gaze16: Do not require unplugging the AC adapter after flashing
|
||||||
- gaze16: Fixed using USB 2.0 devices in Type-C port
|
- gaze16: Fix using USB 2.0 devices in Type-C port
|
||||||
|
|
||||||
## 2021-09-23
|
## 2021-09-23
|
||||||
|
|
||||||
- oryp8: Added initial release of open firmware with System76 EC
|
- oryp8: Release of open firmware with System76 EC
|
||||||
- gaze16: Fixed input current on 3050 variant
|
- gaze16: Fix input current on 3050 variant
|
||||||
- gaze16: Fixed power limit when booting on battery
|
- gaze16: Fix power limit when booting on battery
|
||||||
- gaze16: Fixed touchpad on newer Linux kernel and Windows
|
- gaze16: Fix touchpad on newer Linux kernel and Windows
|
||||||
- Fixed brightness controls on TGL platforms
|
- Fix brightness controls on TGL platforms
|
||||||
- Fixed PCIe subsystem IDs on TGL platforms
|
- Fix PCIe subsystem IDs on TGL platforms
|
||||||
- Fixed spurious clearing of boot options on Windows
|
- Fix spurious clearing of boot options on Windows
|
||||||
- Added battery cycle count
|
- Provide battery cycle count
|
||||||
|
|
||||||
## 2021-07-20
|
## 2021-07-20
|
||||||
|
|
||||||
- gaze16: Added initial release of open firmware with System76 EC
|
- gaze16: Release of open firmware with System76 EC
|
||||||
- Improved thermals by syncing CPU and GPU fans
|
- Improved thermals by syncing CPU and GPU fans
|
||||||
- Enabled fan speed interpolation
|
- Enabled fan speed interpolation
|
||||||
- Fixed ACPI timeout on S3 resume if a key is held
|
- Fixed ACPI timeout on S3 resume if a key is held
|
||||||
@@ -132,148 +69,142 @@ date followed by an underscore and a short git revision.
|
|||||||
|
|
||||||
## 2021-04-07
|
## 2021-04-07
|
||||||
|
|
||||||
- tgl-u: Updated microcode
|
- darp7, galp5, lemp10: Update microcode
|
||||||
|
|
||||||
## 2021-04-02
|
## 2021-04-02
|
||||||
|
|
||||||
- Fixed fan max keeping fan on when in S0iX
|
- Fix fan max keeping fan on when in S0iX
|
||||||
- Changed keyboard behavior to report all keys as released when lid is closed
|
- Report all keys as released when lid is closed
|
||||||
|
|
||||||
## 2021-03-19
|
## 2021-03-19
|
||||||
|
|
||||||
- gaze15: Added initial release of open firmware with System76 EC
|
- gaze15: Release of open firmware with System76 EC
|
||||||
- gaze15: Added ELAN touchpad settings
|
- gaze15: Add ELAN touchpad settings
|
||||||
|
|
||||||
## 2021-03-16
|
## 2021-03-16
|
||||||
|
|
||||||
- oryp6: Fixed buzzing at lowest fan speed
|
- oryp6, oryp7: Fix buzzing at lowest fan speed
|
||||||
- oryp7: Fixed buzzing at lowest fan speed
|
|
||||||
|
|
||||||
## 2021-03-11
|
## 2021-03-11
|
||||||
|
|
||||||
- lemp9: Fixed backlight ACPI issues and TPM interrupt
|
- lemp9: Fix backlight ACPI issues and TPM interrupt
|
||||||
|
|
||||||
## 2021-03-08
|
## 2021-03-08
|
||||||
|
|
||||||
- oryp6: Improved fan curve
|
- oryp6, oryp7: Improved fan curve
|
||||||
- oryp7: Improved fan curve
|
|
||||||
|
|
||||||
## 2021-03-03
|
## 2021-03-03
|
||||||
|
|
||||||
- oryp7: Added initial release of open firmware with System76 EC
|
- oryp7: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2021-02-15
|
## 2021-02-15
|
||||||
|
|
||||||
- darp7: Increased HDMI data rate to support 4K@60Hz
|
- darp7, galp5: Raise HDMI data rate to support 4K@60Hz
|
||||||
- galp5: Increased HDMI data rate to support 4K@60Hz
|
|
||||||
|
|
||||||
## 2021-02-09
|
## 2021-02-09
|
||||||
|
|
||||||
- galp5: Fixed GPU driver crash in compute graphics mode
|
- galp5: Fix GPU driver crash in compute graphics mode
|
||||||
|
|
||||||
## 2021-02-05
|
## 2021-02-05
|
||||||
|
|
||||||
- darp7: Fixed keyboard scanning glitches
|
- darp7: Fix keyboard scanning glitches
|
||||||
|
|
||||||
## 2021-01-21
|
## 2021-01-21
|
||||||
|
|
||||||
- darp7: Added initial release of open firmware with System76 EC
|
- darp7: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2021-01-19
|
## 2021-01-19
|
||||||
|
|
||||||
- Added behavior to update boot options on device hotplug
|
- Update boot options on device hotplug
|
||||||
- Added fan toggle key (Fn+1)
|
- Add fan toggle key (Fn+1)
|
||||||
- Added behavior to clear NVRAM when CMOS battery is removed
|
- Clear NVRAM when CMOS battery is removed
|
||||||
- galp5: Fixed NVRAM compacting
|
- galp5, lemp10: Fix NVRAM compacting
|
||||||
- lemp10: Fixed NVRAM compacting
|
|
||||||
|
|
||||||
## 2021-12-15
|
## 2021-12-15
|
||||||
|
|
||||||
- galp5: Added support for variant with NVIDIA GPU
|
- galp5: Support variant with NVIDIA GPU
|
||||||
|
|
||||||
## 2020-12-04
|
## 2020-12-04
|
||||||
|
|
||||||
- galp5: Added initial release of open firmware with System76 EC
|
- galp5, lemp10: Release of open firmware with System76 EC
|
||||||
- lemp10: Added initial release of open firmware with System76 EC
|
|
||||||
|
|
||||||
## 2020-10-19
|
## 2020-10-19
|
||||||
|
|
||||||
- Added support for customizing keyboard at runtime
|
- Support customizing keyboard at runtime
|
||||||
- Added battery charging thresholds
|
- Add battery charging thresholds
|
||||||
- oryp6: Fixed smart charger values
|
- oryp6: Fix smart charger values
|
||||||
- Prevented wake when lid is closed
|
- Prevent wake when lid is closed
|
||||||
|
|
||||||
## 2020-09-22
|
## 2020-09-22
|
||||||
|
|
||||||
- darp6: Added initial release of open firmware with System76 EC
|
- darp6: Release of open firmware with System76 EC
|
||||||
- darp6: Fixed allocation of memory type range registers
|
- darp6: Fix allocation of memory type range registers
|
||||||
|
|
||||||
## 2020-09-17
|
## 2020-09-17
|
||||||
|
|
||||||
- Enabled Wake-on-Lan (on supported models)
|
- Enable Wake-on-Lan (on supported models)
|
||||||
- Added ACPI thermal interface
|
- Add ACPI thermal interface
|
||||||
- Fixed ESXi keyboard issue
|
- Fix ESXi keyboard issue
|
||||||
|
|
||||||
## 2020-09-03
|
## 2020-09-03
|
||||||
|
|
||||||
- addw2: Added initial release of open firmware with System76 EC
|
- addw2: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2020-08-24
|
## 2020-08-24
|
||||||
|
|
||||||
- bonw14: Added initial release of open firmware with System76 EC
|
- bonw14: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2020-08-13
|
## 2020-08-13
|
||||||
|
|
||||||
- Added UEFI TPM2 support
|
- Add UEFI TPM2 support
|
||||||
|
|
||||||
## 2020-08-06
|
## 2020-08-06
|
||||||
|
|
||||||
- Enabled ACPI backlight
|
- Enable ACPI backlight
|
||||||
- Added firmware configuration information
|
- Add firmware configuration information
|
||||||
|
|
||||||
## 2020-07-06
|
## 2020-07-06
|
||||||
|
|
||||||
- oryp6: Added initial release of open firmware with System76 EC
|
- oryp6: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2020-05-20
|
## 2020-05-20
|
||||||
|
|
||||||
- Added warning if no bootable media is found
|
- Warn if no bootable media is found
|
||||||
|
|
||||||
## 2020-05-15
|
## 2020-05-15
|
||||||
|
|
||||||
- Enabled i2c-hid touchpad interface
|
- Enable i2c-hid touchpad interface
|
||||||
|
|
||||||
## 2020-05-07
|
## 2020-05-07
|
||||||
|
|
||||||
- Fixed ghost key debouncing
|
- Fix ghost key debouncing
|
||||||
|
|
||||||
## 2020-05-04
|
## 2020-05-04
|
||||||
|
|
||||||
- Improved ghost key handling and reduce key debounce
|
- Improve ghost key handling and reduce key debounce
|
||||||
|
|
||||||
## 2020-04-23
|
## 2020-04-23
|
||||||
|
|
||||||
- Fixed duplicate release of key after release of function key
|
- Fix duplicate release of key after release of function key
|
||||||
|
|
||||||
## 2020-04-18
|
## 2020-04-18
|
||||||
|
|
||||||
- lemp9: Updated fan curve
|
- lemp9: Update fan curve
|
||||||
|
|
||||||
## 2020-04-09
|
## 2020-04-09
|
||||||
|
|
||||||
- lemp9: Added initial release of open firmware with System76 EC
|
- lemp9: Release of open firmware with System76 EC
|
||||||
|
|
||||||
## 2020-02-05
|
## 2020-02-05
|
||||||
|
|
||||||
- Changed boot manager to use descriptive device names
|
- Use descriptive device names
|
||||||
- Changed boot manager to only show bootable devices
|
- Only show bootable devices
|
||||||
|
|
||||||
## 2020-01-13
|
## 2020-01-13
|
||||||
|
|
||||||
- Fixed NVIDIA eGPU issues
|
- Fix NVIDIA eGPU issues
|
||||||
- Improved boot order editing
|
- Iimprove boot order editing
|
||||||
|
|
||||||
## 2019-10-31
|
## 2019-10-31
|
||||||
|
|
||||||
- darp6: Added intial release of open firmware with proprietary EC
|
- darp6, galp4: Release of open firmware with proprietary EC
|
||||||
- galp4: Added intial release of open firmware with proprietary EC
|
|
||||||
|
2
FSP
2
FSP
Submodule FSP updated: 81dd5055f4...10eae55b8e
@@ -12,24 +12,17 @@ manager:
|
|||||||
- bonw14
|
- bonw14
|
||||||
- darp6
|
- darp6
|
||||||
- darp7
|
- darp7
|
||||||
- darp8
|
|
||||||
- galp4
|
- galp4
|
||||||
- galp5
|
- galp5
|
||||||
- galp6
|
|
||||||
- gaze15
|
- gaze15
|
||||||
- gaze16-3050
|
- gaze16-3050
|
||||||
- gaze16-3060
|
- gaze16-3060
|
||||||
- gaze16-3060-b
|
- gaze16-3060-b
|
||||||
- gaze17-3050
|
|
||||||
- gaze17-3060-b
|
|
||||||
- lemp9
|
- lemp9
|
||||||
- lemp10
|
- lemp10
|
||||||
- lemp11
|
|
||||||
- oryp6
|
- oryp6
|
||||||
- oryp7
|
- oryp7
|
||||||
- oryp8
|
- oryp8
|
||||||
- oryp9
|
|
||||||
- oryp10
|
|
||||||
|
|
||||||
Other models may be in development or available without support, and can be
|
Other models may be in development or available without support, and can be
|
||||||
seen in the `models/` directory.
|
seen in the `models/` directory.
|
||||||
|
Submodule apps/firmware-setup updated: 0907dbaa7f...d016fe3cf3
Submodule apps/firmware-update updated: 36668cb2f2...966de7a858
2
coreboot
2
coreboot
Submodule coreboot updated: baf80abc62...45fcc5bb6c
@@ -61,16 +61,12 @@ If the microcode blobs from coreboot will not be used, then `microcode.rom`
|
|||||||
must be generated for the correct CPU set from the private [intel-microcode]
|
must be generated for the correct CPU set from the private [intel-microcode]
|
||||||
repo.
|
repo.
|
||||||
|
|
||||||
Other things that should be dumped before porting/flashing are:
|
|
||||||
|
|
||||||
- The kernel log (`dmesg`)
|
|
||||||
- DMI info (`dmidecode`)
|
|
||||||
- ACPI tables (`acpidump -b`)
|
|
||||||
|
|
||||||
## Porting coreboot
|
## Porting coreboot
|
||||||
|
|
||||||
To port coreboot to a new board, see the coreboot documentation.
|
To port coreboot to a new board, see the coreboot documentation.
|
||||||
|
|
||||||
|
- [TAS5825M] smart amp
|
||||||
|
|
||||||
Once coreboot is ported, add its configuration.
|
Once coreboot is ported, add its configuration.
|
||||||
|
|
||||||
```
|
```
|
||||||
@@ -82,19 +78,6 @@ cp coreboot/.config models/<model>/coreboot.config
|
|||||||
`generate.sh` does not create `devicetree.cb`. Some values for this file can be
|
`generate.sh` does not create `devicetree.cb`. Some values for this file can be
|
||||||
produced using the `devicetree.py` script.
|
produced using the `devicetree.py` script.
|
||||||
|
|
||||||
### Smart amp
|
|
||||||
|
|
||||||
Boards may have a smart amp, which must be configured for speaker output to
|
|
||||||
work.
|
|
||||||
|
|
||||||
The initialization data for Realtek smart amps can be dumped from the module
|
|
||||||
that does the codec init in proprietary firmware. The correct module can be
|
|
||||||
found using UEFITool by searching for the vendor/device ID of the codec, such
|
|
||||||
as "10ec1220" for the ALC1220. This is the start of the `cim_verb_data` array
|
|
||||||
in coreboot.
|
|
||||||
|
|
||||||
For info on the TI TAS5825M smart amp, see the [smart-amp] repo.
|
|
||||||
|
|
||||||
## Configuring Intel CSME
|
## Configuring Intel CSME
|
||||||
|
|
||||||
The CSME image may need to be regenerated. Common changes that may be required
|
The CSME image may need to be regenerated. Common changes that may be required
|
||||||
@@ -117,4 +100,4 @@ READMEs.
|
|||||||
[external-programmer]: ./flashing.md#external-programmer
|
[external-programmer]: ./flashing.md#external-programmer
|
||||||
[intel-microcode]: https://github.com/system76/intel-microcode
|
[intel-microcode]: https://github.com/system76/intel-microcode
|
||||||
[mega2560]: https://github.com/system76/ec/blob/master/doc/mega2560.md
|
[mega2560]: https://github.com/system76/ec/blob/master/doc/mega2560.md
|
||||||
[smart-amp]: https://github.com/system76/smart-amp
|
[TAS5825M]: https://github.com/system76/smart-amp
|
||||||
|
@@ -31,8 +31,8 @@ Use one of these methods for first-time flashing or flashing a bricked system.
|
|||||||
### Identifying the BIOS chip
|
### Identifying the BIOS chip
|
||||||
|
|
||||||
The packaging and protocol can be determined by `board_info.txt` in coreboot.
|
The packaging and protocol can be determined by `board_info.txt` in coreboot.
|
||||||
Pin 1 is marked by a small dot indent and a white paint mark. The silkscreen
|
Laptops use a SOIC-8 package for the SPI flash ROM. Pin 1 is marked by a small
|
||||||
may also indicate pin 1.
|
dot indent and a white paint mark. The silkscreen may also indicate pin 1.
|
||||||
|
|
||||||
### CH341A USB programmer - slower, but easier to set up
|
### CH341A USB programmer - slower, but easier to set up
|
||||||
|
|
||||||
|
2
ec
2
ec
Submodule ec updated: 6731e9c889...3bc0f72cc6
2
edk2
2
edk2
Submodule edk2 updated: c466cc2ca5...a2abc5e15f
Submodule libs/intel-spi updated: ee6a9344c1...9519851e48
@@ -4,9 +4,7 @@
|
|||||||
|
|
||||||
- [addw1](./addw1) - System76 Adder Workstation (addw1)
|
- [addw1](./addw1) - System76 Adder Workstation (addw1)
|
||||||
- [addw2](./addw2) - System76 Adder WS (addw2)
|
- [addw2](./addw2) - System76 Adder WS (addw2)
|
||||||
- [addw3](./addw3) - System76 Adder WS (addw3)
|
|
||||||
- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
|
- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
|
||||||
- [bonw15](./bonw15) - System76 Bonobo WS (bonw15)
|
|
||||||
- [darp5](./darp5) - System76 Darter Pro (darp5)
|
- [darp5](./darp5) - System76 Darter Pro (darp5)
|
||||||
- [darp6](./darp6) - System76 Darter Pro (darp6)
|
- [darp6](./darp6) - System76 Darter Pro (darp6)
|
||||||
- [darp7](./darp7) - System76 Darter Pro (darp7)
|
- [darp7](./darp7) - System76 Darter Pro (darp7)
|
||||||
@@ -17,7 +15,6 @@
|
|||||||
- [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
|
- [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
|
||||||
- [galp4](./galp4) - System76 Galago Pro (galp4)
|
- [galp4](./galp4) - System76 Galago Pro (galp4)
|
||||||
- [galp5](./galp5) - System76 Galago Pro (galp5)
|
- [galp5](./galp5) - System76 Galago Pro (galp5)
|
||||||
- [galp6](./galp6) - System76 Galago Pro (galp6)
|
|
||||||
- [gaze14_1650](./gaze14_1650) - System76 Gazelle (gaze14)
|
- [gaze14_1650](./gaze14_1650) - System76 Gazelle (gaze14)
|
||||||
- [gaze14_1660ti](./gaze14_1660ti) - System76 Gazelle (gaze14)
|
- [gaze14_1660ti](./gaze14_1660ti) - System76 Gazelle (gaze14)
|
||||||
- [gaze15](./gaze15) - System76 Gazelle (gaze15)
|
- [gaze15](./gaze15) - System76 Gazelle (gaze15)
|
||||||
@@ -26,16 +23,13 @@
|
|||||||
- [gaze16-3060-b](./gaze16-3060-b) - System76 Gazelle (gaze16)
|
- [gaze16-3060-b](./gaze16-3060-b) - System76 Gazelle (gaze16)
|
||||||
- [gaze17-3050](./gaze17-3050) - System76 Gazelle (gaze17)
|
- [gaze17-3050](./gaze17-3050) - System76 Gazelle (gaze17)
|
||||||
- [gaze17-3060-b](./gaze17-3060-b) - System76 Gazelle (gaze17-3060-b)
|
- [gaze17-3060-b](./gaze17-3060-b) - System76 Gazelle (gaze17-3060-b)
|
||||||
- [gaze18](./gaze18) - System76 Gazelle (gaze18)
|
- [kudu6](./kudu6) - System76 Kudu (kudu6)
|
||||||
- [lemp10](./lemp10) - System76 Lemur Pro (lemp10)
|
- [lemp10](./lemp10) - System76 Lemur Pro (lemp10)
|
||||||
- [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
|
- [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
|
||||||
- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
|
- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
|
||||||
- [oryp10](./oryp10) - System76 Oryx Pro (oryp10)
|
|
||||||
- [oryp11](./oryp11) - System76 Oryx Pro (oryp11)
|
|
||||||
- [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
|
- [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
|
||||||
- [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
|
- [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
|
||||||
- [oryp7](./oryp7) - System76 Oryx Pro (oryp7)
|
- [oryp7](./oryp7) - System76 Oryx Pro (oryp7)
|
||||||
- [oryp8](./oryp8) - System76 Oryx Pro (oryp8)
|
- [oryp8](./oryp8) - System76 Oryx Pro (oryp8)
|
||||||
- [oryp9](./oryp9) - System76 Oryx Pro (oryp9)
|
|
||||||
- [qemu](./qemu) - QEMU (Virtualization)
|
- [qemu](./qemu) - QEMU (Virtualization)
|
||||||
- [serw13](./serw13) - System76 Serval WS (serw13)
|
- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
File diff suppressed because it is too large
Load Diff
BIN
models/addw3/AlderLakeFspBinPkg/Fsp.fd
(Stored with Git LFS)
BIN
models/addw3/AlderLakeFspBinPkg/Fsp.fd
(Stored with Git LFS)
Binary file not shown.
File diff suppressed because it is too large
Load Diff
Binary file not shown.
BIN
models/addw3/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/addw3/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -1 +0,0 @@
|
|||||||
# System76 Adder WS (addw3)
|
|
@@ -1 +0,0 @@
|
|||||||
GD25Q256D
|
|
@@ -1,333 +0,0 @@
|
|||||||
## PCI ##
|
|
||||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
|
|
||||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
|
|
||||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
|
|
||||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
|
|
||||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
|
|
||||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
|
|
||||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
|
|
||||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
|
|
||||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
|
|
||||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3C, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.3: Class 0x00040100, Vendor 0x8086, Device 0x7A50, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x0DC8, Revision 0x11
|
|
||||||
PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x2820, Revision 0xA1
|
|
||||||
PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BD, Revision 0xA1
|
|
||||||
PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
|
||||||
PCI Device: 0000:03:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
|
||||||
PCI Device: 0000:03:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
|
||||||
PCI Device: 0000:03:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
|
||||||
PCI Device: 0000:03:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
|
||||||
PCI Device: 0000:04:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1134, Revision 0x00
|
|
||||||
PCI Device: 0000:39:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1135, Revision 0x00
|
|
||||||
PCI Device: 0000:6c:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
|
||||||
PCI Device: 10000:e0:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
|
||||||
PCI Device: 10000:e0:1d.4: Class 0x00060400, Vendor 0x8086, Device 0x7A34, Revision 0x11
|
|
||||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
|
||||||
## GPIO ##
|
|
||||||
600 Series PCH
|
|
||||||
GPP_I0 (0x6E,0x00) 0x44000100 0x00000018 0x00000000 0x00000000
|
|
||||||
GPP_I1 (0x6E,0x02) 0x44000500 0x00000019 0x00000000 0x00000000
|
|
||||||
GPP_I2 (0x6E,0x04) 0x86800100 0x0000001a 0x00000000 0x00000000
|
|
||||||
GPP_I3 (0x6E,0x06) 0x44000500 0x0000001b 0x00000000 0x00000000
|
|
||||||
GPP_I4 (0x6E,0x08) 0x86800100 0x0000001c 0x00000000 0x00000000
|
|
||||||
GPP_I5 (0x6E,0x0A) 0x84000201 0x0000001d 0x00000000 0x00000000
|
|
||||||
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
|
||||||
GPP_I7 (0x6E,0x0E) 0x44000300 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_I9 (0x6E,0x12) 0x44000300 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_I10 (0x6E,0x14) 0x44000300 0x00000023 0x00000000 0x00000000
|
|
||||||
GPP_I11 (0x6E,0x16) 0x84000402 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_I12 (0x6E,0x18) 0x84000402 0x00000025 0x00000000 0x00000000
|
|
||||||
GPP_I13 (0x6E,0x1A) 0x84000402 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_I14 (0x6E,0x1C) 0x84000402 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_I15 (0x6E,0x1E) 0x44000300 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_I16 (0x6E,0x20) 0x44000300 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_I17 (0x6E,0x22) 0x44000300 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_I18 (0x6E,0x24) 0x44000200 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_I19 (0x6E,0x26) 0x44000300 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_I20 (0x6E,0x28) 0x44000300 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_I21 (0x6E,0x2A) 0x44000300 0x0000002e 0x00000000 0x00000000
|
|
||||||
GPP_I22 (0x6E,0x2C) 0x44000200 0x00000030 0x00000000 0x00000000
|
|
||||||
GPP_R0 (0x6E,0x32) 0x44000600 0x00000031 0x00000000 0x00000000
|
|
||||||
GPP_R1 (0x6E,0x34) 0x44000600 0x00003c32 0x00000000 0x00000000
|
|
||||||
GPP_R2 (0x6E,0x36) 0x44000600 0x00003c33 0x00000000 0x00000000
|
|
||||||
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
|
|
||||||
GPP_R4 (0x6E,0x3A) 0x44000600 0x00000035 0x00000000 0x00000000
|
|
||||||
GPP_R5 (0x6E,0x3C) 0x44000300 0x00000036 0x00000000 0x00000000
|
|
||||||
GPP_R6 (0x6E,0x3E) 0x44000300 0x00000037 0x00000000 0x00000000
|
|
||||||
GPP_R7 (0x6E,0x40) 0x44000300 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_R8 (0x6E,0x42) 0x84000102 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_R9 (0x6E,0x44) 0x44000502 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_R10 (0x6E,0x46) 0x44000300 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_R11 (0x6E,0x48) 0x44000300 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_R12 (0x6E,0x4A) 0x44000300 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_R13 (0x6E,0x4C) 0x44000300 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_R14 (0x6E,0x4E) 0x44000300 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPP_R15 (0x6E,0x50) 0x44000300 0x00000040 0x00000000 0x00000000
|
|
||||||
GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
|
|
||||||
GPP_R17 (0x6E,0x54) 0x44000300 0x00000042 0x00000000 0x00000000
|
|
||||||
GPP_R18 (0x6E,0x56) 0x44000300 0x00000043 0x00000000 0x00000000
|
|
||||||
GPP_R19 (0x6E,0x58) 0x44000300 0x00000044 0x00000000 0x00000000
|
|
||||||
GPP_R20 (0x6E,0x5A) 0x44000300 0x00000045 0x00000000 0x00000000
|
|
||||||
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
|
|
||||||
GPP_J0 (0x6E,0x60) 0x44000502 0x00000047 0x00000000 0x00000000
|
|
||||||
GPP_J1 (0x6E,0x62) 0x84000600 0x00000048 0x00000000 0x00000000
|
|
||||||
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
|
|
||||||
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
|
|
||||||
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
|
|
||||||
GPP_J5 (0x6E,0x6A) 0x44000502 0x0000304c 0x00000000 0x00000000
|
|
||||||
GPP_J6 (0x6E,0x6C) 0x44000502 0x0000004d 0x00000000 0x00000000
|
|
||||||
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
|
|
||||||
GPP_J8 (0x6E,0x70) 0x44000300 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_J9 (0x6E,0x72) 0x44000300 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_J10 (0x6E,0x74) 0x44000700 0x00001052 0x00000000 0x00000000
|
|
||||||
GPP_J11 (0x6E,0x76) 0x44000700 0x00001053 0x00000000 0x00000000
|
|
||||||
GPP_B0 (0x6D,0x00) 0x40100102 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_B1 (0x6D,0x02) 0x44000300 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
|
|
||||||
GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
|
|
||||||
GPP_B4 (0x6D,0x08) 0x44000300 0x00000054 0x00000000 0x00000000
|
|
||||||
GPP_B5 (0x6D,0x0A) 0x44000300 0x00000055 0x00000000 0x00000000
|
|
||||||
GPP_B6 (0x6D,0x0C) 0x44000300 0x00000056 0x00000000 0x00000000
|
|
||||||
GPP_B7 (0x6D,0x0E) 0x44000300 0x00000057 0x00000000 0x00000000
|
|
||||||
GPP_B8 (0x6D,0x10) 0x44000300 0x00000058 0x00000000 0x00000000
|
|
||||||
GPP_B9 (0x6D,0x12) 0x44000300 0x00000059 0x00000000 0x00000000
|
|
||||||
GPP_B10 (0x6D,0x14) 0x44000300 0x0000005a 0x00000000 0x00000000
|
|
||||||
GPP_B11 (0x6D,0x16) 0x44000300 0x0000005b 0x00000000 0x00000000
|
|
||||||
GPP_B12 (0x6D,0x18) 0x44000600 0x0000005c 0x00000000 0x00000000
|
|
||||||
GPP_B13 (0x6D,0x1A) 0x44000600 0x0000005d 0x00000000 0x00000000
|
|
||||||
GPP_B14 (0x6D,0x1C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
|
||||||
GPP_B15 (0x6D,0x1E) 0x44000102 0x0000005f 0x00000000 0x00000000
|
|
||||||
GPP_B16 (0x6D,0x20) 0x44000300 0x00000060 0x00000000 0x00000000
|
|
||||||
GPP_B17 (0x6D,0x22) 0x44000300 0x00000061 0x00000000 0x00000000
|
|
||||||
GPP_B18 (0x6D,0x24) 0x04000602 0x00000062 0x00000000 0x00000000
|
|
||||||
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
|
|
||||||
GPP_B20 (0x6D,0x28) 0x44000700 0x00001064 0x00000000 0x00000000
|
|
||||||
GPP_B21 (0x6D,0x2A) 0x42880102 0x00000065 0x00000000 0x00000000
|
|
||||||
GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
|
|
||||||
GPP_B23 (0x6D,0x2E) 0x44000200 0x00000067 0x00000800 0x00000000
|
|
||||||
GPP_G0 (0x6D,0x30) 0x44000100 0x00000068 0x00000000 0x00000000
|
|
||||||
GPP_G1 (0x6D,0x32) 0x44000102 0x00000069 0x00000000 0x00000000
|
|
||||||
GPP_G2 (0x6D,0x34) 0x44000700 0x0000106a 0x00000000 0x00000000
|
|
||||||
GPP_G3 (0x6D,0x36) 0x44000100 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPP_G4 (0x6D,0x38) 0x44000102 0x0000006c 0x00000000 0x00000000
|
|
||||||
GPP_G5 (0x6D,0x3A) 0x44000600 0x0000006d 0x00000000 0x00000000
|
|
||||||
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
|
|
||||||
GPP_G7 (0x6D,0x3E) 0x44000100 0x0000006f 0x00000000 0x00000000
|
|
||||||
GPP_H0 (0x6D,0x40) 0x44000300 0x00000070 0x00000000 0x00000000
|
|
||||||
GPP_H1 (0x6D,0x42) 0x44000102 0x00000071 0x00000000 0x00000000
|
|
||||||
GPP_H2 (0x6D,0x44) 0x44000702 0x00000072 0x00000000 0x00000000
|
|
||||||
GPP_H3 (0x6D,0x46) 0x44000300 0x00000073 0x00000000 0x00000000
|
|
||||||
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
|
|
||||||
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
|
|
||||||
GPP_H6 (0x6D,0x4C) 0x44000702 0x00000076 0x00000000 0x00000000
|
|
||||||
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
|
|
||||||
GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
|
|
||||||
GPP_H9 (0x6D,0x52) 0x44000700 0x00000019 0x00000000 0x00000000
|
|
||||||
GPP_H10 (0x6D,0x54) 0x84000402 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_H11 (0x6D,0x56) 0x84000402 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_H12 (0x6D,0x58) 0x44000200 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_H13 (0x6D,0x5A) 0x84000402 0x00000023 0x00000000 0x00000000
|
|
||||||
GPP_H14 (0x6D,0x5C) 0x84000402 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_H15 (0x6D,0x5E) 0x84000402 0x00000025 0x00000800 0x00000000
|
|
||||||
GPP_H16 (0x6D,0x60) 0x84000402 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_H17 (0x6D,0x62) 0x84000201 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_H18 (0x6D,0x64) 0x44000200 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_H19 (0x6D,0x66) 0x44000300 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_H20 (0x6D,0x68) 0x44000300 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_H21 (0x6D,0x6A) 0x44000200 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_H23 (0x6D,0x6E) 0x44000300 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPD0 (0x6C,0x00) 0x04000502 0x00003060 0x00000000 0x00000000
|
|
||||||
GPD1 (0x6C,0x02) 0x04000502 0x00003c61 0x00000000 0x00000000
|
|
||||||
GPD2 (0x6C,0x04) 0x04000702 0x00000062 0x00000000 0x00000000
|
|
||||||
GPD3 (0x6C,0x06) 0x04000502 0x00003063 0x00000010 0x00000000
|
|
||||||
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
|
||||||
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
|
||||||
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
|
|
||||||
GPD7 (0x6C,0x0E) 0x04000200 0x00000067 0x00000000 0x00000000
|
|
||||||
GPD8 (0x6C,0x10) 0x04000600 0x00000068 0x00000000 0x00000000
|
|
||||||
GPD9 (0x6C,0x12) 0x04000600 0x00000069 0x00000000 0x00000000
|
|
||||||
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
|
|
||||||
GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPD12 (0x6C,0x18) 0x04000300 0x0000006c 0x00000000 0x00000000
|
|
||||||
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
|
|
||||||
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
|
|
||||||
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
|
|
||||||
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
|
|
||||||
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
|
|
||||||
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
|
|
||||||
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_A7 (0x6B,0x20) 0x44000700 0x00003025 0x00000000 0x00000000
|
|
||||||
GPP_A8 (0x6B,0x22) 0x44000700 0x00003026 0x00000000 0x00000000
|
|
||||||
GPP_A9 (0x6B,0x24) 0x44000700 0x00003027 0x00000000 0x00000000
|
|
||||||
GPP_A10 (0x6B,0x26) 0x44000702 0x00003028 0x00000000 0x00000000
|
|
||||||
GPP_A11 (0x6B,0x28) 0x44000702 0x00003029 0x00000000 0x00000000
|
|
||||||
GPP_A12 (0x6B,0x2A) 0x44000702 0x0000302a 0x00000000 0x00000000
|
|
||||||
GPP_A13 (0x6B,0x2C) 0x44000702 0x0000302b 0x00000000 0x00000000
|
|
||||||
GPP_A14 (0x6B,0x2E) 0x44000300 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_C0 (0x6B,0x32) 0x44000402 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_C1 (0x6B,0x34) 0x44000402 0x0000002e 0x00000000 0x00000000
|
|
||||||
GPP_C2 (0x6B,0x36) 0x44000200 0x0000002f 0x00000800 0x00000000
|
|
||||||
GPP_C3 (0x6B,0x38) 0x44000c02 0x00000030 0x00000000 0x00000000
|
|
||||||
GPP_C4 (0x6B,0x3A) 0x44000c02 0x00000031 0x00000000 0x00000000
|
|
||||||
GPP_C5 (0x6B,0x3C) 0x44000200 0x00000032 0x00000000 0x00000000
|
|
||||||
GPP_C6 (0x6B,0x3E) 0x44000802 0x00000033 0x00000000 0x00000000
|
|
||||||
GPP_C7 (0x6B,0x40) 0x44000802 0x00000034 0x00000000 0x00000000
|
|
||||||
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
|
|
||||||
GPP_C9 (0x6B,0x44) 0x44000300 0x00000036 0x00000000 0x00000000
|
|
||||||
GPP_C10 (0x6B,0x46) 0x44000201 0x00000037 0x00000000 0x00000000
|
|
||||||
GPP_C11 (0x6B,0x48) 0x44000201 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_C12 (0x6B,0x4A) 0x44000300 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_C13 (0x6B,0x4C) 0x44000300 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_C14 (0x6B,0x4E) 0x44000300 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_C15 (0x6B,0x50) 0x44000300 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_C16 (0x6B,0x52) 0x44000402 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_C17 (0x6B,0x54) 0x44000402 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_C18 (0x6B,0x56) 0x44000402 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPP_C19 (0x6B,0x58) 0x44000402 0x00000040 0x00000000 0x00000000
|
|
||||||
GPP_C20 (0x6B,0x5A) 0x44000300 0x00000041 0x00000000 0x00000000
|
|
||||||
GPP_C21 (0x6B,0x5C) 0x44000300 0x00000042 0x00000000 0x00000000
|
|
||||||
GPP_C22 (0x6B,0x5E) 0x44000300 0x00000043 0x00000000 0x00000000
|
|
||||||
GPP_C23 (0x6B,0x60) 0x44000300 0x00000044 0x00000000 0x00000000
|
|
||||||
GPP_S0 (0x6A,0x00) 0x44000300 0x01800030 0x00000000 0x00000000
|
|
||||||
GPP_S1 (0x6A,0x02) 0x44000300 0x01800031 0x00000000 0x00000000
|
|
||||||
GPP_S2 (0x6A,0x04) 0x44000300 0x01800032 0x00000000 0x00000000
|
|
||||||
GPP_S3 (0x6A,0x06) 0x44000300 0x01800033 0x00000000 0x00000000
|
|
||||||
GPP_S4 (0x6A,0x08) 0x44000300 0x01800034 0x00000000 0x00000000
|
|
||||||
GPP_S5 (0x6A,0x0A) 0x44000300 0x01800035 0x00000000 0x00000000
|
|
||||||
GPP_S6 (0x6A,0x0C) 0x44000a00 0x01800036 0x00000000 0x00000000
|
|
||||||
GPP_S7 (0x6A,0x0E) 0x44000900 0x01800037 0x00000000 0x00000000
|
|
||||||
GPP_E0 (0x6A,0x10) 0x44000300 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_E1 (0x6A,0x12) 0x44000300 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_E2 (0x6A,0x14) 0x44000300 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_E3 (0x6A,0x16) 0x42840103 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_E4 (0x6A,0x18) 0x44000300 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_E5 (0x6A,0x1A) 0x44000300 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_E6 (0x6A,0x1C) 0x44000300 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPP_E8 (0x6A,0x20) 0x44000600 0x00000040 0x00000000 0x00000000
|
|
||||||
GPP_E9 (0x6A,0x22) 0x44000602 0x00000041 0x00000800 0x00000000
|
|
||||||
GPP_E10 (0x6A,0x24) 0x44000602 0x00000042 0x00000800 0x00000000
|
|
||||||
GPP_E11 (0x6A,0x26) 0x44000602 0x00000043 0x00000800 0x00000000
|
|
||||||
GPP_E12 (0x6A,0x28) 0x44000602 0x00000044 0x00000000 0x00000000
|
|
||||||
GPP_E13 (0x6A,0x2A) 0x44000300 0x00000045 0x00000000 0x00000000
|
|
||||||
GPP_E14 (0x6A,0x2C) 0x44000300 0x00000046 0x00000000 0x00000000
|
|
||||||
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
|
|
||||||
GPP_E16 (0x6A,0x30) 0x44000300 0x00000048 0x00000000 0x00000000
|
|
||||||
GPP_E17 (0x6A,0x32) 0x44000102 0x00001049 0x00000000 0x00000000
|
|
||||||
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
|
|
||||||
GPP_E19 (0x6A,0x36) 0x44000300 0x0000004b 0x00000000 0x00000000
|
|
||||||
GPP_E20 (0x6A,0x38) 0x44000300 0x0000004c 0x00000000 0x00000000
|
|
||||||
GPP_E21 (0x6A,0x3A) 0x44000300 0x0000004d 0x00000000 0x00000000
|
|
||||||
GPP_K0 (0x6A,0x3E) 0x42800102 0x0000004e 0x00000000 0x00000000
|
|
||||||
GPP_K1 (0x6A,0x40) 0x44000300 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_K2 (0x6A,0x42) 0x44000300 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_K3 (0x6A,0x44) 0x84000201 0x00000052 0x00000000 0x00000000
|
|
||||||
GPP_K4 (0x6A,0x46) 0x04000200 0x00000053 0x00000000 0x00000000
|
|
||||||
GPP_K5 (0x6A,0x48) 0x44000300 0x00000054 0x00000000 0x00000000
|
|
||||||
GPP_K6 (0x6A,0x4A) 0x44000b02 0x00003055 0x00000000 0x00000000
|
|
||||||
GPP_K7 (0x6A,0x4C) 0x44000b00 0x00001056 0x00000000 0x00000000
|
|
||||||
GPP_K8 (0x6A,0x4E) 0x44000600 0x00000057 0x00000000 0x00000000
|
|
||||||
GPP_K9 (0x6A,0x50) 0x44000600 0x00000058 0x00000000 0x00000000
|
|
||||||
GPP_K10 (0x6A,0x52) 0x44000b02 0x00003059 0x00000000 0x00000000
|
|
||||||
GPP_K11 (0x6A,0x54) 0x44000300 0x0000005a 0x00000000 0x00000000
|
|
||||||
GPP_F0 (0x6A,0x5C) 0x44000a02 0x0000005b 0x00000000 0x00000000
|
|
||||||
GPP_F1 (0x6A,0x5E) 0x44000300 0x0000005c 0x00000000 0x00000000
|
|
||||||
GPP_F2 (0x6A,0x60) 0x84000201 0x0000005d 0x00000000 0x00000000
|
|
||||||
GPP_F3 (0x6A,0x62) 0x84000201 0x0000005e 0x00000000 0x00000000
|
|
||||||
GPP_F4 (0x6A,0x64) 0x84000201 0x00000060 0x00000000 0x00000000
|
|
||||||
GPP_F5 (0x6A,0x66) 0x44000600 0x00000061 0x00000000 0x00000000
|
|
||||||
GPP_F6 (0x6A,0x68) 0x44000300 0x00000062 0x00000000 0x00000000
|
|
||||||
GPP_F7 (0x6A,0x6A) 0x84000102 0x00000063 0x00000000 0x00000000
|
|
||||||
GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
|
|
||||||
GPP_F9 (0x6A,0x6E) 0x44000201 0x00000065 0x00000000 0x00000000
|
|
||||||
GPP_F10 (0x6A,0x70) 0x44000300 0x00000066 0x00000000 0x00000000
|
|
||||||
GPP_F11 (0x6A,0x72) 0x44000300 0x00000067 0x00000000 0x00000000
|
|
||||||
GPP_F12 (0x6A,0x74) 0x44000300 0x00000068 0x00000000 0x00000000
|
|
||||||
GPP_F13 (0x6A,0x76) 0x44000300 0x00000069 0x00000000 0x00000000
|
|
||||||
GPP_F14 (0x6A,0x78) 0x44000700 0x0000006a 0x00000000 0x00000000
|
|
||||||
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPP_F16 (0x6A,0x7C) 0x44000300 0x0000006c 0x00000000 0x00000000
|
|
||||||
GPP_F17 (0x6A,0x7E) 0x44000102 0x0000006d 0x00000000 0x00000000
|
|
||||||
GPP_F18 (0x6A,0x80) 0x84000200 0x0000006e 0x00000000 0x00000000
|
|
||||||
GPP_F19 (0x6A,0x82) 0x44000600 0x0000006f 0x00000000 0x00000000
|
|
||||||
GPP_F20 (0x6A,0x84) 0x44000600 0x00000070 0x00000000 0x00000000
|
|
||||||
GPP_F21 (0x6A,0x86) 0x44000600 0x00000071 0x00000000 0x00000000
|
|
||||||
GPP_F22 (0x6A,0x88) 0x44000300 0x00000072 0x00000000 0x00000000
|
|
||||||
GPP_F23 (0x6A,0x8A) 0x44000300 0x00000073 0x00000000 0x00000000
|
|
||||||
GPP_D0 (0x69,0x20) 0x44000300 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_D1 (0x69,0x22) 0x44000300 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_D2 (0x69,0x24) 0x44000300 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_D3 (0x69,0x26) 0x44000300 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_D4 (0x69,0x28) 0x44000300 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_D5 (0x69,0x2A) 0x44000300 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_D6 (0x69,0x2C) 0x44000300 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_D7 (0x69,0x2E) 0x44000300 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D9 (0x69,0x32) 0x40000702 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D10 (0x69,0x34) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D13 (0x69,0x3A) 0x40000702 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D14 (0x69,0x3C) 0x40000702 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
|
|
||||||
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D22 (0x69,0x4C) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
## HDAUDIO ##
|
|
||||||
hdaudioC0D0
|
|
||||||
vendor_name: Realtek
|
|
||||||
chip_name: ALC256
|
|
||||||
vendor_id: 0x10ec0256
|
|
||||||
subsystem_id: 0x1558a671
|
|
||||||
revision_id: 0x100002
|
|
||||||
0x12: 0x90a60130
|
|
||||||
0x13: 0x40000000
|
|
||||||
0x14: 0x90170110
|
|
||||||
0x18: 0x411111f0
|
|
||||||
0x19: 0x411111f0
|
|
||||||
0x1a: 0x411111f0
|
|
||||||
0x1b: 0x02a11040
|
|
||||||
0x1d: 0x41700001
|
|
||||||
0x1e: 0x411111f0
|
|
||||||
0x21: 0x02211020
|
|
||||||
hdaudioC0D2
|
|
||||||
vendor_name: Intel
|
|
||||||
chip_name: Raptorlake HDMI
|
|
||||||
vendor_id: 0x80862818
|
|
||||||
subsystem_id: 0x80860101
|
|
||||||
revision_id: 0x100000
|
|
||||||
0x04: 0x18560010
|
|
||||||
0x06: 0x18560010
|
|
||||||
0x08: 0x18560010
|
|
||||||
0x0a: 0x18560010
|
|
||||||
0x0b: 0x18560010
|
|
||||||
0x0c: 0x18560010
|
|
||||||
0x0d: 0x18560010
|
|
||||||
0x0e: 0x18560010
|
|
||||||
0x0f: 0x18560010
|
|
||||||
hdaudioC1D0
|
|
||||||
vendor_name: Nvidia
|
|
||||||
chip_name: Generic HDMI
|
|
||||||
vendor_id: 0x10de00a6
|
|
||||||
subsystem_id: 0x10de0000
|
|
||||||
revision_id: 0x100100
|
|
||||||
0x04: 0x185600f0
|
|
||||||
0x05: 0x585600f0
|
|
||||||
0x06: 0x185600f0
|
|
||||||
0x07: 0x585600f0
|
|
@@ -1,28 +0,0 @@
|
|||||||
CONFIG_VENDOR_SYSTEM76=y
|
|
||||||
CONFIG_BOARD_SYSTEM76_ADDW3=y
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
|
||||||
CONFIG_HAVE_GBE_BIN=y
|
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
|
||||||
CONFIG_POST_IO=n
|
|
||||||
CONFIG_SMMSTORE=y
|
|
||||||
CONFIG_SMMSTORE_V2=y
|
|
||||||
CONFIG_USE_OPTION_TABLE=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
|
||||||
|
|
||||||
# Custom FSP
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Fsp.fd"
|
|
||||||
CONFIG_FSP_FULL_FD=y
|
|
||||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Include"
|
|
||||||
CONFIG_FSP_USE_REPO=n
|
|
@@ -1 +0,0 @@
|
|||||||
BOARD=system76/addw3
|
|
@@ -1,89 +0,0 @@
|
|||||||
id 5570 rev 6
|
|
||||||
A0: data 1 mirror 1 pot 0 control 00
|
|
||||||
A1: data 0 mirror 0 pot 0 control 00
|
|
||||||
A2: data 0 mirror 1 pot 0 control 00
|
|
||||||
A3: data 1 mirror 1 pot 0 control 80
|
|
||||||
A4: data 0 mirror 0 pot 0 control 00
|
|
||||||
A5: data 0 mirror 0 pot 0 control 00
|
|
||||||
A6: data 0 mirror 0 pot 0 control 00
|
|
||||||
A7: data 0 mirror 1 pot 0 control 00
|
|
||||||
B0: data 0 mirror 0 pot 0 control 84
|
|
||||||
B1: data 1 mirror 1 pot 0 control 84
|
|
||||||
B2: data 1 mirror 1 pot 0 control 80
|
|
||||||
B3: data 1 mirror 1 pot 0 control 80
|
|
||||||
B4: data 1 mirror 1 pot 0 control 40
|
|
||||||
B5: data 1 mirror 1 pot 0 control 40
|
|
||||||
B6: data 1 mirror 1 pot 0 control 44
|
|
||||||
B7: data 1 mirror 1 pot 0 control 80
|
|
||||||
C0: data 1 mirror 1 pot 0 control 80
|
|
||||||
C1: data 1 mirror 1 pot 0 control 04
|
|
||||||
C2: data 1 mirror 1 pot 0 control 04
|
|
||||||
C3: data 0 mirror 0 pot 0 control 04
|
|
||||||
C4: data 0 mirror 0 pot 0 control 84
|
|
||||||
C5: data 0 mirror 0 pot 0 control 04
|
|
||||||
C6: data 1 mirror 1 pot 0 control 40
|
|
||||||
C7: data 1 mirror 1 pot 0 control 44
|
|
||||||
D0: data 1 mirror 1 pot 0 control 44
|
|
||||||
D1: data 1 mirror 1 pot 0 control 44
|
|
||||||
D2: data 1 mirror 1 pot 0 control 00
|
|
||||||
D3: data 1 mirror 1 pot 0 control 44
|
|
||||||
D4: data 1 mirror 1 pot 0 control 40
|
|
||||||
D5: data 1 mirror 1 pot 0 control 44
|
|
||||||
D6: data 1 mirror 1 pot 0 control 02
|
|
||||||
D7: data 0 mirror 0 pot 0 control 02
|
|
||||||
E0: data 1 mirror 1 pot 0 control 04
|
|
||||||
E1: data 1 mirror 1 pot 0 control 44
|
|
||||||
E2: data 0 mirror 0 pot 0 control 84
|
|
||||||
E3: data 1 mirror 1 pot 0 control 40
|
|
||||||
E4: data 1 mirror 1 pot 0 control 42
|
|
||||||
E5: data 1 mirror 1 pot 0 control 40
|
|
||||||
E6: data 1 mirror 1 pot 0 control 80
|
|
||||||
E7: data 1 mirror 1 pot 0 control 04
|
|
||||||
F0: data 0 mirror 0 pot 0 control 44
|
|
||||||
F1: data 1 mirror 1 pot 0 control 44
|
|
||||||
F2: data 1 mirror 1 pot 0 control 44
|
|
||||||
F3: data 1 mirror 1 pot 0 control 40
|
|
||||||
F4: data 1 mirror 1 pot 0 control 04
|
|
||||||
F5: data 1 mirror 1 pot 0 control 04
|
|
||||||
F6: data 0 mirror 0 pot 0 control 00
|
|
||||||
F7: data 0 mirror 0 pot 0 control 80
|
|
||||||
G0: data 0 mirror 0 pot 0 control 80
|
|
||||||
G1: data 1 mirror 1 pot 0 control 80
|
|
||||||
G2: data 1 mirror 1 pot 0 control 80
|
|
||||||
G3: data 0 mirror 0 pot 0 control 00
|
|
||||||
G4: data 0 mirror 0 pot 0 control 00
|
|
||||||
G5: data 0 mirror 0 pot 0 control 00
|
|
||||||
G6: data 0 mirror 0 pot 0 control 44
|
|
||||||
G7: data 0 mirror 0 pot 0 control 00
|
|
||||||
H0: data 0 mirror 0 pot 0 control 80
|
|
||||||
H1: data 1 mirror 1 pot 0 control 80
|
|
||||||
H2: data 0 mirror 0 pot 0 control 44
|
|
||||||
H3: data 0 mirror 0 pot 0 control 40
|
|
||||||
H4: data 1 mirror 1 pot 0 control 80
|
|
||||||
H5: data 0 mirror 0 pot 0 control 44
|
|
||||||
H6: data 1 mirror 1 pot 0 control 80
|
|
||||||
H7: data 1 mirror 1 pot 0 control 80
|
|
||||||
I0: data 0 mirror 0 pot 0 control 00
|
|
||||||
I1: data 0 mirror 0 pot 0 control 00
|
|
||||||
I2: data 0 mirror 0 pot 0 control 00
|
|
||||||
I3: data 0 mirror 0 pot 0 control 00
|
|
||||||
I4: data 0 mirror 0 pot 0 control 00
|
|
||||||
I5: data 1 mirror 1 pot 0 control 80
|
|
||||||
I6: data 1 mirror 1 pot 0 control 80
|
|
||||||
I7: data 0 mirror 0 pot 0 control 00
|
|
||||||
J0: data 1 mirror 1 pot 0 control 44
|
|
||||||
J1: data 1 mirror 1 pot 0 control 40
|
|
||||||
J2: data 1 mirror 1 pot 0 control 80
|
|
||||||
J3: data 0 mirror 0 pot 0 control 80
|
|
||||||
J4: data 1 mirror 1 pot 0 control 40
|
|
||||||
J5: data 0 mirror 0 pot 0 control 40
|
|
||||||
J6: data 0 mirror 0 pot 0 control 44
|
|
||||||
J7: data 1 mirror 1 pot 0 control 80
|
|
||||||
M0: data 0 mirror 0 control 06
|
|
||||||
M1: data 1 mirror 0 control 06
|
|
||||||
M2: data 1 mirror 1 control 06
|
|
||||||
M3: data 1 mirror 1 control 06
|
|
||||||
M4: data 0 mirror 1 control 06
|
|
||||||
M5: data 0 mirror 0 control 00
|
|
||||||
M6: data 1 mirror 1 control 86
|
|
||||||
M7: data 0 mirror 0 control 00
|
|
BIN
models/addw3/fd.rom
(Stored with Git LFS)
BIN
models/addw3/fd.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/addw3/gbe.rom
(Stored with Git LFS)
BIN
models/addw3/gbe.rom
(Stored with Git LFS)
Binary file not shown.
@@ -1,272 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
|
|
||||||
#ifndef MAINBOARD_GPIO_H
|
|
||||||
#define MAINBOARD_GPIO_H
|
|
||||||
|
|
||||||
#include <soc/gpe.h>
|
|
||||||
#include <soc/gpio.h>
|
|
||||||
|
|
||||||
#ifndef __ACPI__
|
|
||||||
|
|
||||||
/* Pad configuration in ramstage. */
|
|
||||||
static const struct pad_config gpio_table[] = {
|
|
||||||
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD2, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPO(GPD7, 0, PWROK),
|
|
||||||
PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPD12, 0x04000300, 0x0000),
|
|
||||||
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A7, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A8, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A9, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A13, UP_20K, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_A14, NONE),
|
|
||||||
_PAD_CFG_STRUCT(GPP_B0, 0x40100100, 0x0000),
|
|
||||||
PAD_NC(GPP_B1, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B3, 1, DEEP),
|
|
||||||
PAD_NC(GPP_B4, NONE),
|
|
||||||
PAD_NC(GPP_B5, NONE),
|
|
||||||
PAD_NC(GPP_B6, NONE),
|
|
||||||
PAD_NC(GPP_B7, NONE),
|
|
||||||
PAD_NC(GPP_B8, NONE),
|
|
||||||
PAD_NC(GPP_B9, NONE),
|
|
||||||
PAD_NC(GPP_B10, NONE),
|
|
||||||
PAD_NC(GPP_B11, NONE),
|
|
||||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_B14, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
|
||||||
PAD_NC(GPP_B16, NONE),
|
|
||||||
PAD_NC(GPP_B17, NONE),
|
|
||||||
PAD_CFG_NF(GPP_B18, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_B19, 1, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_B20, DN_20K, DEEP, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPP_B21, 0x42880100, 0x0000),
|
|
||||||
PAD_CFG_GPO(GPP_B22, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B23, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_C2, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF3),
|
|
||||||
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF3),
|
|
||||||
PAD_CFG_GPO(GPP_C5, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
|
||||||
PAD_NC(GPP_C9, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_C10, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C11, 1, DEEP),
|
|
||||||
PAD_NC(GPP_C12, NONE),
|
|
||||||
PAD_NC(GPP_C13, NONE),
|
|
||||||
PAD_NC(GPP_C14, NONE),
|
|
||||||
PAD_NC(GPP_C15, NONE),
|
|
||||||
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_C20, NONE),
|
|
||||||
PAD_NC(GPP_C21, NONE),
|
|
||||||
PAD_NC(GPP_C22, NONE),
|
|
||||||
PAD_NC(GPP_C23, NONE),
|
|
||||||
PAD_NC(GPP_D0, NONE),
|
|
||||||
PAD_NC(GPP_D1, NONE),
|
|
||||||
PAD_NC(GPP_D2, NONE),
|
|
||||||
PAD_NC(GPP_D3, NONE),
|
|
||||||
PAD_NC(GPP_D4, NONE),
|
|
||||||
PAD_NC(GPP_D5, NONE),
|
|
||||||
PAD_NC(GPP_D6, NONE),
|
|
||||||
PAD_NC(GPP_D7, NONE),
|
|
||||||
PAD_NC(GPP_D8, NONE),
|
|
||||||
PAD_CFG_NF(GPP_D9, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D14, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D15, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D16, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D18, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D19, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_E0, NONE),
|
|
||||||
PAD_NC(GPP_E1, NONE),
|
|
||||||
PAD_NC(GPP_E2, NONE),
|
|
||||||
_PAD_CFG_STRUCT(GPP_E3, 0x42840101, 0x0000),
|
|
||||||
PAD_NC(GPP_E4, NONE),
|
|
||||||
PAD_NC(GPP_E5, NONE),
|
|
||||||
PAD_NC(GPP_E6, NONE),
|
|
||||||
_PAD_CFG_STRUCT(GPP_E7, 0x80100100, 0x0000),
|
|
||||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_E13, NONE),
|
|
||||||
PAD_NC(GPP_E14, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_E15, 0, DEEP),
|
|
||||||
PAD_NC(GPP_E16, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_E17, DN_20K, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E18, 1, DEEP),
|
|
||||||
PAD_NC(GPP_E19, NONE),
|
|
||||||
PAD_NC(GPP_E20, NONE),
|
|
||||||
PAD_NC(GPP_E21, NONE),
|
|
||||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF2),
|
|
||||||
PAD_NC(GPP_F1, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_F2, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_F3, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_F4, 1, PLTRST),
|
|
||||||
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_F6, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_F7, NONE, PLTRST),
|
|
||||||
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F9, 1, DEEP),
|
|
||||||
PAD_NC(GPP_F10, NONE),
|
|
||||||
PAD_NC(GPP_F11, NONE),
|
|
||||||
PAD_NC(GPP_F12, NONE),
|
|
||||||
PAD_NC(GPP_F13, NONE),
|
|
||||||
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
|
||||||
PAD_NC(GPP_F16, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F18, 0, PLTRST),
|
|
||||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_F22, NONE),
|
|
||||||
PAD_NC(GPP_F23, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_G2, DN_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
|
||||||
PAD_NC(GPP_H0, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_H1, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_H3, NONE),
|
|
||||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_H12, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H13, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H14, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H15, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H16, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_H17, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_H18, 0, DEEP),
|
|
||||||
PAD_NC(GPP_H19, NONE),
|
|
||||||
PAD_NC(GPP_H20, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_H21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H22, 0, DEEP),
|
|
||||||
PAD_NC(GPP_H23, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_I0, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_I1, NONE, DEEP, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPP_I2, 0x86800100, 0x0000),
|
|
||||||
PAD_CFG_NF(GPP_I3, NONE, DEEP, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPP_I4, 0x86800100, 0x0000),
|
|
||||||
PAD_CFG_GPO(GPP_I5, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_I6, 0, DEEP),
|
|
||||||
PAD_NC(GPP_I7, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_I8, 0, DEEP),
|
|
||||||
PAD_NC(GPP_I9, NONE),
|
|
||||||
PAD_NC(GPP_I10, NONE),
|
|
||||||
PAD_CFG_NF(GPP_I11, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_I12, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_I13, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_I14, NONE, PLTRST, NF1),
|
|
||||||
PAD_NC(GPP_I15, NONE),
|
|
||||||
PAD_NC(GPP_I16, NONE),
|
|
||||||
PAD_NC(GPP_I17, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_I18, 0, DEEP),
|
|
||||||
PAD_NC(GPP_I19, NONE),
|
|
||||||
PAD_NC(GPP_I20, NONE),
|
|
||||||
PAD_NC(GPP_I21, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_I22, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J1, NONE, PLTRST, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_J8, NONE),
|
|
||||||
PAD_NC(GPP_J9, NONE),
|
|
||||||
PAD_CFG_NF(GPP_J10, DN_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J11, DN_20K, DEEP, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPP_K0, 0x42800100, 0x0000),
|
|
||||||
PAD_NC(GPP_K1, NONE),
|
|
||||||
PAD_NC(GPP_K2, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_K3, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_K4, 0, PWROK),
|
|
||||||
PAD_NC(GPP_K5, NONE),
|
|
||||||
PAD_CFG_NF(GPP_K6, UP_20K, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_K7, DN_20K, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_K10, UP_20K, DEEP, NF2),
|
|
||||||
PAD_NC(GPP_K11, NONE),
|
|
||||||
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_R5, NONE),
|
|
||||||
PAD_NC(GPP_R6, NONE),
|
|
||||||
PAD_NC(GPP_R7, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_R8, NONE, PLTRST),
|
|
||||||
PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_R10, NONE),
|
|
||||||
PAD_NC(GPP_R11, NONE),
|
|
||||||
PAD_NC(GPP_R12, NONE),
|
|
||||||
PAD_NC(GPP_R13, NONE),
|
|
||||||
PAD_NC(GPP_R14, NONE),
|
|
||||||
PAD_NC(GPP_R15, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_R16, 1, DEEP),
|
|
||||||
PAD_NC(GPP_R17, NONE),
|
|
||||||
PAD_NC(GPP_R18, NONE),
|
|
||||||
PAD_NC(GPP_R19, NONE),
|
|
||||||
PAD_NC(GPP_R20, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_R21, 0, DEEP),
|
|
||||||
PAD_NC(GPP_S0, NONE),
|
|
||||||
PAD_NC(GPP_S1, NONE),
|
|
||||||
PAD_NC(GPP_S2, NONE),
|
|
||||||
PAD_NC(GPP_S3, NONE),
|
|
||||||
PAD_NC(GPP_S4, NONE),
|
|
||||||
PAD_NC(GPP_S5, NONE),
|
|
||||||
PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2),
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
|
@@ -1,48 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
|
|
||||||
#include <device/azalia_device.h>
|
|
||||||
|
|
||||||
const u32 cim_verb_data[] = {
|
|
||||||
/* Realtek, ALC256 */
|
|
||||||
0x10ec0256, /* Vendor ID */
|
|
||||||
0x1558a671, /* Subsystem ID */
|
|
||||||
11, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(0, 0x1558a671),
|
|
||||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
|
||||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
|
||||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
|
||||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1b, 0x02a11040),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1d, 0x41700001),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x21, 0x02211020),
|
|
||||||
/* Intel, RaptorlakeHDMI */
|
|
||||||
0x80862818, /* Vendor ID */
|
|
||||||
0x80860101, /* Subsystem ID */
|
|
||||||
10, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
|
||||||
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
|
|
||||||
/* Nvidia, GenericHDMI */
|
|
||||||
0x10de00a6, /* Vendor ID */
|
|
||||||
0x10de0000, /* Subsystem ID */
|
|
||||||
5, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(0, 0x10de0000),
|
|
||||||
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x05, 0x585600f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x07, 0x585600f0),
|
|
||||||
};
|
|
||||||
|
|
||||||
const u32 pc_beep_verbs[] = {};
|
|
||||||
|
|
||||||
AZALIA_ARRAY_SIZES;
|
|
BIN
models/addw3/me.rom
(Stored with Git LFS)
BIN
models/addw3/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/addw3/vbt.rom
(Stored with Git LFS)
BIN
models/addw3/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -1 +0,0 @@
|
|||||||
../addw3/AlderLakeFspBinPkg
|
|
BIN
models/bonw15/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/bonw15/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -1,9 +0,0 @@
|
|||||||
[Defines]
|
|
||||||
INF_VERSION = 0x00010005
|
|
||||||
BASE_NAME = IntelGopDriver
|
|
||||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
|
||||||
MODULE_TYPE = UEFI_DRIVER
|
|
||||||
VERSION_STRING = 1.0
|
|
||||||
|
|
||||||
[Binaries.X64]
|
|
||||||
PE32|IntelGopDriver.efi|*
|
|
@@ -1,12 +0,0 @@
|
|||||||
# System76 Bonobo WS (bonw15)
|
|
||||||
|
|
||||||
## Contents
|
|
||||||
|
|
||||||
- [EC](./ec.rom)
|
|
||||||
- *Read Error: No such file or directory (os error 2)*
|
|
||||||
- [FD](./fd.rom)
|
|
||||||
- Size: 4 KB
|
|
||||||
- HAP: false
|
|
||||||
- [ME](./me.rom)
|
|
||||||
- Size: 3944 KB
|
|
||||||
- Version: 16.1.25.2091
|
|
@@ -1 +0,0 @@
|
|||||||
# System76 Bonobo WS (bonw15)
|
|
@@ -1 +0,0 @@
|
|||||||
GD25Q256D
|
|
@@ -1,334 +0,0 @@
|
|||||||
## PCI ##
|
|
||||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
|
|
||||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:01.1: Class 0x00060400, Vendor 0x8086, Device 0xA72D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
|
|
||||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
|
|
||||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
|
|
||||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
|
|
||||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
|
|
||||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
|
|
||||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
|
|
||||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
|
|
||||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3E, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x7A30, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x7A50, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
|
|
||||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
|
|
||||||
PCI Device: 0000:02:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x27E0, Revision 0xA1
|
|
||||||
PCI Device: 0000:02:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BC, Revision 0xA1
|
|
||||||
PCI Device: 0000:03:00.0: Class 0x00020000, Vendor 0x8086, Device 0x3101, Revision 0x03
|
|
||||||
PCI Device: 0000:04:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
|
||||||
PCI Device: 0000:05:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
|
||||||
PCI Device: 0000:05:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
|
||||||
PCI Device: 0000:05:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
|
||||||
PCI Device: 0000:05:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
|
||||||
PCI Device: 0000:06:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1137, Revision 0x00
|
|
||||||
PCI Device: 0000:3a:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1138, Revision 0x00
|
|
||||||
PCI Device: 10000:e0:1b.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
|
||||||
PCI Device: 10000:e0:1b.4: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
|
|
||||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
|
||||||
## GPIO ##
|
|
||||||
600 Series PCH
|
|
||||||
GPP_I0 (0x6E,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
|
||||||
GPP_I1 (0x6E,0x02) 0x86880100 0x00000019 0x00000000 0x00000000
|
|
||||||
GPP_I2 (0x6E,0x04) 0x86880100 0x0000001a 0x00000000 0x00000000
|
|
||||||
GPP_I3 (0x6E,0x06) 0x86880100 0x0000001b 0x00000000 0x00000000
|
|
||||||
GPP_I4 (0x6E,0x08) 0x86880100 0x0000001c 0x00000000 0x00000000
|
|
||||||
GPP_I5 (0x6E,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
|
||||||
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
|
||||||
GPP_I7 (0x6E,0x0E) 0x44000200 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_I9 (0x6E,0x12) 0x44000200 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_I10 (0x6E,0x14) 0x44000200 0x00000023 0x00000000 0x00000000
|
|
||||||
GPP_I11 (0x6E,0x16) 0x44000300 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_I12 (0x6E,0x18) 0x44000300 0x00000025 0x00000000 0x00000000
|
|
||||||
GPP_I13 (0x6E,0x1A) 0x44000300 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_I14 (0x6E,0x1C) 0x44000300 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_I15 (0x6E,0x1E) 0x44000200 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_I16 (0x6E,0x20) 0x44000200 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_I17 (0x6E,0x22) 0x44000200 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_I18 (0x6E,0x24) 0x44000102 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_I19 (0x6E,0x26) 0x44000200 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_I20 (0x6E,0x28) 0x44000200 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_I21 (0x6E,0x2A) 0x44000200 0x0000002e 0x00000000 0x00000000
|
|
||||||
GPP_I22 (0x6E,0x2C) 0x44000102 0x00000030 0x00000000 0x00000000
|
|
||||||
GPP_R0 (0x6E,0x32) 0x44000500 0x00000031 0x00000000 0x00000000
|
|
||||||
GPP_R1 (0x6E,0x34) 0x44000500 0x00003c32 0x00000000 0x00000000
|
|
||||||
GPP_R2 (0x6E,0x36) 0x44000500 0x00003c33 0x00000000 0x00000000
|
|
||||||
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
|
|
||||||
GPP_R4 (0x6E,0x3A) 0x44000500 0x00000035 0x00000000 0x00000000
|
|
||||||
GPP_R5 (0x6E,0x3C) 0x44000200 0x00000036 0x00000000 0x00000000
|
|
||||||
GPP_R6 (0x6E,0x3E) 0x44000200 0x00000037 0x00000000 0x00000000
|
|
||||||
GPP_R7 (0x6E,0x40) 0x44000200 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_R8 (0x6E,0x42) 0x44000102 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_R9 (0x6E,0x44) 0x44000702 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_R10 (0x6E,0x46) 0x44000200 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_R11 (0x6E,0x48) 0x44000200 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_R12 (0x6E,0x4A) 0x44000200 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_R13 (0x6E,0x4C) 0x44000200 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_R14 (0x6E,0x4E) 0x44000200 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPP_R15 (0x6E,0x50) 0x44000200 0x00000040 0x00000000 0x00000000
|
|
||||||
GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
|
|
||||||
GPP_R17 (0x6E,0x54) 0x44000200 0x00000042 0x00000000 0x00000000
|
|
||||||
GPP_R18 (0x6E,0x56) 0x44000200 0x00000043 0x00000000 0x00000000
|
|
||||||
GPP_R19 (0x6E,0x58) 0x44000200 0x00000044 0x00000000 0x00000000
|
|
||||||
GPP_R20 (0x6E,0x5A) 0x44000200 0x00000045 0x00000000 0x00000000
|
|
||||||
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
|
|
||||||
GPP_J0 (0x6E,0x60) 0x44000500 0x00000047 0x00000000 0x00000000
|
|
||||||
GPP_J1 (0x6E,0x62) 0x44000700 0x00000048 0x00000000 0x00000000
|
|
||||||
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
|
|
||||||
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
|
|
||||||
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
|
|
||||||
GPP_J5 (0x6E,0x6A) 0x44000500 0x0000304c 0x00000000 0x00000000
|
|
||||||
GPP_J6 (0x6E,0x6C) 0x44000500 0x0000004d 0x00000000 0x00000000
|
|
||||||
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
|
|
||||||
GPP_J8 (0x6E,0x70) 0x44000102 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_J9 (0x6E,0x72) 0x44000200 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_J10 (0x6E,0x74) 0x44000200 0x00000052 0x00000000 0x00000000
|
|
||||||
GPP_J11 (0x6E,0x76) 0x44000200 0x00000053 0x00000000 0x00000000
|
|
||||||
GPP_B0 (0x6D,0x00) 0x82900102 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_B1 (0x6D,0x02) 0x44000200 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
|
|
||||||
GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
|
|
||||||
GPP_B4 (0x6D,0x08) 0x44000200 0x00000054 0x00000000 0x00000000
|
|
||||||
GPP_B5 (0x6D,0x0A) 0x44000200 0x00000055 0x00000000 0x00000000
|
|
||||||
GPP_B6 (0x6D,0x0C) 0x44000200 0x00000056 0x00000000 0x00000000
|
|
||||||
GPP_B7 (0x6D,0x0E) 0x44000200 0x00000057 0x00000000 0x00000000
|
|
||||||
GPP_B8 (0x6D,0x10) 0x44000200 0x00000058 0x00000000 0x00000000
|
|
||||||
GPP_B9 (0x6D,0x12) 0x44000200 0x00000059 0x00000000 0x00000000
|
|
||||||
GPP_B10 (0x6D,0x14) 0x44000200 0x0000005a 0x00000000 0x00000000
|
|
||||||
GPP_B11 (0x6D,0x16) 0x44000200 0x0000005b 0x00000000 0x00000000
|
|
||||||
GPP_B12 (0x6D,0x18) 0x44000700 0x0000005c 0x00000000 0x00000000
|
|
||||||
GPP_B13 (0x6D,0x1A) 0x44000700 0x0000005d 0x00000000 0x00000000
|
|
||||||
GPP_B14 (0x6D,0x1C) 0x44000600 0x0000005e 0x00000000 0x00000000
|
|
||||||
GPP_B15 (0x6D,0x1E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
|
||||||
GPP_B16 (0x6D,0x20) 0x44000200 0x00000060 0x00000000 0x00000000
|
|
||||||
GPP_B17 (0x6D,0x22) 0x04000201 0x00000061 0x00000000 0x00000000
|
|
||||||
GPP_B18 (0x6D,0x24) 0x04000702 0x00000062 0x00000000 0x00000000
|
|
||||||
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
|
|
||||||
GPP_B20 (0x6D,0x28) 0x44000200 0x00000064 0x00000000 0x00000000
|
|
||||||
GPP_B21 (0x6D,0x2A) 0x44000200 0x00000065 0x00000000 0x00000000
|
|
||||||
GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
|
|
||||||
GPP_B23 (0x6D,0x2E) 0x44000102 0x00000067 0x00000800 0x00000000
|
|
||||||
GPP_G0 (0x6D,0x30) 0x04000200 0x00000068 0x00000000 0x00000000
|
|
||||||
GPP_G1 (0x6D,0x32) 0x44000100 0x00000069 0x00000000 0x00000000
|
|
||||||
GPP_G2 (0x6D,0x34) 0x44000100 0x0000106a 0x00000000 0x00000000
|
|
||||||
GPP_G3 (0x6D,0x36) 0x44000102 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPP_G4 (0x6D,0x38) 0x44000100 0x0000006c 0x00000000 0x00000000
|
|
||||||
GPP_G5 (0x6D,0x3A) 0x44000700 0x0000006d 0x00000000 0x00000000
|
|
||||||
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
|
|
||||||
GPP_G7 (0x6D,0x3E) 0x42800102 0x0000006f 0x00000000 0x00000000
|
|
||||||
GPP_H0 (0x6D,0x40) 0x44000102 0x00000070 0x00000000 0x00000000
|
|
||||||
GPP_H1 (0x6D,0x42) 0x44000200 0x00000071 0x00000000 0x00000000
|
|
||||||
GPP_H2 (0x6D,0x44) 0x44000100 0x00000072 0x00000000 0x00000000
|
|
||||||
GPP_H3 (0x6D,0x46) 0x44000702 0x00000073 0x00000000 0x00000000
|
|
||||||
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
|
|
||||||
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
|
|
||||||
GPP_H6 (0x6D,0x4C) 0x44000300 0x00000076 0x00000000 0x00000000
|
|
||||||
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
|
|
||||||
GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
|
|
||||||
GPP_H9 (0x6D,0x52) 0x44000702 0x00000019 0x00000000 0x00000000
|
|
||||||
GPP_H10 (0x6D,0x54) 0x44000502 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_H11 (0x6D,0x56) 0x44000502 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_H12 (0x6D,0x58) 0x44000102 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_H13 (0x6D,0x5A) 0x44000502 0x00000023 0x00000000 0x00000000
|
|
||||||
GPP_H14 (0x6D,0x5C) 0x44000500 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_H15 (0x6D,0x5E) 0x44000102 0x00000025 0x00000800 0x00000000
|
|
||||||
GPP_H16 (0x6D,0x60) 0x44000102 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_H17 (0x6D,0x62) 0x44000201 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_H18 (0x6D,0x64) 0x44000102 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_H19 (0x6D,0x66) 0x44000200 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_H20 (0x6D,0x68) 0x44000200 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_H21 (0x6D,0x6A) 0x44000201 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_H23 (0x6D,0x6E) 0x44000102 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
|
|
||||||
GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
|
|
||||||
GPD2 (0x6C,0x04) 0x42880102 0x00000062 0x00000000 0x00000000
|
|
||||||
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
|
|
||||||
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
|
||||||
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
|
||||||
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
|
|
||||||
GPD7 (0x6C,0x0E) 0x04000100 0x00000067 0x00000000 0x00000000
|
|
||||||
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
|
|
||||||
GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
|
|
||||||
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
|
|
||||||
GPD11 (0x6C,0x16) 0x44000200 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPD12 (0x6C,0x18) 0x44000200 0x0000006c 0x00000000 0x00000000
|
|
||||||
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
|
|
||||||
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
|
|
||||||
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
|
|
||||||
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
|
|
||||||
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
|
|
||||||
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
|
|
||||||
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_A7 (0x6B,0x20) 0x44000200 0x00000025 0x00000000 0x00000000
|
|
||||||
GPP_A8 (0x6B,0x22) 0x44000200 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_A9 (0x6B,0x24) 0x44000200 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_A10 (0x6B,0x26) 0x44000500 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_A11 (0x6B,0x28) 0x44000102 0x00003029 0x00000000 0x00000000
|
|
||||||
GPP_A12 (0x6B,0x2A) 0x44000200 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_A13 (0x6B,0x2C) 0x44000200 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_A14 (0x6B,0x2E) 0x44000200 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_C0 (0x6B,0x32) 0x44000502 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_C1 (0x6B,0x34) 0x44000502 0x0000002e 0x00000000 0x00000000
|
|
||||||
GPP_C2 (0x6B,0x36) 0x84000102 0x0000002f 0x00000800 0x00000000
|
|
||||||
GPP_C3 (0x6B,0x38) 0x44000200 0x00000030 0x00000000 0x00000000
|
|
||||||
GPP_C4 (0x6B,0x3A) 0x44000200 0x00000031 0x00000000 0x00000000
|
|
||||||
GPP_C5 (0x6B,0x3C) 0x44000502 0x00000032 0x00000000 0x00000000
|
|
||||||
GPP_C6 (0x6B,0x3E) 0x44000200 0x00000033 0x00000000 0x00000000
|
|
||||||
GPP_C7 (0x6B,0x40) 0x44000200 0x00000034 0x00000000 0x00000000
|
|
||||||
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
|
|
||||||
GPP_C9 (0x6B,0x44) 0x44000200 0x00000036 0x00000000 0x00000000
|
|
||||||
GPP_C10 (0x6B,0x46) 0x44000200 0x00000037 0x00000000 0x00000000
|
|
||||||
GPP_C11 (0x6B,0x48) 0x44000200 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_C12 (0x6B,0x4A) 0x44000200 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_C13 (0x6B,0x4C) 0x44000200 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_C14 (0x6B,0x4E) 0x44000200 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_C15 (0x6B,0x50) 0x44000200 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_C16 (0x6B,0x52) 0x44000502 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_C17 (0x6B,0x54) 0x44000502 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_C18 (0x6B,0x56) 0x44000502 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPP_C19 (0x6B,0x58) 0x44000502 0x00000040 0x00000000 0x00000000
|
|
||||||
GPP_C20 (0x6B,0x5A) 0x44000102 0x00000041 0x00000000 0x00000000
|
|
||||||
GPP_C21 (0x6B,0x5C) 0x44000102 0x00000042 0x00000000 0x00000000
|
|
||||||
GPP_C22 (0x6B,0x5E) 0x44000200 0x00000043 0x00000000 0x00000000
|
|
||||||
GPP_C23 (0x6B,0x60) 0x44000200 0x00000044 0x00000000 0x00000000
|
|
||||||
GPP_S0 (0x6A,0x00) 0x44000200 0x01800030 0x00000000 0x00000000
|
|
||||||
GPP_S1 (0x6A,0x02) 0x44000200 0x01800031 0x00000000 0x00000000
|
|
||||||
GPP_S2 (0x6A,0x04) 0x44000200 0x01800032 0x00000000 0x00000000
|
|
||||||
GPP_S3 (0x6A,0x06) 0x44000200 0x01800033 0x00000000 0x00000000
|
|
||||||
GPP_S4 (0x6A,0x08) 0x44000200 0x01800034 0x00000000 0x00000000
|
|
||||||
GPP_S5 (0x6A,0x0A) 0x44000200 0x01800035 0x00000000 0x00000000
|
|
||||||
GPP_S6 (0x6A,0x0C) 0x44000200 0x01800036 0x00000000 0x00000000
|
|
||||||
GPP_S7 (0x6A,0x0E) 0x44000200 0x01800037 0x00000000 0x00000000
|
|
||||||
GPP_E0 (0x6A,0x10) 0x44000200 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_E1 (0x6A,0x12) 0x44000200 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_E2 (0x6A,0x14) 0x44000200 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_E3 (0x6A,0x16) 0x44000200 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_E4 (0x6A,0x18) 0x44000200 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_E5 (0x6A,0x1A) 0x44000200 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_E6 (0x6A,0x1C) 0x44000200 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPP_E8 (0x6A,0x20) 0x44000500 0x00000040 0x00000000 0x00000000
|
|
||||||
GPP_E9 (0x6A,0x22) 0x44000300 0x00000041 0x00000800 0x00000000
|
|
||||||
GPP_E10 (0x6A,0x24) 0x44000300 0x00000042 0x00000800 0x00000000
|
|
||||||
GPP_E11 (0x6A,0x26) 0x44000300 0x00000043 0x00000800 0x00000000
|
|
||||||
GPP_E12 (0x6A,0x28) 0x44000300 0x00000044 0x00000000 0x00000000
|
|
||||||
GPP_E13 (0x6A,0x2A) 0x44000200 0x00000045 0x00000000 0x00000000
|
|
||||||
GPP_E14 (0x6A,0x2C) 0x44000200 0x00000046 0x00000000 0x00000000
|
|
||||||
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
|
|
||||||
GPP_E16 (0x6A,0x30) 0x44000200 0x00000048 0x00000000 0x00000000
|
|
||||||
GPP_E17 (0x6A,0x32) 0x44000200 0x00000049 0x00000000 0x00000000
|
|
||||||
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
|
|
||||||
GPP_E19 (0x6A,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
|
|
||||||
GPP_E20 (0x6A,0x38) 0x44000200 0x0000004c 0x00000000 0x00000000
|
|
||||||
GPP_E21 (0x6A,0x3A) 0x44000200 0x0000004d 0x00000000 0x00000000
|
|
||||||
GPP_K0 (0x6A,0x3E) 0x44000200 0x0000004e 0x00000000 0x00000000
|
|
||||||
GPP_K1 (0x6A,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_K2 (0x6A,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_K3 (0x6A,0x44) 0x44000200 0x00000052 0x00000000 0x00000000
|
|
||||||
GPP_K4 (0x6A,0x46) 0x44000200 0x00000053 0x00000000 0x00000000
|
|
||||||
GPP_K5 (0x6A,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
|
|
||||||
GPP_K6 (0x6A,0x4A) 0x44000a02 0x00000055 0x00000000 0x00000000
|
|
||||||
GPP_K7 (0x6A,0x4C) 0x44000a02 0x00000056 0x00000000 0x00000000
|
|
||||||
GPP_K8 (0x6A,0x4E) 0x44000700 0x00000057 0x00000000 0x00000000
|
|
||||||
GPP_K9 (0x6A,0x50) 0x44000700 0x00000058 0x00000000 0x00000000
|
|
||||||
GPP_K10 (0x6A,0x52) 0x44000a02 0x00000059 0x00000000 0x00000000
|
|
||||||
GPP_K11 (0x6A,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
|
|
||||||
GPP_F0 (0x6A,0x5C) 0x44000200 0x0000005b 0x00000000 0x00000000
|
|
||||||
GPP_F1 (0x6A,0x5E) 0x44000200 0x0000005c 0x00000000 0x00000000
|
|
||||||
GPP_F2 (0x6A,0x60) 0x44000200 0x0000005d 0x00000000 0x00000000
|
|
||||||
GPP_F3 (0x6A,0x62) 0x44000200 0x0000005e 0x00000000 0x00000000
|
|
||||||
GPP_F4 (0x6A,0x64) 0x44000200 0x00000060 0x00000000 0x00000000
|
|
||||||
GPP_F5 (0x6A,0x66) 0x84000200 0x00000061 0x00000000 0x00000000
|
|
||||||
GPP_F6 (0x6A,0x68) 0x44000200 0x00000062 0x00000000 0x00000000
|
|
||||||
GPP_F7 (0x6A,0x6A) 0x44000200 0x00000063 0x00000000 0x00000000
|
|
||||||
GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
|
|
||||||
GPP_F9 (0x6A,0x6E) 0x42880102 0x00000065 0x00000000 0x00000000
|
|
||||||
GPP_F10 (0x6A,0x70) 0x44000200 0x00000066 0x00000000 0x00000000
|
|
||||||
GPP_F11 (0x6A,0x72) 0x44000200 0x00000067 0x00000000 0x00000000
|
|
||||||
GPP_F12 (0x6A,0x74) 0x44000200 0x00000068 0x00000000 0x00000000
|
|
||||||
GPP_F13 (0x6A,0x76) 0x44000200 0x00000069 0x00000000 0x00000000
|
|
||||||
GPP_F14 (0x6A,0x78) 0x44000200 0x0000006a 0x00000000 0x00000000
|
|
||||||
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPP_F16 (0x6A,0x7C) 0x44000200 0x0000006c 0x00000000 0x00000000
|
|
||||||
GPP_F17 (0x6A,0x7E) 0x44000200 0x0000006d 0x00000000 0x00000000
|
|
||||||
GPP_F18 (0x6A,0x80) 0x44000200 0x0000006e 0x00000000 0x00000000
|
|
||||||
GPP_F19 (0x6A,0x82) 0x44000700 0x0000006f 0x00000000 0x00000000
|
|
||||||
GPP_F20 (0x6A,0x84) 0x44000700 0x00000070 0x00000000 0x00000000
|
|
||||||
GPP_F21 (0x6A,0x86) 0x44000700 0x00000071 0x00000000 0x00000000
|
|
||||||
GPP_F22 (0x6A,0x88) 0x44000201 0x00000072 0x00000000 0x00000000
|
|
||||||
GPP_F23 (0x6A,0x8A) 0x44000200 0x00000073 0x00000000 0x00000000
|
|
||||||
GPP_D0 (0x69,0x20) 0x44000200 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_D1 (0x69,0x22) 0x44000200 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_D2 (0x69,0x24) 0x44000200 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_D3 (0x69,0x26) 0x44000200 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_D4 (0x69,0x28) 0x44000200 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_D5 (0x69,0x2A) 0x44000200 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_D6 (0x69,0x2C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_D7 (0x69,0x2E) 0x44000200 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D9 (0x69,0x32) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D10 (0x69,0x34) 0x40000702 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D13 (0x69,0x3A) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D14 (0x69,0x3C) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
|
|
||||||
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
|
|
||||||
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D22 (0x69,0x4C) 0x40000702 0x00000000 0x00000000 0x00000000
|
|
||||||
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
|
|
||||||
## HDAUDIO ##
|
|
||||||
hdaudioC0D0
|
|
||||||
vendor_name: Realtek
|
|
||||||
chip_name: ALC1220
|
|
||||||
vendor_id: 0x10ec1220
|
|
||||||
subsystem_id: 0x15583702
|
|
||||||
revision_id: 0x100101
|
|
||||||
0x12: 0x90a60130
|
|
||||||
0x14: 0x0421101f
|
|
||||||
0x15: 0x40000000
|
|
||||||
0x16: 0x411111f0
|
|
||||||
0x17: 0x411111f0
|
|
||||||
0x18: 0x04a11040
|
|
||||||
0x19: 0x411111f0
|
|
||||||
0x1a: 0x411111f0
|
|
||||||
0x1b: 0x90170110
|
|
||||||
0x1d: 0x40b7952d
|
|
||||||
0x1e: 0x04451150
|
|
||||||
hdaudioC0D2
|
|
||||||
vendor_name: Intel
|
|
||||||
chip_name: Raptorlake HDMI
|
|
||||||
vendor_id: 0x80862818
|
|
||||||
subsystem_id: 0x80860101
|
|
||||||
revision_id: 0x100000
|
|
||||||
0x04: 0x18560010
|
|
||||||
0x06: 0x18560010
|
|
||||||
0x08: 0x18560010
|
|
||||||
0x0a: 0x18560010
|
|
||||||
0x0b: 0x18560010
|
|
||||||
0x0c: 0x18560010
|
|
||||||
0x0d: 0x18560010
|
|
||||||
0x0e: 0x18560010
|
|
||||||
0x0f: 0x18560010
|
|
||||||
hdaudioC1D0
|
|
||||||
vendor_name: Nvidia
|
|
||||||
chip_name: Generic HDMI
|
|
||||||
vendor_id: 0x10de00a5
|
|
||||||
subsystem_id: 0x10de0000
|
|
||||||
revision_id: 0x100100
|
|
||||||
0x04: 0x585600f0
|
|
||||||
0x05: 0x185600f0
|
|
||||||
0x06: 0x185600f0
|
|
||||||
0x07: 0x185600f0
|
|
@@ -1,28 +0,0 @@
|
|||||||
CONFIG_VENDOR_SYSTEM76=y
|
|
||||||
CONFIG_BOARD_SYSTEM76_BONW15=y
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
|
||||||
CONFIG_HAVE_GBE_BIN=y
|
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
|
||||||
CONFIG_POST_IO=n
|
|
||||||
CONFIG_SMMSTORE=y
|
|
||||||
CONFIG_SMMSTORE_V2=y
|
|
||||||
CONFIG_USE_OPTION_TABLE=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
|
||||||
|
|
||||||
# Custom FSP
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Fsp.fd"
|
|
||||||
CONFIG_FSP_FULL_FD=y
|
|
||||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Include"
|
|
||||||
CONFIG_FSP_USE_REPO=n
|
|
@@ -1 +0,0 @@
|
|||||||
BOARD=system76/bonw15
|
|
@@ -1,89 +0,0 @@
|
|||||||
id 5570 rev 6
|
|
||||||
A0: data 1 mirror 1 pot 0 control 80
|
|
||||||
A1: data 0 mirror 0 pot 0 control 00
|
|
||||||
A2: data 1 mirror 0 pot 0 control 00
|
|
||||||
A3: data 0 mirror 0 pot 0 control 00
|
|
||||||
A4: data 0 mirror 1 pot 0 control 00
|
|
||||||
A5: data 0 mirror 0 pot 0 control 00
|
|
||||||
A6: data 0 mirror 0 pot 0 control 00
|
|
||||||
A7: data 0 mirror 0 pot 0 control 00
|
|
||||||
B0: data 0 mirror 0 pot 0 control 84
|
|
||||||
B1: data 1 mirror 1 pot 0 control 84
|
|
||||||
B2: data 1 mirror 1 pot 0 control 84
|
|
||||||
B3: data 1 mirror 1 pot 0 control 80
|
|
||||||
B4: data 1 mirror 1 pot 0 control 40
|
|
||||||
B5: data 1 mirror 1 pot 0 control 40
|
|
||||||
B6: data 1 mirror 1 pot 0 control 44
|
|
||||||
B7: data 1 mirror 1 pot 0 control 80
|
|
||||||
C0: data 1 mirror 1 pot 0 control 80
|
|
||||||
C1: data 1 mirror 1 pot 0 control 04
|
|
||||||
C2: data 1 mirror 1 pot 0 control 04
|
|
||||||
C3: data 0 mirror 0 pot 0 control 04
|
|
||||||
C4: data 0 mirror 0 pot 0 control 84
|
|
||||||
C5: data 0 mirror 0 pot 0 control 04
|
|
||||||
C6: data 1 mirror 1 pot 0 control 40
|
|
||||||
C7: data 1 mirror 1 pot 0 control 44
|
|
||||||
D0: data 1 mirror 1 pot 0 control 40
|
|
||||||
D1: data 1 mirror 1 pot 0 control 44
|
|
||||||
D2: data 1 mirror 1 pot 0 control 00
|
|
||||||
D3: data 0 mirror 0 pot 0 control 40
|
|
||||||
D4: data 0 mirror 0 pot 0 control 40
|
|
||||||
D5: data 1 mirror 1 pot 0 control 44
|
|
||||||
D6: data 0 mirror 0 pot 0 control 02
|
|
||||||
D7: data 1 mirror 1 pot 0 control 02
|
|
||||||
E0: data 1 mirror 1 pot 0 control 04
|
|
||||||
E1: data 1 mirror 1 pot 0 control 44
|
|
||||||
E2: data 1 mirror 1 pot 0 control 84
|
|
||||||
E3: data 1 mirror 1 pot 0 control 40
|
|
||||||
E4: data 1 mirror 1 pot 0 control 42
|
|
||||||
E5: data 1 mirror 1 pot 0 control 40
|
|
||||||
E6: data 0 mirror 0 pot 0 control 80
|
|
||||||
E7: data 1 mirror 1 pot 0 control 04
|
|
||||||
F0: data 0 mirror 0 pot 0 control 44
|
|
||||||
F1: data 1 mirror 1 pot 0 control 44
|
|
||||||
F2: data 1 mirror 1 pot 0 control 44
|
|
||||||
F3: data 1 mirror 1 pot 0 control 40
|
|
||||||
F4: data 1 mirror 1 pot 0 control 04
|
|
||||||
F5: data 1 mirror 1 pot 0 control 04
|
|
||||||
F6: data 1 mirror 1 pot 0 control 40
|
|
||||||
F7: data 1 mirror 1 pot 0 control 80
|
|
||||||
G0: data 1 mirror 1 pot 0 control 80
|
|
||||||
G1: data 1 mirror 1 pot 0 control 40
|
|
||||||
G2: data 1 mirror 1 pot 0 control 80
|
|
||||||
G3: data 0 mirror 0 pot 0 control 00
|
|
||||||
G4: data 0 mirror 0 pot 0 control 00
|
|
||||||
G5: data 0 mirror 0 pot 0 control 00
|
|
||||||
G6: data 0 mirror 0 pot 0 control 44
|
|
||||||
G7: data 0 mirror 0 pot 0 control 00
|
|
||||||
H0: data 0 mirror 0 pot 0 control 80
|
|
||||||
H1: data 1 mirror 1 pot 0 control 80
|
|
||||||
H2: data 0 mirror 0 pot 0 control 44
|
|
||||||
H3: data 1 mirror 1 pot 0 control 80
|
|
||||||
H4: data 0 mirror 0 pot 0 control 80
|
|
||||||
H5: data 0 mirror 0 pot 0 control 44
|
|
||||||
H6: data 1 mirror 1 pot 0 control 40
|
|
||||||
H7: data 1 mirror 1 pot 0 control 80
|
|
||||||
I0: data 0 mirror 0 pot 0 control 00
|
|
||||||
I1: data 0 mirror 0 pot 0 control 00
|
|
||||||
I2: data 0 mirror 0 pot 0 control 80
|
|
||||||
I3: data 0 mirror 0 pot 0 control 00
|
|
||||||
I4: data 0 mirror 0 pot 0 control 00
|
|
||||||
I5: data 1 mirror 1 pot 0 control 40
|
|
||||||
I6: data 0 mirror 0 pot 0 control 00
|
|
||||||
I7: data 0 mirror 0 pot 0 control 00
|
|
||||||
J0: data 1 mirror 1 pot 0 control 44
|
|
||||||
J1: data 1 mirror 1 pot 0 control 40
|
|
||||||
J2: data 1 mirror 1 pot 0 control 80
|
|
||||||
J3: data 0 mirror 0 pot 0 control 80
|
|
||||||
J4: data 1 mirror 1 pot 0 control 40
|
|
||||||
J5: data 1 mirror 1 pot 0 control 80
|
|
||||||
J6: data 0 mirror 0 pot 0 control 44
|
|
||||||
J7: data 0 mirror 0 pot 0 control 84
|
|
||||||
M0: data 0 mirror 0 control 06
|
|
||||||
M1: data 0 mirror 0 control 06
|
|
||||||
M2: data 1 mirror 1 control 06
|
|
||||||
M3: data 1 mirror 1 control 06
|
|
||||||
M4: data 0 mirror 1 control 06
|
|
||||||
M5: data 0 mirror 0 control 00
|
|
||||||
M6: data 0 mirror 0 control 86
|
|
||||||
M7: data 0 mirror 0 control 00
|
|
@@ -1,9 +0,0 @@
|
|||||||
BOOTLOADER=COREBOOT
|
|
||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
|
||||||
SHELL_TYPE=NONE
|
|
||||||
TPM_ENABLE=TRUE
|
|
||||||
#SYSTEM76_EC_LOGGING=TRUE
|
|
BIN
models/bonw15/fd.rom
(Stored with Git LFS)
BIN
models/bonw15/fd.rom
(Stored with Git LFS)
Binary file not shown.
@@ -1,272 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
|
|
||||||
#ifndef MAINBOARD_GPIO_H
|
|
||||||
#define MAINBOARD_GPIO_H
|
|
||||||
|
|
||||||
#include <soc/gpe.h>
|
|
||||||
#include <soc/gpio.h>
|
|
||||||
|
|
||||||
#ifndef __ACPI__
|
|
||||||
|
|
||||||
/* Pad configuration in ramstage. */
|
|
||||||
static const struct pad_config gpio_table[] = {
|
|
||||||
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPD2, 0x42880100, 0x0000),
|
|
||||||
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
|
||||||
PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPO(GPD9, 0, PWROK),
|
|
||||||
PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPO(GPD11, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPD12, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_A7, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A8, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A9, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A12, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A13, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A14, 0, DEEP),
|
|
||||||
_PAD_CFG_STRUCT(GPP_B0, 0x82900100, 0x0000),
|
|
||||||
PAD_CFG_GPO(GPP_B1, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B3, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B7, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B8, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B9, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B10, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B11, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_B15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B16, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B17, 1, PWROK),
|
|
||||||
PAD_CFG_NF(GPP_B18, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_B19, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B22, 1, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_C2, NONE, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_C3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C4, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C5, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_C6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C7, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C9, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C10, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C11, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C12, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C13, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C14, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C15, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C22, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_C23, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D0, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D1, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D7, 0, DEEP),
|
|
||||||
PAD_NC(GPP_D8, NONE),
|
|
||||||
PAD_CFG_NF(GPP_D9, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D14, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D15, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D16, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D18, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D19, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_E0, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E1, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E6, 0, DEEP),
|
|
||||||
_PAD_CFG_STRUCT(GPP_E7, 0x80100100, 0x0000),
|
|
||||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_E9, NONE),
|
|
||||||
PAD_NC(GPP_E10, NONE),
|
|
||||||
PAD_NC(GPP_E11, NONE),
|
|
||||||
PAD_NC(GPP_E12, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_E13, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E14, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E16, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E17, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E18, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E19, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F0, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F1, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F5, 0, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_F6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F7, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
|
|
||||||
_PAD_CFG_STRUCT(GPP_F9, 0x42880100, 0x0000),
|
|
||||||
PAD_CFG_GPO(GPP_F10, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F11, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F12, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F13, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F14, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F16, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F17, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F18, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_F22, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F23, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_G0, 0, PWROK),
|
|
||||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_G2, DN_20K, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
|
||||||
_PAD_CFG_STRUCT(GPP_G7, 0x42800100, 0x0000),
|
|
||||||
PAD_CFG_GPI(GPP_H0, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H1, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H2, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_H6, NONE),
|
|
||||||
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H14, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H17, 1, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H18, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H19, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H21, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H22, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I0, 0, DEEP),
|
|
||||||
_PAD_CFG_STRUCT(GPP_I1, 0x86880100, 0x0000),
|
|
||||||
_PAD_CFG_STRUCT(GPP_I2, 0x86880100, 0x0000),
|
|
||||||
_PAD_CFG_STRUCT(GPP_I3, 0x86880100, 0x0000),
|
|
||||||
_PAD_CFG_STRUCT(GPP_I4, 0x86880100, 0x0000),
|
|
||||||
PAD_CFG_GPO(GPP_I5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I7, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I8, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I9, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I10, 0, DEEP),
|
|
||||||
PAD_NC(GPP_I11, NONE),
|
|
||||||
PAD_NC(GPP_I12, NONE),
|
|
||||||
PAD_NC(GPP_I13, NONE),
|
|
||||||
PAD_NC(GPP_I14, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_I15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I16, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I17, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_I18, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I19, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_I21, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_I22, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J1, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_J8, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_J9, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_J10, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_J11, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_K0, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_K1, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_K2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_K3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_K4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_K5, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_K6, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_K7, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_K10, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_GPO(GPP_K11, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_R5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R7, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_R8, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_R10, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R11, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R12, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R13, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R14, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R16, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R17, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R18, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R19, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_R21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S0, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S1, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S7, 0, DEEP),
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
|
@@ -1,49 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
|
|
||||||
#include <device/azalia_device.h>
|
|
||||||
|
|
||||||
const u32 cim_verb_data[] = {
|
|
||||||
/* Realtek, ALC1220 */
|
|
||||||
0x10ec1220, /* Vendor ID */
|
|
||||||
0x15583702, /* Subsystem ID */
|
|
||||||
12, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(0, 0x15583702),
|
|
||||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
|
||||||
AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
|
|
||||||
AZALIA_PIN_CFG(0, 0x15, 0x40000000),
|
|
||||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
|
|
||||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
|
|
||||||
/* Intel, RaptorlakeHDMI */
|
|
||||||
0x80862818, /* Vendor ID */
|
|
||||||
0x80860101, /* Subsystem ID */
|
|
||||||
10, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
|
||||||
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
|
|
||||||
/* Nvidia, GenericHDMI */
|
|
||||||
0x10de00a5, /* Vendor ID */
|
|
||||||
0x10de0000, /* Subsystem ID */
|
|
||||||
5, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(0, 0x10de0000),
|
|
||||||
AZALIA_PIN_CFG(0, 0x04, 0x585600f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
|
|
||||||
};
|
|
||||||
|
|
||||||
const u32 pc_beep_verbs[] = {};
|
|
||||||
|
|
||||||
AZALIA_ARRAY_SIZES;
|
|
BIN
models/bonw15/me.rom
(Stored with Git LFS)
BIN
models/bonw15/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/bonw15/vbt.rom
(Stored with Git LFS)
BIN
models/bonw15/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -9,4 +9,4 @@
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 5116 KB
|
- Size: 5116 KB
|
||||||
- Version: 15.0.41.2158
|
- Version: 15.0.35.2039
|
||||||
|
@@ -2,7 +2,8 @@ CONFIG_VENDOR_SYSTEM76=y
|
|||||||
CONFIG_BOARD_SYSTEM76_DARP7=y
|
CONFIG_BOARD_SYSTEM76_DARP7=y
|
||||||
CONFIG_CCACHE=y
|
CONFIG_CCACHE=y
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_HAVE_ME_BIN=y
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
BIN
models/darp7/me.rom
(Stored with Git LFS)
BIN
models/darp7/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp7/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/darp7/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
1
models/darp8/FSP
Symbolic link
1
models/darp8/FSP
Symbolic link
@@ -0,0 +1 @@
|
|||||||
|
../gaze17-3050/FSP
|
@@ -9,4 +9,4 @@
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 4824 KB
|
- Size: 4824 KB
|
||||||
- Version: 16.0.15.1829
|
- Version: 16.0.15.1810
|
||||||
|
@@ -1,8 +1,13 @@
|
|||||||
CONFIG_VENDOR_SYSTEM76=y
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
CONFIG_BOARD_SYSTEM76_DARP8=y
|
CONFIG_BOARD_SYSTEM76_DARP8=y
|
||||||
|
CONFIG_ADD_FSP_BINARIES=y
|
||||||
CONFIG_CCACHE=y
|
CONFIG_CCACHE=y
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
|
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include"
|
||||||
|
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp.fd"
|
||||||
|
CONFIG_FSP_FULL_FD=y
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_HAVE_ME_BIN=y
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
BIN
models/darp8/me.rom
(Stored with Git LFS)
BIN
models/darp8/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp8/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/darp8/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -9,4 +9,4 @@
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 5116 KB
|
- Size: 5116 KB
|
||||||
- Version: 15.0.41.2158
|
- Version: 15.0.35.2039
|
||||||
|
@@ -2,7 +2,8 @@ CONFIG_VENDOR_SYSTEM76=y
|
|||||||
CONFIG_BOARD_SYSTEM76_GALP5=y
|
CONFIG_BOARD_SYSTEM76_GALP5=y
|
||||||
CONFIG_CCACHE=y
|
CONFIG_CCACHE=y
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_HAVE_ME_BIN=y
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
BIN
models/galp5/me.rom
(Stored with Git LFS)
BIN
models/galp5/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/galp5/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/galp5/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/galp6/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/galp6/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -1,9 +0,0 @@
|
|||||||
[Defines]
|
|
||||||
INF_VERSION = 0x00010005
|
|
||||||
BASE_NAME = IntelGopDriver
|
|
||||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
|
||||||
MODULE_TYPE = UEFI_DRIVER
|
|
||||||
VERSION_STRING = 1.0
|
|
||||||
|
|
||||||
[Binaries.X64]
|
|
||||||
PE32|IntelGopDriver.efi|*
|
|
@@ -1,12 +0,0 @@
|
|||||||
# System76 Galago Pro (galp6)
|
|
||||||
|
|
||||||
## Contents
|
|
||||||
|
|
||||||
- [EC](./ec.rom)
|
|
||||||
- *Read Error: No such file or directory (os error 2)*
|
|
||||||
- [FD](./fd.rom)
|
|
||||||
- Size: 4 KB
|
|
||||||
- HAP: false
|
|
||||||
- [ME](./me.rom)
|
|
||||||
- Size: 4824 KB
|
|
||||||
- Version: 16.0.15.1829
|
|
@@ -1 +0,0 @@
|
|||||||
# System76 Galago Pro (galp6)
|
|
@@ -1 +0,0 @@
|
|||||||
MX25L25635F/MX25L25645G
|
|
@@ -1,256 +0,0 @@
|
|||||||
## PCI ##
|
|
||||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x4621, Revision 0x02
|
|
||||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x4626, Revision 0x0C
|
|
||||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x461D, Revision 0x02
|
|
||||||
PCI Device: 0000:00:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
|
||||||
PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x466E, Revision 0x02
|
|
||||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x464F, Revision 0x02
|
|
||||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x467D, Revision 0x01
|
|
||||||
PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x461E, Revision 0x02
|
|
||||||
PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x463E, Revision 0x02
|
|
||||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0x467F, Revision 0x00
|
|
||||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x51ED, Revision 0x01
|
|
||||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x51EF, Revision 0x01
|
|
||||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x51F0, Revision 0x01
|
|
||||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x51E8, Revision 0x01
|
|
||||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x51E9, Revision 0x01
|
|
||||||
PCI Device: 0000:00:15.2: Class 0x000C8000, Vendor 0x8086, Device 0x51EA, Revision 0x01
|
|
||||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x51E0, Revision 0x01
|
|
||||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x51B0, Revision 0x01
|
|
||||||
PCI Device: 0000:00:1d.1: Class 0x00060400, Vendor 0x8086, Device 0x51B1, Revision 0x01
|
|
||||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x5182, Revision 0x01
|
|
||||||
PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x51C8, Revision 0x01
|
|
||||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x51A3, Revision 0x01
|
|
||||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x51A4, Revision 0x01
|
|
||||||
PCI Device: 0000:2a:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
|
||||||
PCI Device: 0000:2b:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
|
|
||||||
PCI Device: 10000:e0:06.0: Class 0x00060400, Vendor 0x8086, Device 0x464D, Revision 0x02
|
|
||||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x15B7, Device 0x5019, Revision 0x01
|
|
||||||
## GPIO ##
|
|
||||||
600 Series PCH-LP
|
|
||||||
GPP_B0 (0x6E,0x00) 0x44000700 0x0003c018 0x00000100 0x00000000
|
|
||||||
GPP_B1 (0x6E,0x02) 0x44000700 0x0003c019 0x00000100 0x00000000
|
|
||||||
GPP_B2 (0x6E,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
|
|
||||||
GPP_B3 (0x6E,0x06) 0x44000102 0x0000001b 0x00000000 0x00000000
|
|
||||||
GPP_B4 (0x6E,0x08) 0x44000102 0x0000001c 0x00000000 0x00000000
|
|
||||||
GPP_B5 (0x6E,0x0A) 0x44000902 0x0000001d 0x00000000 0x00000000
|
|
||||||
GPP_B6 (0x6E,0x0C) 0x44000902 0x0000001e 0x00000000 0x00000000
|
|
||||||
GPP_B7 (0x6E,0x0E) 0x44000200 0x0000001f 0x00000000 0x00000000
|
|
||||||
GPP_B8 (0x6E,0x10) 0x44000200 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_B9 (0x6E,0x12) 0x44000200 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_B10 (0x6E,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_B11 (0x6E,0x16) 0x04000702 0x00000023 0x00000000 0x00000000
|
|
||||||
GPP_B12 (0x6E,0x18) 0x44000700 0x0003c024 0x00000000 0x00000000
|
|
||||||
GPP_B13 (0x6E,0x1A) 0x44000700 0x0003c025 0x00000000 0x00000000
|
|
||||||
GPP_B14 (0x6E,0x1C) 0x44000500 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_B15 (0x6E,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_B16 (0x6E,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_B17 (0x6E,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_B18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000100 0x00000000
|
|
||||||
GPP_B19 (0x6E,0x26) 0x44000200 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_B20 (0x6E,0x28) 0x44000200 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_B21 (0x6E,0x2A) 0x44000200 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_B22 (0x6E,0x2C) 0x44000200 0x0000002e 0x00000000 0x00000000
|
|
||||||
GPP_B23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
|
|
||||||
GPP_T2 (0x6E,0x38) 0x44000200 0x00000032 0x00000000 0x00000000
|
|
||||||
GPP_T3 (0x6E,0x3A) 0x44000200 0x00000033 0x00000000 0x00000000
|
|
||||||
GPP_A0 (0x6E,0x54) 0x44000700 0x0003f040 0x00000100 0x00000000
|
|
||||||
GPP_A1 (0x6E,0x56) 0x44000702 0x0003f041 0x00000100 0x00000000
|
|
||||||
GPP_A2 (0x6E,0x58) 0x44000700 0x0003f042 0x00000100 0x00000000
|
|
||||||
GPP_A3 (0x6E,0x5A) 0x44000700 0x0003f043 0x00000100 0x00000000
|
|
||||||
GPP_A4 (0x6E,0x5C) 0x44000700 0x0003f044 0x00000100 0x00000000
|
|
||||||
GPP_A5 (0x6E,0x5E) 0x44000702 0x00003045 0x00000100 0x00000000
|
|
||||||
GPP_A6 (0x6E,0x60) 0x44000200 0x00000046 0x00000100 0x00000000
|
|
||||||
GPP_A7 (0x6E,0x62) 0x44000200 0x00000047 0x00000000 0x00000000
|
|
||||||
GPP_A8 (0x6E,0x64) 0x44000200 0x00000048 0x00000000 0x00000000
|
|
||||||
GPP_A9 (0x6E,0x66) 0x44000700 0x0003d049 0x00000100 0x00000000
|
|
||||||
GPP_A10 (0x6E,0x68) 0x44000700 0x0003c04a 0x00000100 0x00000000
|
|
||||||
GPP_A11 (0x6E,0x6A) 0x44000200 0x0000004b 0x00000000 0x00000000
|
|
||||||
GPP_A12 (0x6E,0x6C) 0x44000102 0x0000004c 0x00000000 0x00000000
|
|
||||||
GPP_A13 (0x6E,0x6E) 0x84000201 0x0000004d 0x00000000 0x00000000
|
|
||||||
GPP_A14 (0x6E,0x70) 0x44000201 0x0000004e 0x00000000 0x00000000
|
|
||||||
GPP_A15 (0x6E,0x72) 0x44000102 0x0000004f 0x00000000 0x00000000
|
|
||||||
GPP_A16 (0x6E,0x74) 0x44000702 0x00000050 0x00000000 0x00000000
|
|
||||||
GPP_A17 (0x6E,0x76) 0x80800102 0x00000051 0x00000000 0x00000000
|
|
||||||
GPP_A18 (0x6E,0x78) 0x44000500 0x00024052 0x00000000 0x00000000
|
|
||||||
GPP_A19 (0x6E,0x7A) 0x44000102 0x00000053 0x00000000 0x00000000
|
|
||||||
GPP_A20 (0x6E,0x7C) 0x44000200 0x00000054 0x00000000 0x00000000
|
|
||||||
GPP_A21 (0x6E,0x7E) 0x44000200 0x00000055 0x00000100 0x00000000
|
|
||||||
GPP_A22 (0x6E,0x80) 0x84000201 0x00000056 0x00000000 0x00000000
|
|
||||||
GPP_A23 (0x6E,0x82) 0x44000200 0x00000057 0x00000100 0x00000000
|
|
||||||
GPP_S0 (0x6D,0x00) 0x44000200 0x0180006c 0x00000000 0x00000000
|
|
||||||
GPP_S1 (0x6D,0x02) 0x44000200 0x0180006d 0x00000000 0x00000000
|
|
||||||
GPP_S2 (0x6D,0x04) 0x44000200 0x0180006e 0x00000000 0x00000000
|
|
||||||
GPP_S3 (0x6D,0x06) 0x44000200 0x0180006f 0x00000000 0x00000000
|
|
||||||
GPP_S4 (0x6D,0x08) 0x44000200 0x01800070 0x00000000 0x00000000
|
|
||||||
GPP_S5 (0x6D,0x0A) 0x44000200 0x01800071 0x00000000 0x00000000
|
|
||||||
GPP_S6 (0x6D,0x0C) 0x44000200 0x01800072 0x00000000 0x00000000
|
|
||||||
GPP_S7 (0x6D,0x0E) 0x44000200 0x01800073 0x00000000 0x00000000
|
|
||||||
GPP_H0 (0x6D,0x10) 0x84000201 0x00000074 0x00000000 0x00000000
|
|
||||||
GPP_H1 (0x6D,0x12) 0x44000102 0x00000075 0x00000000 0x00000000
|
|
||||||
GPP_H2 (0x6D,0x14) 0x44000102 0x00000076 0x00000000 0x00000000
|
|
||||||
GPP_H3 (0x6D,0x16) 0x44000102 0x00000077 0x00000000 0x00000000
|
|
||||||
GPP_H4 (0x6D,0x18) 0x44000502 0x00000018 0x00000000 0x00000000
|
|
||||||
GPP_H5 (0x6D,0x1A) 0x44000502 0x00000019 0x00000000 0x00000000
|
|
||||||
GPP_H6 (0x6D,0x1C) 0x44000502 0x0000001a 0x00000000 0x00000000
|
|
||||||
GPP_H7 (0x6D,0x1E) 0x44000502 0x0000001b 0x00000000 0x00000000
|
|
||||||
GPP_H8 (0x6D,0x20) 0x44000902 0x0000001c 0x00000000 0x00000000
|
|
||||||
GPP_H9 (0x6D,0x22) 0x44000900 0x0000001d 0x00000000 0x00000000
|
|
||||||
GPP_H10 (0x6D,0x24) 0x44000902 0x0000001e 0x00000000 0x00000000
|
|
||||||
GPP_H11 (0x6D,0x26) 0x44000900 0x0000001f 0x00000000 0x00000000
|
|
||||||
GPP_H12 (0x6D,0x28) 0x44000200 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_H13 (0x6D,0x2A) 0x44000200 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_H14 (0x6D,0x2C) 0x44000200 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_H15 (0x6D,0x2E) 0x44000500 0x0003c023 0x00000000 0x00000000
|
|
||||||
GPP_H16 (0x6D,0x30) 0x44000200 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_H17 (0x6D,0x32) 0x44000502 0x0003c025 0x00000000 0x00000000
|
|
||||||
GPP_H18 (0x6D,0x34) 0x44000700 0x0003c026 0x00000000 0x00000000
|
|
||||||
GPP_H19 (0x6D,0x36) 0x44000200 0x00000027 0x00000000 0x00000000
|
|
||||||
GPP_H20 (0x6D,0x38) 0x44000102 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_H21 (0x6D,0x3A) 0x44000200 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_H22 (0x6D,0x3C) 0x44000200 0x0000002a 0x00000000 0x00000000
|
|
||||||
GPP_H23 (0x6D,0x3E) 0x44000b02 0x0000002b 0x00000000 0x00000000
|
|
||||||
GPP_D0 (0x6D,0x40) 0x44000201 0x0000002c 0x00000000 0x00000000
|
|
||||||
GPP_D1 (0x6D,0x42) 0x44000102 0x0000002d 0x00000000 0x00000000
|
|
||||||
GPP_D2 (0x6D,0x44) 0x44000200 0x0000002e 0x00000000 0x00000000
|
|
||||||
GPP_D3 (0x6D,0x46) 0x44000200 0x0000002f 0x00000000 0x00000000
|
|
||||||
GPP_D4 (0x6D,0x48) 0x44000200 0x00000030 0x00000000 0x00000000
|
|
||||||
GPP_D5 (0x6D,0x4A) 0x44000700 0x00000031 0x00000000 0x00000000
|
|
||||||
GPP_D6 (0x6D,0x4C) 0x44000200 0x00000032 0x00000000 0x00000000
|
|
||||||
GPP_D7 (0x6D,0x4E) 0x44000702 0x00000033 0x00000000 0x00000000
|
|
||||||
GPP_D8 (0x6D,0x50) 0x44000200 0x00000034 0x00000000 0x00000000
|
|
||||||
GPP_D9 (0x6D,0x52) 0x44000200 0x00000035 0x00000100 0x00000000
|
|
||||||
GPP_D10 (0x6D,0x54) 0x44000102 0x00003c36 0x00000100 0x00000000
|
|
||||||
GPP_D11 (0x6D,0x56) 0x44000200 0x00000037 0x00000100 0x00000000
|
|
||||||
GPP_D12 (0x6D,0x58) 0x44000102 0x00003c38 0x00000100 0x00000000
|
|
||||||
GPP_D13 (0x6D,0x5A) 0x44000102 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_D14 (0x6D,0x5C) 0x84000201 0x0000003a 0x00000000 0x00000000
|
|
||||||
GPP_D15 (0x6D,0x5E) 0x44000200 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_D16 (0x6D,0x60) 0x44000200 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_D17 (0x6D,0x62) 0x44000200 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_D18 (0x6D,0x64) 0x44000200 0x0000003e 0x00000000 0x00000000
|
|
||||||
GPP_D19 (0x6D,0x66) 0x44000200 0x0000003f 0x00000000 0x00000000
|
|
||||||
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
|
|
||||||
GPD1 (0x6C,0x02) 0x04000700 0x00003c61 0x00000000 0x00000000
|
|
||||||
GPD2 (0x6C,0x04) 0x04000102 0x00003c62 0x00000000 0x00000000
|
|
||||||
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
|
|
||||||
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
|
||||||
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
|
||||||
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
|
|
||||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000000 0x00000000
|
|
||||||
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
|
|
||||||
GPD9 (0x6C,0x12) 0x44000500 0x00000069 0x00000000 0x00000000
|
|
||||||
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
|
|
||||||
GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
|
|
||||||
GPP_C0 (0x6A,0x00) 0x44000502 0x0003c06e 0x00000000 0x00000000
|
|
||||||
GPP_C1 (0x6A,0x02) 0x44000502 0x0003c06f 0x00000000 0x00000000
|
|
||||||
GPP_C2 (0x6A,0x04) 0x44000102 0x00000070 0x00000800 0x00000000
|
|
||||||
GPP_C3 (0x6A,0x06) 0x44000502 0x00000071 0x00000000 0x00000000
|
|
||||||
GPP_C4 (0x6A,0x08) 0x44000502 0x00000072 0x00000000 0x00000000
|
|
||||||
GPP_C5 (0x6A,0x0A) 0x84000201 0x00000073 0x00000000 0x00000000
|
|
||||||
GPP_C6 (0x6A,0x0C) 0x44000502 0x00000074 0x00000000 0x00000000
|
|
||||||
GPP_C7 (0x6A,0x0E) 0x44000502 0x00000075 0x00000000 0x00000000
|
|
||||||
GPP_C8 (0x6A,0x10) 0x44000300 0x00000076 0x00000000 0x00000000
|
|
||||||
GPP_C9 (0x6A,0x12) 0x44000300 0x00000077 0x00000000 0x00000000
|
|
||||||
GPP_C10 (0x6A,0x14) 0x44000300 0x00000018 0x00000000 0x00000000
|
|
||||||
GPP_C11 (0x6A,0x16) 0x44000300 0x00000019 0x00000000 0x00000000
|
|
||||||
GPP_C12 (0x6A,0x18) 0x44000300 0x0000001a 0x00000000 0x00000000
|
|
||||||
GPP_C13 (0x6A,0x1A) 0x44000300 0x0000001b 0x00000000 0x00000000
|
|
||||||
GPP_C14 (0x6A,0x1C) 0x44000300 0x0000001c 0x00000000 0x00000000
|
|
||||||
GPP_C15 (0x6A,0x1E) 0x44000300 0x0000001d 0x00000000 0x00000000
|
|
||||||
GPP_C16 (0x6A,0x20) 0x44000300 0x0000001e 0x00000000 0x00000000
|
|
||||||
GPP_C17 (0x6A,0x22) 0x44000300 0x0000001f 0x00000000 0x00000000
|
|
||||||
GPP_C18 (0x6A,0x24) 0x44000300 0x00000020 0x00000000 0x00000000
|
|
||||||
GPP_C19 (0x6A,0x26) 0x44000300 0x00000021 0x00000000 0x00000000
|
|
||||||
GPP_C20 (0x6A,0x28) 0x44000300 0x00000022 0x00000000 0x00000000
|
|
||||||
GPP_C21 (0x6A,0x2A) 0x44000300 0x00000023 0x00000000 0x00000000
|
|
||||||
GPP_C22 (0x6A,0x2C) 0x44000300 0x00000024 0x00000000 0x00000000
|
|
||||||
GPP_C23 (0x6A,0x2E) 0x44000300 0x00000025 0x00000000 0x00000000
|
|
||||||
GPP_F0 (0x6A,0x30) 0x44000500 0x0003c056 0x00000100 0x00000000
|
|
||||||
GPP_F1 (0x6A,0x32) 0x44000502 0x0003f057 0x00000100 0x00000000
|
|
||||||
GPP_F2 (0x6A,0x34) 0x44000500 0x0003c058 0x00000100 0x00000000
|
|
||||||
GPP_F3 (0x6A,0x36) 0x44000500 0x0003f059 0x00000100 0x00000000
|
|
||||||
GPP_F4 (0x6A,0x38) 0x44000500 0x0003c05a 0x00000100 0x00000000
|
|
||||||
GPP_F5 (0x6A,0x3A) 0x44000900 0x0003c05b 0x00000100 0x00000000
|
|
||||||
GPP_F6 (0x6A,0x3C) 0x44000502 0x0000005c 0x00000100 0x00000000
|
|
||||||
GPP_F7 (0x6A,0x3E) 0x44000201 0x0000005d 0x00000000 0x00000000
|
|
||||||
GPP_F8 (0x6A,0x40) 0x44000200 0x0000005e 0x00000000 0x00000000
|
|
||||||
GPP_F9 (0x6A,0x42) 0x44000200 0x0000005f 0x00000000 0x00000000
|
|
||||||
GPP_F10 (0x6A,0x44) 0x44000201 0x00000060 0x00000000 0x00000000
|
|
||||||
GPP_F11 (0x6A,0x46) 0x44000102 0x00000061 0x00000000 0x00000000
|
|
||||||
GPP_F12 (0x6A,0x48) 0x84000102 0x00000062 0x00000100 0x00000000
|
|
||||||
GPP_F13 (0x6A,0x4A) 0x84000102 0x00000063 0x00000000 0x00000000
|
|
||||||
GPP_F14 (0x6A,0x4C) 0x44000102 0x00000064 0x00000000 0x00000000
|
|
||||||
GPP_F15 (0x6A,0x4E) 0x44000102 0x00000065 0x00000000 0x00000000
|
|
||||||
GPP_F16 (0x6A,0x50) 0x44000201 0x00000066 0x00000100 0x00000000
|
|
||||||
GPP_F17 (0x6A,0x52) 0x44000200 0x00000067 0x00000000 0x00000000
|
|
||||||
GPP_F18 (0x6A,0x54) 0x44000200 0x00000068 0x00000000 0x00000000
|
|
||||||
GPP_F19 (0x6A,0x56) 0x44000702 0x00000069 0x00000000 0x00000000
|
|
||||||
GPP_F20 (0x6A,0x58) 0x84000201 0x0003c06a 0x00000000 0x00000000
|
|
||||||
GPP_F21 (0x6A,0x5A) 0x44000200 0x0003c06b 0x00000000 0x00000000
|
|
||||||
GPP_F22 (0x6A,0x5C) 0x44000200 0x0003c06c 0x00000000 0x00000000
|
|
||||||
GPP_F23 (0x6A,0x5E) 0x44000200 0x0003c06d 0x00000000 0x00000000
|
|
||||||
GPP_E0 (0x6A,0x6E) 0x44000102 0x00000026 0x00000000 0x00000000
|
|
||||||
GPP_E1 (0x6A,0x70) 0x40100102 0x00003027 0x00000000 0x00000000
|
|
||||||
GPP_E2 (0x6A,0x72) 0x44000200 0x00000028 0x00000000 0x00000000
|
|
||||||
GPP_E3 (0x6A,0x74) 0x44000201 0x00000029 0x00000000 0x00000000
|
|
||||||
GPP_E4 (0x6A,0x76) 0x84000200 0x00000030 0x00000000 0x00000000
|
|
||||||
GPP_E5 (0x6A,0x78) 0x44000300 0x00000031 0x00000000 0x00000000
|
|
||||||
GPP_E6 (0x6A,0x7A) 0x44000102 0x00000032 0x00000900 0x00000000
|
|
||||||
GPP_E7 (0x6A,0x7C) 0x44000102 0x00000033 0x00000000 0x00000000
|
|
||||||
GPP_E8 (0x6A,0x7E) 0x44000100 0x00000034 0x00000000 0x00000000
|
|
||||||
GPP_E9 (0x6A,0x80) 0x44000502 0x00000035 0x00000800 0x00000000
|
|
||||||
GPP_E10 (0x6A,0x82) 0x44000102 0x00000036 0x00000800 0x00000000
|
|
||||||
GPP_E11 (0x6A,0x84) 0x44000102 0x00000037 0x00000800 0x00000000
|
|
||||||
GPP_E12 (0x6A,0x86) 0x44000200 0x00000038 0x00000000 0x00000000
|
|
||||||
GPP_E13 (0x6A,0x88) 0x44000100 0x00000039 0x00000000 0x00000000
|
|
||||||
GPP_E14 (0x6A,0x8A) 0x44000702 0x0002403a 0x00000000 0x00000000
|
|
||||||
GPP_E15 (0x6A,0x8C) 0x44000200 0x0000003b 0x00000000 0x00000000
|
|
||||||
GPP_E16 (0x6A,0x8E) 0x44000200 0x0000003c 0x00000000 0x00000000
|
|
||||||
GPP_E17 (0x6A,0x90) 0x44000100 0x0000003d 0x00000000 0x00000000
|
|
||||||
GPP_E18 (0x6A,0x92) 0x44000300 0x00003c3e 0x00000000 0x00000000
|
|
||||||
GPP_E19 (0x6A,0x94) 0x44000300 0x00003c3f 0x00000000 0x00000000
|
|
||||||
GPP_E20 (0x6A,0x96) 0x44000200 0x00000040 0x00000100 0x00000000
|
|
||||||
GPP_E21 (0x6A,0x98) 0x44000102 0x00003c41 0x00000100 0x00000000
|
|
||||||
GPP_E22 (0x6A,0x9A) 0x44000200 0x00000042 0x00000000 0x00000000
|
|
||||||
GPP_E23 (0x6A,0x9C) 0x44000200 0x00000043 0x00000000 0x00000000
|
|
||||||
GPP_R0 (0x69,0x00) 0x44000500 0x0003c058 0x00000000 0x00000000
|
|
||||||
GPP_R1 (0x69,0x02) 0x44000500 0x0003fc59 0x00000000 0x00000000
|
|
||||||
GPP_R2 (0x69,0x04) 0x44000500 0x0003fc5a 0x00000000 0x00000000
|
|
||||||
GPP_R3 (0x69,0x06) 0x44000500 0x0003fc5b 0x00000000 0x00000000
|
|
||||||
GPP_R4 (0x69,0x08) 0x44000500 0x0003c05c 0x00000000 0x00000000
|
|
||||||
GPP_R5 (0x69,0x0A) 0x44000102 0x0000005d 0x00000000 0x00000000
|
|
||||||
GPP_R6 (0x69,0x0C) 0x44000102 0x0000005e 0x00000000 0x00000000
|
|
||||||
GPP_R7 (0x69,0x0E) 0x44000102 0x0000005f 0x00000000 0x00000000
|
|
||||||
## HDAUDIO ##
|
|
||||||
hdaudioC0D0
|
|
||||||
vendor_name: Realtek
|
|
||||||
chip_name: ALC256
|
|
||||||
vendor_id: 0x10ec0256
|
|
||||||
subsystem_id: 0x15584041
|
|
||||||
revision_id: 0x100002
|
|
||||||
0x12: 0x90a60130
|
|
||||||
0x13: 0x40000000
|
|
||||||
0x14: 0x90170110
|
|
||||||
0x18: 0x411111f0
|
|
||||||
0x19: 0x411111f0
|
|
||||||
0x1a: 0x411111f0
|
|
||||||
0x1b: 0x411111f0
|
|
||||||
0x1d: 0x41700001
|
|
||||||
0x1e: 0x411111f0
|
|
||||||
0x21: 0x02211020
|
|
||||||
hdaudioC0D2
|
|
||||||
vendor_name: Intel
|
|
||||||
chip_name: Alderlake-P HDMI
|
|
||||||
vendor_id: 0x8086281c
|
|
||||||
subsystem_id: 0x80860101
|
|
||||||
revision_id: 0x100000
|
|
||||||
0x04: 0x18560010
|
|
||||||
0x06: 0x18560010
|
|
||||||
0x08: 0x18560010
|
|
||||||
0x0a: 0x18560010
|
|
||||||
0x0b: 0x18560010
|
|
||||||
0x0c: 0x18560010
|
|
||||||
0x0d: 0x18560010
|
|
||||||
0x0e: 0x18560010
|
|
||||||
0x0f: 0x18560010
|
|
@@ -1,18 +0,0 @@
|
|||||||
CONFIG_VENDOR_SYSTEM76=y
|
|
||||||
CONFIG_BOARD_SYSTEM76_GALP6=y
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_POST_IO=n
|
|
||||||
CONFIG_RUN_FSP_GOP=y
|
|
||||||
CONFIG_SMMSTORE=y
|
|
||||||
CONFIG_SMMSTORE_V2=y
|
|
||||||
CONFIG_USE_OPTION_TABLE=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
|
@@ -1 +0,0 @@
|
|||||||
BOARD=system76/galp6
|
|
@@ -1,89 +0,0 @@
|
|||||||
id 5570 rev 6
|
|
||||||
A0: data 0 mirror 0 pot 0 control 80
|
|
||||||
A1: data 0 mirror 0 pot 0 control 00
|
|
||||||
A2: data 0 mirror 0 pot 0 control 00
|
|
||||||
A3: data 1 mirror 1 pot 0 control 40
|
|
||||||
A4: data 0 mirror 0 pot 0 control 00
|
|
||||||
A5: data 1 mirror 1 pot 0 control 80
|
|
||||||
A6: data 1 mirror 1 pot 0 control 40
|
|
||||||
A7: data 1 mirror 1 pot 0 control 40
|
|
||||||
B0: data 1 mirror 1 pot 0 control 84
|
|
||||||
B1: data 1 mirror 1 pot 0 control 84
|
|
||||||
B2: data 1 mirror 1 pot 0 control 84
|
|
||||||
B3: data 1 mirror 1 pot 0 control 80
|
|
||||||
B4: data 1 mirror 1 pot 0 control 40
|
|
||||||
B5: data 1 mirror 1 pot 0 control 80
|
|
||||||
B6: data 1 mirror 1 pot 0 control 40
|
|
||||||
B7: data 1 mirror 1 pot 0 control 80
|
|
||||||
C0: data 1 mirror 1 pot 0 control 80
|
|
||||||
C1: data 1 mirror 1 pot 0 control 04
|
|
||||||
C2: data 1 mirror 1 pot 0 control 04
|
|
||||||
C3: data 0 mirror 0 pot 0 control 80
|
|
||||||
C4: data 0 mirror 0 pot 0 control 84
|
|
||||||
C5: data 1 mirror 1 pot 0 control 40
|
|
||||||
C6: data 1 mirror 1 pot 0 control 40
|
|
||||||
C7: data 0 mirror 0 pot 0 control 40
|
|
||||||
D0: data 1 mirror 1 pot 0 control 40
|
|
||||||
D1: data 1 mirror 1 pot 0 control 44
|
|
||||||
D2: data 1 mirror 1 pot 0 control 00
|
|
||||||
D3: data 1 mirror 1 pot 0 control 80
|
|
||||||
D4: data 1 mirror 1 pot 0 control 40
|
|
||||||
D5: data 1 mirror 1 pot 0 control 40
|
|
||||||
D6: data 0 mirror 0 pot 0 control 02
|
|
||||||
D7: data 0 mirror 0 pot 0 control 02
|
|
||||||
E0: data 1 mirror 1 pot 0 control 04
|
|
||||||
E1: data 0 mirror 0 pot 0 control 40
|
|
||||||
E2: data 0 mirror 0 pot 0 control 84
|
|
||||||
E3: data 1 mirror 1 pot 0 control 44
|
|
||||||
E4: data 1 mirror 1 pot 0 control 40
|
|
||||||
E5: data 1 mirror 1 pot 0 control 40
|
|
||||||
E6: data 1 mirror 1 pot 0 control 80
|
|
||||||
E7: data 1 mirror 1 pot 0 control 04
|
|
||||||
F0: data 0 mirror 0 pot 0 control 44
|
|
||||||
F1: data 1 mirror 1 pot 0 control 40
|
|
||||||
F2: data 1 mirror 1 pot 0 control 44
|
|
||||||
F3: data 1 mirror 1 pot 0 control 40
|
|
||||||
F4: data 1 mirror 1 pot 0 control 04
|
|
||||||
F5: data 1 mirror 1 pot 0 control 04
|
|
||||||
F6: data 0 mirror 0 pot 0 control 00
|
|
||||||
F7: data 1 mirror 1 pot 1 control 40
|
|
||||||
G0: data 1 mirror 1 pot 0 control 80
|
|
||||||
G1: data 1 mirror 1 pot 0 control 40
|
|
||||||
G2: data 1 mirror 1 pot 0 control 80
|
|
||||||
G3: data 0 mirror 0 pot 0 control 00
|
|
||||||
G4: data 0 mirror 0 pot 0 control 00
|
|
||||||
G5: data 0 mirror 0 pot 0 control 00
|
|
||||||
G6: data 1 mirror 1 pot 0 control 40
|
|
||||||
G7: data 0 mirror 0 pot 0 control 00
|
|
||||||
H0: data 0 mirror 0 pot 0 control 80
|
|
||||||
H1: data 1 mirror 1 pot 0 control 80
|
|
||||||
H2: data 1 mirror 1 pot 0 control 40
|
|
||||||
H3: data 1 mirror 1 pot 0 control 80
|
|
||||||
H4: data 1 mirror 1 pot 0 control 80
|
|
||||||
H5: data 0 mirror 0 pot 0 control 40
|
|
||||||
H6: data 1 mirror 1 pot 0 control 80
|
|
||||||
H7: data 1 mirror 1 pot 0 control 80
|
|
||||||
I0: data 0 mirror 0 pot 0 control 00
|
|
||||||
I1: data 0 mirror 0 pot 0 control 00
|
|
||||||
I2: data 0 mirror 0 pot 0 control 80
|
|
||||||
I3: data 0 mirror 0 pot 0 control 80
|
|
||||||
I4: data 0 mirror 0 pot 0 control 00
|
|
||||||
I5: data 0 mirror 0 pot 0 control 00
|
|
||||||
I6: data 1 mirror 1 pot 0 control 80
|
|
||||||
I7: data 0 mirror 0 pot 0 control 00
|
|
||||||
J0: data 0 mirror 0 pot 0 control 40
|
|
||||||
J1: data 1 mirror 1 pot 0 control 40
|
|
||||||
J2: data 0 mirror 0 pot 0 control 00
|
|
||||||
J3: data 1 mirror 1 pot 0 control 80
|
|
||||||
J4: data 1 mirror 1 pot 0 control 40
|
|
||||||
J5: data 1 mirror 1 pot 0 control 40
|
|
||||||
J6: data 0 mirror 0 pot 0 control 44
|
|
||||||
J7: data 1 mirror 1 pot 0 control 80
|
|
||||||
M0: data 0 mirror 0 control 06
|
|
||||||
M1: data 1 mirror 1 control 06
|
|
||||||
M2: data 1 mirror 1 control 06
|
|
||||||
M3: data 1 mirror 1 control 06
|
|
||||||
M4: data 1 mirror 0 control 06
|
|
||||||
M5: data 0 mirror 0 control 00
|
|
||||||
M6: data 1 mirror 1 control 86
|
|
||||||
M7: data 0 mirror 0 control 00
|
|
@@ -1,9 +0,0 @@
|
|||||||
BOOTLOADER=COREBOOT
|
|
||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
|
||||||
SHELL_TYPE=NONE
|
|
||||||
TPM_ENABLE=TRUE
|
|
||||||
#SYSTEM76_EC_LOGGING=TRUE
|
|
BIN
models/galp6/fd.rom
(Stored with Git LFS)
BIN
models/galp6/fd.rom
(Stored with Git LFS)
Binary file not shown.
@@ -1,211 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
|
|
||||||
#ifndef MAINBOARD_GPIO_H
|
|
||||||
#define MAINBOARD_GPIO_H
|
|
||||||
|
|
||||||
#include <soc/gpe.h>
|
|
||||||
#include <soc/gpio.h>
|
|
||||||
|
|
||||||
#ifndef __ACPI__
|
|
||||||
|
|
||||||
/* Pad configuration in ramstage. */
|
|
||||||
static const struct pad_config gpio_table[] = {
|
|
||||||
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
|
||||||
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
|
||||||
PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_A6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A7, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A8, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_A11, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A13, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_A14, 1, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_A15, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
|
|
||||||
_PAD_CFG_STRUCT(GPP_A17, 0x80800100, 0x0000),
|
|
||||||
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_A22, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_A23, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_B2, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_GPO(GPP_B7, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B8, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B9, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B10, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_B15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B16, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B17, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B19, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B20, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_B22, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_C5, 1, PLTRST),
|
|
||||||
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
|
|
||||||
PAD_NC(GPP_C8, NONE),
|
|
||||||
PAD_NC(GPP_C9, NONE),
|
|
||||||
PAD_NC(GPP_C10, NONE),
|
|
||||||
PAD_NC(GPP_C11, NONE),
|
|
||||||
PAD_NC(GPP_C12, NONE),
|
|
||||||
PAD_NC(GPP_C13, NONE),
|
|
||||||
PAD_NC(GPP_C14, NONE),
|
|
||||||
PAD_NC(GPP_C15, NONE),
|
|
||||||
PAD_NC(GPP_C16, NONE),
|
|
||||||
PAD_NC(GPP_C17, NONE),
|
|
||||||
PAD_NC(GPP_C18, NONE),
|
|
||||||
PAD_NC(GPP_C19, NONE),
|
|
||||||
PAD_NC(GPP_C20, NONE),
|
|
||||||
PAD_NC(GPP_C21, NONE),
|
|
||||||
PAD_NC(GPP_C22, NONE),
|
|
||||||
PAD_NC(GPP_C23, NONE),
|
|
||||||
PAD_CFG_GPO(GPP_D0, 1, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D4, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_D6, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_D8, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D9, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_D10, NATIVE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D11, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_D12, NATIVE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D14, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_D15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D16, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D17, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D18, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_D19, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
|
||||||
_PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000),
|
|
||||||
PAD_CFG_GPO(GPP_E2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E3, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E4, 0, PLTRST),
|
|
||||||
PAD_NC(GPP_E5, NONE),
|
|
||||||
PAD_CFG_GPI(GPP_E6, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E8, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E12, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E13, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_E15, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E16, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E17, NONE, DEEP),
|
|
||||||
PAD_NC(GPP_E18, NATIVE),
|
|
||||||
PAD_NC(GPP_E19, NATIVE),
|
|
||||||
PAD_CFG_GPO(GPP_E20, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_E21, NATIVE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E22, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_E23, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_F7, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F8, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F9, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F10, 1, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_F12, NONE, PLTRST),
|
|
||||||
PAD_CFG_GPI(GPP_F13, NONE, PLTRST),
|
|
||||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F16, 1, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F17, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F18, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_F20, 1, PLTRST),
|
|
||||||
PAD_CFG_GPO(GPP_F21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F22, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_F23, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H0, 1, PLTRST),
|
|
||||||
PAD_CFG_GPI(GPP_H1, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H2, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_GPO(GPP_H12, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H13, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H14, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_H16, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPO(GPP_H19, 0, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H21, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_H22, 0, DEEP),
|
|
||||||
PAD_CFG_NF(GPP_H23, NONE, DEEP, NF2),
|
|
||||||
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
|
||||||
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
|
|
||||||
PAD_CFG_GPI(GPP_R5, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_R6, NONE, DEEP),
|
|
||||||
PAD_CFG_GPI(GPP_R7, NONE, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S0, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S1, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S3, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S4, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S5, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S6, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_S7, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_T2, 0, DEEP),
|
|
||||||
PAD_CFG_GPO(GPP_T3, 0, DEEP),
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
|
@@ -1,39 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
|
|
||||||
#include <device/azalia_device.h>
|
|
||||||
|
|
||||||
const u32 cim_verb_data[] = {
|
|
||||||
/* Realtek, ALC256 */
|
|
||||||
0x10ec0256, /* Vendor ID */
|
|
||||||
0x15584041, /* Subsystem ID */
|
|
||||||
11, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(0, 0x15584041),
|
|
||||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
|
||||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
|
||||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
|
||||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1d, 0x41700001),
|
|
||||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
|
||||||
AZALIA_PIN_CFG(0, 0x21, 0x02211020),
|
|
||||||
/* Intel, Alderlake-PHDMI */
|
|
||||||
0x8086281c, /* Vendor ID */
|
|
||||||
0x80860101, /* Subsystem ID */
|
|
||||||
10, /* Number of entries */
|
|
||||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
|
||||||
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
|
|
||||||
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
|
|
||||||
};
|
|
||||||
|
|
||||||
const u32 pc_beep_verbs[] = {};
|
|
||||||
|
|
||||||
AZALIA_ARRAY_SIZES;
|
|
BIN
models/galp6/me.rom
(Stored with Git LFS)
BIN
models/galp6/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/galp6/vbt.rom
(Stored with Git LFS)
BIN
models/galp6/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
@@ -9,4 +9,4 @@
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 5116 KB
|
- Size: 5116 KB
|
||||||
- Version: 15.0.41.2158
|
- Version: 15.0.35.2039
|
||||||
|
@@ -2,7 +2,8 @@ CONFIG_VENDOR_SYSTEM76=y
|
|||||||
CONFIG_BOARD_SYSTEM76_GAZE16_3050=y
|
CONFIG_BOARD_SYSTEM76_GAZE16_3050=y
|
||||||
CONFIG_CCACHE=y
|
CONFIG_CCACHE=y
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_HAVE_ME_BIN=y
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
BIN
models/gaze16-3050/me.rom
(Stored with Git LFS)
BIN
models/gaze16-3050/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/gaze16-3050/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/gaze16-3050/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
@@ -9,4 +9,4 @@
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 5108 KB
|
- Size: 5108 KB
|
||||||
- Version: 15.0.41.2158
|
- Version: 15.0.35.2039
|
||||||
|
@@ -2,7 +2,8 @@ CONFIG_VENDOR_SYSTEM76=y
|
|||||||
CONFIG_BOARD_SYSTEM76_GAZE16_3060_B=y
|
CONFIG_BOARD_SYSTEM76_GAZE16_3060_B=y
|
||||||
CONFIG_CCACHE=y
|
CONFIG_CCACHE=y
|
||||||
CONFIG_CONSOLE_SERIAL=n
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_HAVE_GBE_BIN=y
|
CONFIG_HAVE_GBE_BIN=y
|
||||||
CONFIG_HAVE_ME_BIN=y
|
CONFIG_HAVE_ME_BIN=y
|
||||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
|||||||
DISABLE_SERIAL_TERMINAL=TRUE
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
PLATFORM_BOOT_TIMEOUT=2
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
PS2_KEYBOARD_ENABLE=TRUE
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
SECURE_BOOT_ENABLE=TRUE
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
SERIAL_DRIVER_ENABLE=FALSE
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
SHELL_TYPE=NONE
|
SHELL_TYPE=NONE
|
||||||
TPM_ENABLE=TRUE
|
TPM_ENABLE=TRUE
|
||||||
|
BIN
models/gaze16-3060-b/me.rom
(Stored with Git LFS)
BIN
models/gaze16-3060-b/me.rom
(Stored with Git LFS)
Binary file not shown.
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user