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edk2-stabl
Author | SHA1 | Date | |
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5cb29de51a | |||
b4bee5765e | |||
5002c9ad95 | |||
1cc79f251a | |||
a50ccb32cc | |||
a9e791c905 | |||
67e7019cf1 | |||
8f6d22b801 | |||
3de6462f61 | |||
1cfc7f4744 | |||
1636f5cfda | |||
9ef787dd5a | |||
16172c99d9 | |||
3edfa21e97 | |||
fe17aa2047 | |||
6dbf9ca5ca | |||
15016a0ccd |
22
CHANGELOG.md
22
CHANGELOG.md
@ -8,7 +8,29 @@ features apply to your model and firmware version, see the
|
||||
|
||||
## unreleased
|
||||
|
||||
- tgl: Updated Intel GOP driver to 17.0.1077
|
||||
- tgl: Updated VBT to 250
|
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- Updated Rust toolchain to nightly-2024-05-11
|
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|
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## 2024-05-17
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- lemp13-b: Added initial release of open firmware with System76 EC
|
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|
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## 2024-05-07
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- darp10: Added initial release of open firmware with System76 EC
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- darp10-b: Added initial release of open firmware with System76 EC
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|
||||
## 2024-04-29
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- Fixed CMOS options not working due to invalid checksum
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## 2024-03-25
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||||
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- lemp13: Added initial release of open firmware with System76 EC
|
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|
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## 2024-03-21
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||||
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- oryp12: Added initial release of open firmware with System76 EC
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|
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## 2024-03-11
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||||
|
2
Jenkinsfile
vendored
2
Jenkinsfile
vendored
@ -7,7 +7,7 @@
|
||||
// - Pipeline (https://plugins.jenkins.io/workflow-aggregator/)
|
||||
// - Slack Notification (https://plugins.jenkins.io/slack/)
|
||||
|
||||
def all_models = 'addw2 addw3 addw4 bonw14 bonw15 darp5 darp6 darp7 darp8 darp9 galp3-c galp4 galp5 galp6 galp7 gaze15 gaze16-3050 gaze16-3060 gaze16-3060-b gaze16-3050 gaze16-3060-b gaze17-3050 gaze17-3060-b gaze18 lemp9 lemp10 lemp11 lemp12 lemp13 oryp5 oryp6 oryp7 oryp8 oryp9 oryp10 oryp11 oryp12 serw13'
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def all_models = 'addw2 addw3 addw4 bonw14 bonw15 darp5 darp6 darp7 darp8 darp9 darp10 darp10-b galp3-c galp4 galp5 galp6 galp7 gaze15 gaze16-3050 gaze16-3060 gaze16-3060-b gaze16-3050 gaze16-3060-b gaze17-3050 gaze17-3060-b gaze18 lemp9 lemp10 lemp11 lemp12 lemp13 oryp5 oryp6 oryp7 oryp8 oryp9 oryp10 oryp11 oryp12 serw13'
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|
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void setBuildStatus(String state, String message) {
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// FIXME: https://www.jenkins.io/doc/book/pipeline/jenkinsfile/#string-interpolation
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|
Submodule apps/firmware-setup updated: 927aca9b42...33bf2f3d5e
Submodule apps/firmware-update updated: 3f848a1a15...83b2ceb31b
Submodule apps/gop-policy updated: 68052ac5ff...61a9e9fad2
2
coreboot
2
coreboot
Submodule coreboot updated: 7114256ba7...792996fc8c
@ -13,16 +13,44 @@ coreboot's `cbmem` tool can be used to verify this. The call to
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||||
`FspMemoryInit()` can report 20+ seconds on the first boot, and a few hundred
|
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milliseconds on subsequent boots.
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|
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## UEFI application
|
||||
|
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This is the default method for flashing firmware (using firmware-update). When
|
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used from this repo, it only works with systems running System76 open firmware.
|
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|
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```
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./scripts/flash.sh <model>
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```
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By default the script will attempt to flash both the BIOS and the EC. Their
|
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respective file can be deleted to skip flashing them.
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If the EC is flashed, the system will immediately power off.
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|
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## Internal programmer
|
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|
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Use this method for flashing a system already running System76 Open Firmware.
|
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### Availability
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This method is only possible when firmware is unlocked. Firmware is unlocked by
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one of two methods:
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- The EC feature `CONFIG_SECURITY` is unset/disabled
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- The EC is unlock for a single boot (via firmware-update or ectool)
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The current state can be determined using ectool:
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```
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./scripts/flash.sh <model> [--without-ec]
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./ec/scripts/ectool.sh security
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```
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||||
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By default the script will attempt to flash the EC. If the EC is flashed, the
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system will immediately power off.
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- `Lock`: This method can't be used
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- `Unlock`: This method can be used
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### flashrom
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```
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sudo flashrom -p internal -w build/<model>/firmware.rom
|
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```
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## External programmer
|
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@ -31,13 +59,14 @@ Use one of these methods for first-time flashing or flashing a bricked system.
|
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### Identifying the BIOS chip
|
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The packaging and protocol can be determined by `board_info.txt` in coreboot.
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Pin 1 is marked by a small dot indent and a white paint mark. The silkscreen
|
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may also indicate pin 1.
|
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Pin 1 is sometimes marked by a small dot indent and a white paint mark. The
|
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silkscreen may also indicate pin 1.
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|
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### CH341A USB programmer - slower, but easier to set up
|
||||
|
||||
These can be purchased from many places for around 15 USD. Make sure that the
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one you get has a ROM clip. Here are some examples:
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- [Amazon.com, Organizer.](https://www.amazon.com/Organizer-Socket-Adpter-Programmer-CH341A/dp/B07R5LPTYM)
|
||||
- [Amazon.com, KeeYees.](https://www.amazon.com/KeeYees-SOIC8-EEPROM-CH341A-Programmer/dp/B07SHSL9X9)
|
||||
- [AliExpress.com, TZT.](https://aliexpress.com/item/32725360255.html)
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||||
|
2
ec
2
ec
Submodule ec updated: 38d4666a90...fc3bad29a2
2
edk2
2
edk2
Submodule edk2 updated: 88f5720e16...242dcee217
@ -8,6 +8,8 @@
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||||
- [addw4](./addw4) - System76 Adder WS (addw4)
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- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
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- [bonw15](./bonw15) - System76 Bonobo WS (bonw15)
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- [darp10](./darp10) - System76 Darter Pro (darp10)
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- [darp10-b](./darp10-b) - System76 Darter Pro (darp10-b)
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- [darp5](./darp5) - System76 Darter Pro (darp5)
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- [darp6](./darp6) - System76 Darter Pro (darp6)
|
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- [darp7](./darp7) - System76 Darter Pro (darp7)
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|
@ -1,9 +1,14 @@
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BOOTLOADER=COREBOOT
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BOOTSPLASH_IMAGE=TRUE
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BOOT_MANAGER_ESCAPE=TRUE
|
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DISABLE_SERIAL_TERMINAL=TRUE
|
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PLATFORM_BOOT_TIMEOUT=2
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PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
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||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
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VARIABLE_SUPPORT=EMU
|
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#SYSTEM76_EC_LOGGING=TRUE
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|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
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||||
SECURE_BOOT_ENABLE=TRUE
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||||
SERIAL_DRIVER_ENABLE=FALSE
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||||
SHELL_TYPE=NONE
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SIO_BUS_ENABLE=TRUE
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TPM_ENABLE=TRUE
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VARIABLE_SUPPORT=EMU
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#SYSTEM76_EC_LOGGING=TRUE
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|
@ -1,9 +1,14 @@
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||||
BOOTLOADER=COREBOOT
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||||
BOOTSPLASH_IMAGE=TRUE
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||||
BOOT_MANAGER_ESCAPE=TRUE
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||||
DISABLE_SERIAL_TERMINAL=TRUE
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||||
PLATFORM_BOOT_TIMEOUT=2
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||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
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||||
SECURE_BOOT_ENABLE=TRUE
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||||
SERIAL_DRIVER_ENABLE=FALSE
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||||
SHELL_TYPE=NONE
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||||
SIO_BUS_ENABLE=TRUE
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TPM_ENABLE=TRUE
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VARIABLE_SUPPORT=EMU
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#SYSTEM76_EC_LOGGING=TRUE
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||||
|
@ -1,9 +1,14 @@
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||||
BOOTLOADER=COREBOOT
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||||
BOOTSPLASH_IMAGE=TRUE
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||||
BOOT_MANAGER_ESCAPE=TRUE
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||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
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||||
SD_MMC_TIMEOUT=100000
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||||
SECURE_BOOT_ENABLE=TRUE
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||||
SERIAL_DRIVER_ENABLE=FALSE
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||||
SHELL_TYPE=NONE
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||||
SIO_BUS_ENABLE=TRUE
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||||
TPM_ENABLE=TRUE
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||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
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||||
|
@ -1,9 +1,14 @@
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||||
BOOTLOADER=COREBOOT
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||||
BOOTSPLASH_IMAGE=TRUE
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||||
BOOT_MANAGER_ESCAPE=TRUE
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||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
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||||
PS2_KEYBOARD_ENABLE=TRUE
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||||
SD_MMC_TIMEOUT=100000
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||||
SECURE_BOOT_ENABLE=TRUE
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||||
SERIAL_DRIVER_ENABLE=FALSE
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||||
SHELL_TYPE=NONE
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||||
SIO_BUS_ENABLE=TRUE
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||||
TPM_ENABLE=TRUE
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||||
VARIABLE_SUPPORT=EMU
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||||
#SYSTEM76_EC_LOGGING=TRUE
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||||
|
@ -1 +0,0 @@
|
||||
../addw3/AlderLakeFspBinPkg
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/darp10-b/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/darp10-b/IntelGopDriver.inf
Normal file
9
models/darp10-b/IntelGopDriver.inf
Normal file
@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
1
models/darp10-b/MeteorLakeFspBinPkg
Symbolic link
1
models/darp10-b/MeteorLakeFspBinPkg
Symbolic link
@ -0,0 +1 @@
|
||||
../lemp13/MeteorLakeFspBinPkg
|
12
models/darp10-b/README.md
Normal file
12
models/darp10-b/README.md
Normal file
@ -0,0 +1,12 @@
|
||||
# System76 Darter Pro (darp10-b)
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- Size: 16 KB
|
||||
- HAP: true
|
||||
- [ME](./me.rom)
|
||||
- Size: 10640 KB
|
||||
- Version: 18.0.5.2098
|
1
models/darp10-b/README.md.in
Normal file
1
models/darp10-b/README.md.in
Normal file
@ -0,0 +1 @@
|
||||
# System76 Darter Pro (darp10-b)
|
1
models/darp10-b/chip.txt
Normal file
1
models/darp10-b/chip.txt
Normal file
@ -0,0 +1 @@
|
||||
XM25QU256C
|
260
models/darp10-b/coreboot-collector.txt
Normal file
260
models/darp10-b/coreboot-collector.txt
Normal file
@ -0,0 +1,260 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x7D01, Revision 0x04
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x7D55, Revision 0x08
|
||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x7D03, Revision 0x04
|
||||
PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x7EC4, Revision 0x10
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x7E4C, Revision 0x20
|
||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x7D0D, Revision 0x01
|
||||
PCI Device: 0000:00:0b.0: Class 0x00120000, Vendor 0x8086, Device 0x7D1D, Revision 0x04
|
||||
PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x7EC0, Revision 0x10
|
||||
PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x7EC2, Revision 0x10
|
||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0x7D0B, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7E7D, Revision 0x20
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7E7F, Revision 0x20
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7E40, Revision 0x20
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7E78, Revision 0x20
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7E79, Revision 0x20
|
||||
PCI Device: 0000:00:15.3: Class 0x000C8000, Vendor 0x8086, Device 0x7E7B, Revision 0x20
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7E70, Revision 0x20
|
||||
PCI Device: 0000:00:16.3: Class 0x00070002, Vendor 0x8086, Device 0x7E73, Revision 0x20
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7E3D, Revision 0x20
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7E02, Revision 0x20
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x7E28, Revision 0x20
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7E22, Revision 0x20
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7E23, Revision 0x20
|
||||
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x550A, Revision 0x20
|
||||
PCI Device: 0000:2b:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
||||
PCI Device: 10000:e0:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||
PCI Device: 10000:e0:06.2: Class 0x00060400, Vendor 0x8086, Device 0x7ECB, Revision 0x10
|
||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
## GPIO ##
|
||||
MTL-H/U PCH
|
||||
GPP_V0 (0xD1,0x00) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V1 (0xD1,0x02) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V2 (0xD1,0x04) 0x40000702 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V3 (0xD1,0x06) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V4 (0xD1,0x08) 0x40000702 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V5 (0xD1,0x0A) 0x44000702 0x0003f018 0x00000000 0x00000000
|
||||
GPP_V6 (0xD1,0x0C) 0x44000702 0x0003fc19 0x00000000 0x00000000
|
||||
GPP_V7 (0xD1,0x0E) 0x44000702 0x0003fc1a 0x00000000 0x00000000
|
||||
GPP_V8 (0xD1,0x10) 0x44000702 0x0003f01b 0x00000000 0x00000000
|
||||
GPP_V9 (0xD1,0x12) 0x44000600 0x0003c01c 0x00000000 0x00000000
|
||||
GPP_V10 (0xD1,0x14) 0x44000600 0x0003c01d 0x00000000 0x00000000
|
||||
GPP_V11 (0xD1,0x16) 0x44000600 0x0003c01e 0x00000000 0x00000000
|
||||
GPP_V12 (0xD1,0x18) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_V13 (0xD1,0x1A) 0x44000600 0x0003c020 0x00000000 0x00000000
|
||||
GPP_V14 (0xD1,0x1C) 0x44000600 0x0003c021 0x00000000 0x00000000
|
||||
GPP_V15 (0xD1,0x1E) 0x44000600 0x0003c022 0x00000000 0x00000000
|
||||
GPP_V16 (0xD1,0x20) 0x44000600 0x0003c023 0x00000000 0x00000000
|
||||
GPP_V17 (0xD1,0x22) 0x44000602 0x0003c024 0x00000000 0x00000000
|
||||
GPP_V18 (0xD1,0x24) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_V19 (0xD1,0x26) 0x44000602 0x0003c026 0x00000000 0x00000000
|
||||
GPP_V20 (0xD1,0x28) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_V21 (0xD1,0x2A) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_V22 (0xD1,0x2C) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_V23 (0xD1,0x2E) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_C0 (0xD1,0x30) 0x44000600 0x0003c02b 0x00000000 0x00000000
|
||||
GPP_C1 (0xD1,0x32) 0x44000602 0x0003c02c 0x00000000 0x00000000
|
||||
GPP_C2 (0xD1,0x34) 0x44000600 0x0003c02d 0x00000000 0x00000000
|
||||
GPP_C3 (0xD1,0x36) 0x44000200 0x0003c02e 0x00000000 0x00000000
|
||||
GPP_C4 (0xD1,0x38) 0x44000200 0x0003c02f 0x00000000 0x00000000
|
||||
GPP_C5 (0xD1,0x3A) 0x44000702 0x0003f030 0x00000000 0x00000000
|
||||
GPP_C6 (0xD1,0x3C) 0x44000702 0x0003f031 0x00000000 0x00000000
|
||||
GPP_C7 (0xD1,0x3E) 0x44000200 0x00000032 0x00000800 0x00000000
|
||||
GPP_C8 (0xD1,0x40) 0x44000702 0x0003c033 0x00000000 0x00000000
|
||||
GPP_C9 (0xD1,0x42) 0x44000702 0x0003c034 0x00000000 0x00000000
|
||||
GPP_C10 (0xD1,0x44) 0x44000200 0x00000035 0x00000000 0x00000000
|
||||
GPP_C11 (0xD1,0x46) 0x04000702 0x0003c036 0x00000000 0x00000000
|
||||
GPP_C12 (0xD1,0x48) 0x04000702 0x0003c037 0x00000000 0x00000000
|
||||
GPP_C13 (0xD1,0x4A) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_C14 (0xD1,0x4C) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_C15 (0xD1,0x4E) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_C16 (0xD1,0x50) 0x44000702 0x0000003b 0x00000000 0x00000000
|
||||
GPP_C17 (0xD1,0x52) 0x44000702 0x0000003c 0x00000000 0x00000000
|
||||
GPP_C18 (0xD1,0x54) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_C19 (0xD1,0x56) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_C20 (0xD1,0x58) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_C21 (0xD1,0x5A) 0x44000700 0x00024040 0x00000000 0x00000000
|
||||
GPP_C22 (0xD1,0x5C) 0x44000700 0x00024041 0x00000000 0x00000000
|
||||
GPP_C23 (0xD1,0x5E) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_A0 (0xD2,0x00) 0x44000700 0x0003f048 0x00000000 0x00000000
|
||||
GPP_A1 (0xD2,0x02) 0x44000702 0x0003f049 0x00000000 0x00000000
|
||||
GPP_A2 (0xD2,0x04) 0x44000700 0x0003f04a 0x00000000 0x00000000
|
||||
GPP_A3 (0xD2,0x06) 0x44000700 0x0003f04b 0x00000000 0x00000000
|
||||
GPP_A4 (0xD2,0x08) 0x44000700 0x0003f04c 0x00000000 0x00000000
|
||||
GPP_A5 (0xD2,0x0A) 0x44000700 0x0003f04d 0x00000000 0x00000000
|
||||
GPP_A6 (0xD2,0x0C) 0x44000700 0x0003c04e 0x00000000 0x00000000
|
||||
GPP_A7 (0xD2,0x0E) 0x44000200 0x0000004f 0x00000000 0x00000000
|
||||
GPP_A8 (0xD2,0x10) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_A9 (0xD2,0x12) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_A10 (0xD2,0x14) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_A11 (0xD2,0x16) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_A12 (0xD2,0x18) 0x44000102 0x00000054 0x00000000 0x00000000
|
||||
GPP_A13 (0xD2,0x1A) 0x84000201 0x00003055 0x00000000 0x00000000
|
||||
GPP_A14 (0xD2,0x1C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_A15 (0xD2,0x1E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_A16 (0xD2,0x20) 0x44000702 0x0003f058 0x00000000 0x00000000
|
||||
GPP_A17 (0xD2,0x22) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_A18 (0xD2,0x24) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_A19 (0xD2,0x26) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_A20 (0xD2,0x28) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_A21 (0xD2,0x2A) 0x44000702 0x0003fc5d 0x00000000 0x00000000
|
||||
GPP_E0 (0xD2,0x32) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_E1 (0xD2,0x34) 0x40100102 0x00003061 0x00000000 0x00000000
|
||||
GPP_E2 (0xD2,0x36) 0x44000102 0x00000062 0x00000000 0x00000000
|
||||
GPP_E3 (0xD2,0x38) 0x44000102 0x00000063 0x00000000 0x00000000
|
||||
GPP_E4 (0xD2,0x3A) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_E5 (0xD2,0x3C) 0x44000200 0x00000065 0x00000000 0x00000000
|
||||
GPP_E6 (0xD2,0x3E) 0x44000200 0x00000066 0x00000800 0x00000000
|
||||
GPP_E7 (0xD2,0x40) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_E8 (0xD2,0x42) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_E9 (0xD2,0x44) 0x44000102 0x00000069 0x00000800 0x00000000
|
||||
GPP_E10 (0xD2,0x46) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_E11 (0xD2,0x48) 0x44000102 0x0000006b 0x00000000 0x00000000
|
||||
GPP_E12 (0xD2,0x4A) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_E13 (0xD2,0x4C) 0x44000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_E14 (0xD2,0x4E) 0x44000700 0x0002406e 0x00000000 0x00000000
|
||||
GPP_E15 (0xD2,0x50) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_E16 (0xD2,0x52) 0x44000b02 0x0003c070 0x00000000 0x00000000
|
||||
GPP_E17 (0xD2,0x54) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_E18 (0xD2,0x56) 0x44000200 0x00000072 0x00000000 0x00000000
|
||||
GPP_E19 (0xD2,0x58) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_E20 (0xD2,0x5A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||
GPP_E21 (0xD2,0x5C) 0x44000200 0x00000075 0x00000000 0x00000000
|
||||
GPP_E22 (0xD2,0x5E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_H0 (0xD3,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_H1 (0xD3,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_H2 (0xD3,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
|
||||
GPP_H3 (0xD3,0x06) 0x44000200 0x0000001b 0x00000000 0x00000000
|
||||
GPP_H4 (0xD3,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
|
||||
GPP_H5 (0xD3,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_H6 (0xD3,0x0C) 0x44000600 0x0000001e 0x00000000 0x00000000
|
||||
GPP_H7 (0xD3,0x0E) 0x44000600 0x0000001f 0x00000000 0x00000000
|
||||
GPP_H8 (0xD3,0x10) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_H9 (0xD3,0x12) 0x44000200 0x00000021 0x00000000 0x00000000
|
||||
GPP_H10 (0xD3,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_H11 (0xD3,0x16) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_H12 (0xD3,0x18) 0x44000200 0x00000024 0x00000000 0x00000000
|
||||
GPP_H13 (0xD3,0x1A) 0x44000600 0x0003c025 0x00000000 0x00000000
|
||||
GPP_H14 (0xD3,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_H15 (0xD3,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_H16 (0xD3,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_H17 (0xD3,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_H18 (0xD3,0x24) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_H19 (0xD3,0x26) 0x44000702 0x0000002b 0x00000000 0x00000000
|
||||
GPP_H20 (0xD3,0x28) 0x44000702 0x0000002c 0x00000000 0x00000000
|
||||
GPP_H21 (0xD3,0x2A) 0x44000702 0x0000002d 0x00000000 0x00000000
|
||||
GPP_H22 (0xD3,0x2C) 0x44000602 0x0000002e 0x00000000 0x00000000
|
||||
GPP_F0 (0xD3,0x34) 0x44000700 0x0003c030 0x00000000 0x00000000
|
||||
GPP_F1 (0xD3,0x36) 0x44000702 0x0003f031 0x00000000 0x00000000
|
||||
GPP_F2 (0xD3,0x38) 0x44000700 0x0003c032 0x00000000 0x00000000
|
||||
GPP_F3 (0xD3,0x3A) 0x44000702 0x0003f033 0x00000000 0x00000000
|
||||
GPP_F4 (0xD3,0x3C) 0x44000700 0x0003c034 0x00000000 0x00000000
|
||||
GPP_F5 (0xD3,0x3E) 0x44000d00 0x0003c035 0x00000000 0x00000000
|
||||
GPP_F6 (0xD3,0x40) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0xD3,0x42) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0xD3,0x44) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0xD3,0x46) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0xD3,0x48) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0xD3,0x4A) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0xD3,0x4C) 0x44002102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0xD3,0x4E) 0x44002102 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0xD3,0x50) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 (0xD3,0x52) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 (0xD3,0x54) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 (0xD3,0x56) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 (0xD3,0x58) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 (0xD3,0x5A) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0xD3,0x5C) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0xD3,0x5E) 0x44000200 0x00000045 0x00000800 0x00000000
|
||||
GPP_F22 (0xD3,0x60) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0xD3,0x62) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_S0 (0xD4,0x00) 0x44000200 0x01800050 0x00000000 0x00000000
|
||||
GPP_S1 (0xD4,0x02) 0x44000200 0x01800051 0x00000000 0x00000000
|
||||
GPP_S2 (0xD4,0x04) 0x44000200 0x01800052 0x00000000 0x00000000
|
||||
GPP_S3 (0xD4,0x06) 0x44000200 0x01800053 0x00000000 0x00000000
|
||||
GPP_S4 (0xD4,0x08) 0x44000200 0x01800054 0x00000000 0x00000000
|
||||
GPP_S5 (0xD4,0x0A) 0x44000200 0x01800055 0x00000000 0x00000000
|
||||
GPP_S6 (0xD4,0x0C) 0x44000200 0x01800056 0x00000000 0x00000000
|
||||
GPP_S7 (0xD4,0x0E) 0x44000200 0x01800057 0x00000000 0x00000000
|
||||
GPP_B0 (0xD5,0x00) 0x80800102 0x00000058 0x00000000 0x00000000
|
||||
GPP_B1 (0xD5,0x02) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_B2 (0xD5,0x04) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_B3 (0xD5,0x06) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_B4 (0xD5,0x08) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_B5 (0xD5,0x0A) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_B6 (0xD5,0x0C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_B7 (0xD5,0x0E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
||||
GPP_B8 (0xD5,0x10) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_B9 (0xD5,0x12) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_B10 (0xD5,0x14) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_B11 (0xD5,0x16) 0x44000b02 0x00024063 0x00000000 0x00000000
|
||||
GPP_B12 (0xD5,0x18) 0x44000700 0x0003c064 0x00000000 0x00000000
|
||||
GPP_B13 (0xD5,0x1A) 0x44000700 0x0003c065 0x00000000 0x00000000
|
||||
GPP_B14 (0xD5,0x1C) 0x44000102 0x00000066 0x00000000 0x00000000
|
||||
GPP_B15 (0xD5,0x1E) 0x44000102 0x00000067 0x00000000 0x00000000
|
||||
GPP_B16 (0xD5,0x20) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_B17 (0xD5,0x22) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_B18 (0xD5,0x24) 0x44000201 0x0000006a 0x00000000 0x00000000
|
||||
GPP_B19 (0xD5,0x26) 0x44000201 0x0000006b 0x00000000 0x00000000
|
||||
GPP_B20 (0xD5,0x28) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_B21 (0xD5,0x2A) 0x84000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_B22 (0xD5,0x2C) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_B23 (0xD5,0x2E) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D0 (0xD5,0x32) 0x44000201 0x00000070 0x00000000 0x00000000
|
||||
GPP_D1 (0xD5,0x34) 0x44000201 0x00000071 0x00000000 0x00000000
|
||||
GPP_D2 (0xD5,0x36) 0x44000201 0x00000072 0x00000000 0x00000000
|
||||
GPP_D3 (0xD5,0x38) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_D4 (0xD5,0x3A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||
GPP_D5 (0xD5,0x3C) 0x44000201 0x00000075 0x00000000 0x00000000
|
||||
GPP_D6 (0xD5,0x3E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_D7 (0xD5,0x40) 0x44000200 0x00000077 0x00000000 0x00000000
|
||||
GPP_D8 (0xD5,0x42) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_D9 (0xD5,0x44) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_D10 (0xD5,0x46) 0x44000600 0x0003c01a 0x00000000 0x00000000
|
||||
GPP_D11 (0xD5,0x48) 0x44000700 0x0003fc1b 0x00000000 0x00000000
|
||||
GPP_D12 (0xD5,0x4A) 0x44000600 0x0003fc1c 0x00000000 0x00000000
|
||||
GPP_D13 (0xD5,0x4C) 0x44000700 0x0003fc1d 0x00000000 0x00000000
|
||||
GPP_D14 (0xD5,0x4E) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_D15 (0xD5,0x50) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_D16 (0xD5,0x52) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_D17 (0xD5,0x54) 0x44000700 0x0003c021 0x00000000 0x00000000
|
||||
GPP_D18 (0xD5,0x56) 0x44000700 0x00000022 0x00000000 0x00000000
|
||||
GPP_D19 (0xD5,0x58) 0x44000700 0x00000023 0x00000000 0x00000000
|
||||
GPP_D20 (0xD5,0x5A) 0x44000702 0x00000024 0x00000000 0x00000000
|
||||
GPP_D21 (0xD5,0x5C) 0x44000b02 0x00000025 0x00000000 0x00000000
|
||||
GPP_D22 (0xD5,0x5E) 0x44000700 0x0003fc26 0x00000000 0x00000000
|
||||
GPP_D23 (0xD5,0x60) 0x44000702 0x0003fc27 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC245
|
||||
vendor_id: 0x10ec0245
|
||||
subsystem_id: 0x1558a743
|
||||
revision_id: 0x100001
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x411111f0
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40789b2d
|
||||
0x1e: 0x411111f0
|
||||
0x21: 0x04211020
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Meteor Lake HDMI
|
||||
vendor_id: 0x8086281d
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x04: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x08: 0x18560010
|
||||
0x0a: 0x18560010
|
||||
0x0b: 0x18560010
|
||||
0x0c: 0x18560010
|
||||
0x0d: 0x18560010
|
||||
0x0e: 0x18560010
|
||||
0x0f: 0x18560010
|
26
models/darp10-b/coreboot.config
Normal file
26
models/darp10-b/coreboot.config
Normal file
@ -0,0 +1,26 @@
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
CONFIG_BOARD_SYSTEM76_DARP10_B=y
|
||||
CONFIG_CCACHE=y
|
||||
CONFIG_CONSOLE_SERIAL=n
|
||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||
|
||||
# Custom FSP
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_FULL_FD=y
|
||||
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Include"
|
1
models/darp10-b/ec.config
Normal file
1
models/darp10-b/ec.config
Normal file
@ -0,0 +1 @@
|
||||
BOARD=system76/darp10-b
|
113
models/darp10-b/ecspy.txt
Normal file
113
models/darp10-b/ecspy.txt
Normal file
@ -0,0 +1,113 @@
|
||||
id 5570 rev 7
|
||||
A0: data 1 mirror 1 pot 0 control 80
|
||||
A1: data 1 mirror 1 pot 0 control 80
|
||||
A2: data 0 mirror 0 pot 0 control 00
|
||||
A3: data 0 mirror 0 pot 0 control 00
|
||||
A4: data 1 mirror 1 pot 0 control 80
|
||||
A5: data 0 mirror 0 pot 0 control 00
|
||||
A6: data 0 mirror 0 pot 0 control 00
|
||||
A7: data 0 mirror 0 pot 0 control 00
|
||||
B0: data 0 mirror 0 pot 0 control 84
|
||||
B1: data 1 mirror 1 pot 0 control 84
|
||||
B2: data 1 mirror 1 pot 0 control 84
|
||||
B3: data 1 mirror 1 pot 0 control 80
|
||||
B4: data 1 mirror 1 pot 0 control 40
|
||||
B5: data 1 mirror 1 pot 0 control 80
|
||||
B6: data 1 mirror 1 pot 0 control 40
|
||||
B7: data 1 mirror 1 pot 0 control 80
|
||||
C0: data 1 mirror 1 pot 0 control 80
|
||||
C1: data 1 mirror 1 pot 0 control 04
|
||||
C2: data 1 mirror 1 pot 0 control 04
|
||||
C3: data 0 mirror 0 pot 0 control 04
|
||||
C4: data 0 mirror 0 pot 0 control 84
|
||||
C5: data 0 mirror 0 pot 0 control 04
|
||||
C6: data 0 mirror 0 pot 0 control 80
|
||||
C7: data 1 mirror 1 pot 0 control 44
|
||||
D0: data 1 mirror 1 pot 0 control 40
|
||||
D1: data 1 mirror 1 pot 0 control 44
|
||||
D2: data 1 mirror 1 pot 0 control 00
|
||||
D3: data 1 mirror 1 pot 0 control 80
|
||||
D4: data 1 mirror 1 pot 0 control 40
|
||||
D5: data 1 mirror 1 pot 0 control 40
|
||||
D6: data 1 mirror 1 pot 0 control 02
|
||||
D7: data 1 mirror 1 pot 0 control 02
|
||||
E0: data 1 mirror 1 pot 0 control 04
|
||||
E1: data 1 mirror 1 pot 0 control 40
|
||||
E2: data 1 mirror 1 pot 0 control 80
|
||||
E3: data 1 mirror 1 pot 0 control 44
|
||||
E4: data 1 mirror 1 pot 0 control 40
|
||||
E5: data 1 mirror 1 pot 0 control 40
|
||||
E6: data 0 mirror 0 pot 0 control 80
|
||||
E7: data 1 mirror 1 pot 0 control 04
|
||||
F0: data 0 mirror 0 pot 0 control 44
|
||||
F1: data 1 mirror 1 pot 0 control 40
|
||||
F2: data 1 mirror 1 pot 0 control 44
|
||||
F3: data 1 mirror 1 pot 0 control 44
|
||||
F4: data 1 mirror 1 pot 0 control 04
|
||||
F5: data 1 mirror 1 pot 0 control 04
|
||||
F6: data 0 mirror 0 pot 0 control 00
|
||||
F7: data 1 mirror 1 pot 1 control 44
|
||||
G0: data 1 mirror 1 pot 0 control 80
|
||||
G1: data 1 mirror 1 pot 0 control 80
|
||||
G2: data 1 mirror 1 pot 0 control 80
|
||||
G3: data 0 mirror 0 pot 0 control 00
|
||||
G4: data 0 mirror 0 pot 0 control 00
|
||||
G5: data 0 mirror 0 pot 0 control 00
|
||||
G6: data 0 mirror 0 pot 0 control 40
|
||||
G7: data 0 mirror 0 pot 0 control 00
|
||||
H0: data 1 mirror 1 pot 0 control 80
|
||||
H1: data 1 mirror 1 pot 0 control 80
|
||||
H2: data 0 mirror 0 pot 0 control 44
|
||||
H3: data 1 mirror 1 pot 0 control 80
|
||||
H4: data 1 mirror 1 pot 0 control 80
|
||||
H5: data 0 mirror 0 pot 0 control 40
|
||||
H6: data 1 mirror 1 pot 0 control 80
|
||||
H7: data 1 mirror 1 pot 0 control 80
|
||||
I0: data 0 mirror 0 pot 0 control 00
|
||||
I1: data 0 mirror 0 pot 0 control 00
|
||||
I2: data 1 mirror 1 pot 0 control 84
|
||||
I3: data 0 mirror 0 pot 0 control 00
|
||||
I4: data 0 mirror 0 pot 0 control 00
|
||||
I5: data 0 mirror 0 pot 0 control 40
|
||||
I6: data 0 mirror 0 pot 0 control 00
|
||||
I7: data 0 mirror 0 pot 0 control 00
|
||||
J0: data 1 mirror 1 pot 0 control 40
|
||||
J1: data 1 mirror 1 pot 0 control 40
|
||||
J2: data 0 mirror 0 pot 0 control 00
|
||||
J3: data 0 mirror 0 pot 0 control 80
|
||||
J4: data 1 mirror 1 pot 0 control 40
|
||||
J5: data 0 mirror 0 pot 0 control 80
|
||||
J6: data 0 mirror 0 pot 0 control 44
|
||||
J7: data 0 mirror 0 pot 0 control 84
|
||||
M0: data 1 mirror 1 control 06
|
||||
M1: data 1 mirror 1 control 06
|
||||
M2: data 1 mirror 1 control 06
|
||||
M3: data 1 mirror 1 control 06
|
||||
M4: data 1 mirror 1 control 06
|
||||
M5: data 0 mirror 0 control 00
|
||||
M6: data 1 mirror 1 control 86
|
||||
M7: data 0 mirror 0 control 00
|
||||
GCR: 0x04
|
||||
GCR1: 0x00
|
||||
GCR2: 0x00
|
||||
GCR3: 0x40
|
||||
GCR4: 0x00
|
||||
GCR5: 0x00
|
||||
GCR6: 0x00
|
||||
GCR7: 0x00
|
||||
GCR8: 0x10
|
||||
GCR9: 0x20
|
||||
GCR10: 0x02
|
||||
GCR11: 0x00
|
||||
GCR12: 0x00
|
||||
GCR13: 0x00
|
||||
GCR14: 0x00
|
||||
GCR15: 0x10
|
||||
GCR16: 0x00
|
||||
GCR17: 0x00
|
||||
GCR18: 0x00
|
||||
GCR19: 0x81
|
||||
GCR20: 0x80
|
||||
GCR21: 0x66
|
||||
GCR22: 0x80
|
||||
GCR23: 0x01
|
14
models/darp10-b/edk2.config
Normal file
14
models/darp10-b/edk2.config
Normal file
@ -0,0 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp10-b/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10-b/gbe.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/gbe.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10-b/me.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10-b/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10-b/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/darp10/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/darp10/IntelGopDriver.inf
Normal file
9
models/darp10/IntelGopDriver.inf
Normal file
@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
1
models/darp10/MeteorLakeFspBinPkg
Symbolic link
1
models/darp10/MeteorLakeFspBinPkg
Symbolic link
@ -0,0 +1 @@
|
||||
../lemp13/MeteorLakeFspBinPkg
|
12
models/darp10/README.md
Normal file
12
models/darp10/README.md
Normal file
@ -0,0 +1,12 @@
|
||||
# System76 Darter Pro (darp10)
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- Size: 16 KB
|
||||
- HAP: true
|
||||
- [ME](./me.rom)
|
||||
- Size: 10640 KB
|
||||
- Version: 18.0.5.2098
|
1
models/darp10/README.md.in
Normal file
1
models/darp10/README.md.in
Normal file
@ -0,0 +1 @@
|
||||
# System76 Darter Pro (darp10)
|
1
models/darp10/chip.txt
Normal file
1
models/darp10/chip.txt
Normal file
@ -0,0 +1 @@
|
||||
XM25QU256C
|
262
models/darp10/coreboot-collector.txt
Normal file
262
models/darp10/coreboot-collector.txt
Normal file
@ -0,0 +1,262 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x7D14, Revision 0x04
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x7D55, Revision 0x08
|
||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x7D03, Revision 0x04
|
||||
PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x7EC4, Revision 0x10
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x7E4C, Revision 0x20
|
||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x7D0D, Revision 0x01
|
||||
PCI Device: 0000:00:0b.0: Class 0x00120000, Vendor 0x8086, Device 0x7D1D, Revision 0x04
|
||||
PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x7EC0, Revision 0x10
|
||||
PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x7EC2, Revision 0x10
|
||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0x7D0B, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7E7D, Revision 0x20
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7E7F, Revision 0x20
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7E40, Revision 0x20
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7E78, Revision 0x20
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7E79, Revision 0x20
|
||||
PCI Device: 0000:00:15.3: Class 0x000C8000, Vendor 0x8086, Device 0x7E7B, Revision 0x20
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7E70, Revision 0x20
|
||||
PCI Device: 0000:00:16.3: Class 0x00070002, Vendor 0x8086, Device 0x7E73, Revision 0x20
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7E3D, Revision 0x20
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7E02, Revision 0x20
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x7E28, Revision 0x20
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7E22, Revision 0x20
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7E23, Revision 0x20
|
||||
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x550A, Revision 0x20
|
||||
PCI Device: 0000:2b:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
||||
PCI Device: 10000:e0:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||
PCI Device: 10000:e0:06.1: Class 0x00060400, Vendor 0x8086, Device 0x7ECA, Revision 0x10
|
||||
PCI Device: 10000:e0:06.2: Class 0x00060400, Vendor 0x8086, Device 0x7ECB, Revision 0x10
|
||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
PCI Device: 10000:e2:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
## GPIO ##
|
||||
MTL-H/U PCH
|
||||
GPP_V0 (0xD1,0x00) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V1 (0xD1,0x02) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V2 (0xD1,0x04) 0x40000702 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V3 (0xD1,0x06) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V4 (0xD1,0x08) 0x40000702 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V5 (0xD1,0x0A) 0x44000702 0x0003f018 0x00000000 0x00000000
|
||||
GPP_V6 (0xD1,0x0C) 0x44000702 0x0003fc19 0x00000000 0x00000000
|
||||
GPP_V7 (0xD1,0x0E) 0x44000702 0x0003fc1a 0x00000000 0x00000000
|
||||
GPP_V8 (0xD1,0x10) 0x44000702 0x0003f01b 0x00000000 0x00000000
|
||||
GPP_V9 (0xD1,0x12) 0x44000600 0x0003c01c 0x00000000 0x00000000
|
||||
GPP_V10 (0xD1,0x14) 0x44000600 0x0003c01d 0x00000000 0x00000000
|
||||
GPP_V11 (0xD1,0x16) 0x44000600 0x0003c01e 0x00000000 0x00000000
|
||||
GPP_V12 (0xD1,0x18) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_V13 (0xD1,0x1A) 0x44000600 0x0003c020 0x00000000 0x00000000
|
||||
GPP_V14 (0xD1,0x1C) 0x44000600 0x0003c021 0x00000000 0x00000000
|
||||
GPP_V15 (0xD1,0x1E) 0x44000600 0x0003c022 0x00000000 0x00000000
|
||||
GPP_V16 (0xD1,0x20) 0x44000600 0x0003c023 0x00000000 0x00000000
|
||||
GPP_V17 (0xD1,0x22) 0x44000602 0x0003c024 0x00000000 0x00000000
|
||||
GPP_V18 (0xD1,0x24) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_V19 (0xD1,0x26) 0x44000602 0x0003c026 0x00000000 0x00000000
|
||||
GPP_V20 (0xD1,0x28) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_V21 (0xD1,0x2A) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_V22 (0xD1,0x2C) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_V23 (0xD1,0x2E) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_C0 (0xD1,0x30) 0x44000600 0x0003c02b 0x00000000 0x00000000
|
||||
GPP_C1 (0xD1,0x32) 0x44000602 0x0003c02c 0x00000000 0x00000000
|
||||
GPP_C2 (0xD1,0x34) 0x44000600 0x0003c02d 0x00000000 0x00000000
|
||||
GPP_C3 (0xD1,0x36) 0x44000200 0x0003c02e 0x00000000 0x00000000
|
||||
GPP_C4 (0xD1,0x38) 0x44000200 0x0003c02f 0x00000000 0x00000000
|
||||
GPP_C5 (0xD1,0x3A) 0x44000702 0x0003f030 0x00000000 0x00000000
|
||||
GPP_C6 (0xD1,0x3C) 0x44000702 0x0003f031 0x00000000 0x00000000
|
||||
GPP_C7 (0xD1,0x3E) 0x44000200 0x00000032 0x00000800 0x00000000
|
||||
GPP_C8 (0xD1,0x40) 0x44000702 0x0003c033 0x00000000 0x00000000
|
||||
GPP_C9 (0xD1,0x42) 0x44000702 0x0003c034 0x00000000 0x00000000
|
||||
GPP_C10 (0xD1,0x44) 0x44000200 0x00000035 0x00000000 0x00000000
|
||||
GPP_C11 (0xD1,0x46) 0x04000702 0x0003c036 0x00000000 0x00000000
|
||||
GPP_C12 (0xD1,0x48) 0x04000702 0x0003c037 0x00000000 0x00000000
|
||||
GPP_C13 (0xD1,0x4A) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_C14 (0xD1,0x4C) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_C15 (0xD1,0x4E) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_C16 (0xD1,0x50) 0x44000702 0x0000003b 0x00000000 0x00000000
|
||||
GPP_C17 (0xD1,0x52) 0x44000702 0x0000003c 0x00000000 0x00000000
|
||||
GPP_C18 (0xD1,0x54) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_C19 (0xD1,0x56) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_C20 (0xD1,0x58) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_C21 (0xD1,0x5A) 0x44000700 0x00024040 0x00000000 0x00000000
|
||||
GPP_C22 (0xD1,0x5C) 0x44000700 0x00024041 0x00000000 0x00000000
|
||||
GPP_C23 (0xD1,0x5E) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_A0 (0xD2,0x00) 0x44000700 0x0003f048 0x00000000 0x00000000
|
||||
GPP_A1 (0xD2,0x02) 0x44000702 0x0003f049 0x00000000 0x00000000
|
||||
GPP_A2 (0xD2,0x04) 0x44000700 0x0003f04a 0x00000000 0x00000000
|
||||
GPP_A3 (0xD2,0x06) 0x44000700 0x0003f04b 0x00000000 0x00000000
|
||||
GPP_A4 (0xD2,0x08) 0x44000700 0x0003f04c 0x00000000 0x00000000
|
||||
GPP_A5 (0xD2,0x0A) 0x44000700 0x0003f04d 0x00000000 0x00000000
|
||||
GPP_A6 (0xD2,0x0C) 0x44000700 0x0003c04e 0x00000000 0x00000000
|
||||
GPP_A7 (0xD2,0x0E) 0x44000200 0x0000004f 0x00000000 0x00000000
|
||||
GPP_A8 (0xD2,0x10) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_A9 (0xD2,0x12) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_A10 (0xD2,0x14) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_A11 (0xD2,0x16) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_A12 (0xD2,0x18) 0x44000102 0x00000054 0x00000000 0x00000000
|
||||
GPP_A13 (0xD2,0x1A) 0x84000201 0x00003055 0x00000000 0x00000000
|
||||
GPP_A14 (0xD2,0x1C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_A15 (0xD2,0x1E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_A16 (0xD2,0x20) 0x44000702 0x0003f058 0x00000000 0x00000000
|
||||
GPP_A17 (0xD2,0x22) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_A18 (0xD2,0x24) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_A19 (0xD2,0x26) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_A20 (0xD2,0x28) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_A21 (0xD2,0x2A) 0x44000702 0x0003fc5d 0x00000000 0x00000000
|
||||
GPP_E0 (0xD2,0x32) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_E1 (0xD2,0x34) 0x40100102 0x00003061 0x00000000 0x00000000
|
||||
GPP_E2 (0xD2,0x36) 0x44000100 0x00000062 0x00000000 0x00000000
|
||||
GPP_E3 (0xD2,0x38) 0x44000102 0x00000063 0x00000000 0x00000000
|
||||
GPP_E4 (0xD2,0x3A) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_E5 (0xD2,0x3C) 0x44000200 0x00000065 0x00000000 0x00000000
|
||||
GPP_E6 (0xD2,0x3E) 0x44000200 0x00000066 0x00000800 0x00000000
|
||||
GPP_E7 (0xD2,0x40) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_E8 (0xD2,0x42) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_E9 (0xD2,0x44) 0x44000102 0x00000069 0x00000800 0x00000000
|
||||
GPP_E10 (0xD2,0x46) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_E11 (0xD2,0x48) 0x44000102 0x0000006b 0x00000000 0x00000000
|
||||
GPP_E12 (0xD2,0x4A) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_E13 (0xD2,0x4C) 0x44000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_E14 (0xD2,0x4E) 0x44000700 0x0002406e 0x00000000 0x00000000
|
||||
GPP_E15 (0xD2,0x50) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_E16 (0xD2,0x52) 0x44000b02 0x0003c070 0x00000000 0x00000000
|
||||
GPP_E17 (0xD2,0x54) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_E18 (0xD2,0x56) 0x44000200 0x00000072 0x00000000 0x00000000
|
||||
GPP_E19 (0xD2,0x58) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_E20 (0xD2,0x5A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||
GPP_E21 (0xD2,0x5C) 0x44000200 0x00000075 0x00000000 0x00000000
|
||||
GPP_E22 (0xD2,0x5E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_H0 (0xD3,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_H1 (0xD3,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_H2 (0xD3,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
|
||||
GPP_H3 (0xD3,0x06) 0x44000200 0x0000001b 0x00000000 0x00000000
|
||||
GPP_H4 (0xD3,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
|
||||
GPP_H5 (0xD3,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_H6 (0xD3,0x0C) 0x44000600 0x0000001e 0x00000000 0x00000000
|
||||
GPP_H7 (0xD3,0x0E) 0x44000600 0x0000001f 0x00000000 0x00000000
|
||||
GPP_H8 (0xD3,0x10) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_H9 (0xD3,0x12) 0x44000200 0x00000021 0x00000000 0x00000000
|
||||
GPP_H10 (0xD3,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_H11 (0xD3,0x16) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_H12 (0xD3,0x18) 0x44000200 0x00000024 0x00000000 0x00000000
|
||||
GPP_H13 (0xD3,0x1A) 0x44000600 0x0003c025 0x00000000 0x00000000
|
||||
GPP_H14 (0xD3,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_H15 (0xD3,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_H16 (0xD3,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_H17 (0xD3,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_H18 (0xD3,0x24) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_H19 (0xD3,0x26) 0x44000702 0x0000002b 0x00000000 0x00000000
|
||||
GPP_H20 (0xD3,0x28) 0x44000702 0x0000002c 0x00000000 0x00000000
|
||||
GPP_H21 (0xD3,0x2A) 0x44000702 0x0000002d 0x00000000 0x00000000
|
||||
GPP_H22 (0xD3,0x2C) 0x44000602 0x0000002e 0x00000000 0x00000000
|
||||
GPP_F0 (0xD3,0x34) 0x44000700 0x0003c030 0x00000000 0x00000000
|
||||
GPP_F1 (0xD3,0x36) 0x44000702 0x0003f031 0x00000000 0x00000000
|
||||
GPP_F2 (0xD3,0x38) 0x44000700 0x0003c032 0x00000000 0x00000000
|
||||
GPP_F3 (0xD3,0x3A) 0x44000700 0x0003f033 0x00000000 0x00000000
|
||||
GPP_F4 (0xD3,0x3C) 0x44000700 0x0003c034 0x00000000 0x00000000
|
||||
GPP_F5 (0xD3,0x3E) 0x44000d00 0x0003c035 0x00000000 0x00000000
|
||||
GPP_F6 (0xD3,0x40) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0xD3,0x42) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0xD3,0x44) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0xD3,0x46) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0xD3,0x48) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0xD3,0x4A) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0xD3,0x4C) 0x44002102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0xD3,0x4E) 0x44002102 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0xD3,0x50) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 (0xD3,0x52) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 (0xD3,0x54) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 (0xD3,0x56) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 (0xD3,0x58) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 (0xD3,0x5A) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0xD3,0x5C) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0xD3,0x5E) 0x44000200 0x00000045 0x00000800 0x00000000
|
||||
GPP_F22 (0xD3,0x60) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0xD3,0x62) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_S0 (0xD4,0x00) 0x44000200 0x01800050 0x00000000 0x00000000
|
||||
GPP_S1 (0xD4,0x02) 0x44000200 0x01800051 0x00000000 0x00000000
|
||||
GPP_S2 (0xD4,0x04) 0x44000200 0x01800052 0x00000000 0x00000000
|
||||
GPP_S3 (0xD4,0x06) 0x44000200 0x01800053 0x00000000 0x00000000
|
||||
GPP_S4 (0xD4,0x08) 0x44000200 0x01800054 0x00000000 0x00000000
|
||||
GPP_S5 (0xD4,0x0A) 0x44000200 0x01800055 0x00000000 0x00000000
|
||||
GPP_S6 (0xD4,0x0C) 0x44000200 0x01800056 0x00000000 0x00000000
|
||||
GPP_S7 (0xD4,0x0E) 0x44000200 0x01800057 0x00000000 0x00000000
|
||||
GPP_B0 (0xD5,0x00) 0x80800102 0x00000058 0x00000000 0x00000000
|
||||
GPP_B1 (0xD5,0x02) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_B2 (0xD5,0x04) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_B3 (0xD5,0x06) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_B4 (0xD5,0x08) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_B5 (0xD5,0x0A) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_B6 (0xD5,0x0C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_B7 (0xD5,0x0E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
||||
GPP_B8 (0xD5,0x10) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_B9 (0xD5,0x12) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_B10 (0xD5,0x14) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_B11 (0xD5,0x16) 0x44000b02 0x00024063 0x00000000 0x00000000
|
||||
GPP_B12 (0xD5,0x18) 0x44000700 0x0003c064 0x00000000 0x00000000
|
||||
GPP_B13 (0xD5,0x1A) 0x44000700 0x0003c065 0x00000000 0x00000000
|
||||
GPP_B14 (0xD5,0x1C) 0x44000102 0x00000066 0x00000000 0x00000000
|
||||
GPP_B15 (0xD5,0x1E) 0x44000102 0x00000067 0x00000000 0x00000000
|
||||
GPP_B16 (0xD5,0x20) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_B17 (0xD5,0x22) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_B18 (0xD5,0x24) 0x44000201 0x0000006a 0x00000000 0x00000000
|
||||
GPP_B19 (0xD5,0x26) 0x44000201 0x0000006b 0x00000000 0x00000000
|
||||
GPP_B20 (0xD5,0x28) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_B21 (0xD5,0x2A) 0x84000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_B22 (0xD5,0x2C) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_B23 (0xD5,0x2E) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D0 (0xD5,0x32) 0x44000201 0x00000070 0x00000000 0x00000000
|
||||
GPP_D1 (0xD5,0x34) 0x44000201 0x00000071 0x00000000 0x00000000
|
||||
GPP_D2 (0xD5,0x36) 0x44000201 0x00000072 0x00000000 0x00000000
|
||||
GPP_D3 (0xD5,0x38) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_D4 (0xD5,0x3A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||
GPP_D5 (0xD5,0x3C) 0x44000201 0x00000075 0x00000000 0x00000000
|
||||
GPP_D6 (0xD5,0x3E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_D7 (0xD5,0x40) 0x44000200 0x00000077 0x00000000 0x00000000
|
||||
GPP_D8 (0xD5,0x42) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_D9 (0xD5,0x44) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_D10 (0xD5,0x46) 0x44000600 0x0003c01a 0x00000000 0x00000000
|
||||
GPP_D11 (0xD5,0x48) 0x44000700 0x0003fc1b 0x00000000 0x00000000
|
||||
GPP_D12 (0xD5,0x4A) 0x44000600 0x0003fc1c 0x00000000 0x00000000
|
||||
GPP_D13 (0xD5,0x4C) 0x44000700 0x0003fc1d 0x00000000 0x00000000
|
||||
GPP_D14 (0xD5,0x4E) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_D15 (0xD5,0x50) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_D16 (0xD5,0x52) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_D17 (0xD5,0x54) 0x44000700 0x0003c021 0x00000000 0x00000000
|
||||
GPP_D18 (0xD5,0x56) 0x44000700 0x00000022 0x00000000 0x00000000
|
||||
GPP_D19 (0xD5,0x58) 0x44000702 0x00000023 0x00000000 0x00000000
|
||||
GPP_D20 (0xD5,0x5A) 0x44000700 0x00000024 0x00000000 0x00000000
|
||||
GPP_D21 (0xD5,0x5C) 0x44000b02 0x00000025 0x00000000 0x00000000
|
||||
GPP_D22 (0xD5,0x5E) 0x44000700 0x0003fc26 0x00000000 0x00000000
|
||||
GPP_D23 (0xD5,0x60) 0x44000702 0x0003fc27 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC245
|
||||
vendor_id: 0x10ec0245
|
||||
subsystem_id: 0x1558a763
|
||||
revision_id: 0x100001
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x411111f0
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40789b2d
|
||||
0x1e: 0x411111f0
|
||||
0x21: 0x04211020
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Meteor Lake HDMI
|
||||
vendor_id: 0x8086281d
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x04: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x08: 0x18560010
|
||||
0x0a: 0x18560010
|
||||
0x0b: 0x18560010
|
||||
0x0c: 0x18560010
|
||||
0x0d: 0x18560010
|
||||
0x0e: 0x18560010
|
||||
0x0f: 0x18560010
|
26
models/darp10/coreboot.config
Normal file
26
models/darp10/coreboot.config
Normal file
@ -0,0 +1,26 @@
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
CONFIG_BOARD_SYSTEM76_DARP10=y
|
||||
CONFIG_CCACHE=y
|
||||
CONFIG_CONSOLE_SERIAL=n
|
||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||
|
||||
# Custom FSP
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_FULL_FD=y
|
||||
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Include"
|
1
models/darp10/ec.config
Normal file
1
models/darp10/ec.config
Normal file
@ -0,0 +1 @@
|
||||
BOARD=system76/darp10
|
113
models/darp10/ecspy.txt
Normal file
113
models/darp10/ecspy.txt
Normal file
@ -0,0 +1,113 @@
|
||||
id 5570 rev 7
|
||||
A0: data 1 mirror 1 pot 0 control 40
|
||||
A1: data 1 mirror 1 pot 0 control 80
|
||||
A2: data 0 mirror 1 pot 0 control 00
|
||||
A3: data 1 mirror 1 pot 0 control 00
|
||||
A4: data 1 mirror 1 pot 0 control 80
|
||||
A5: data 0 mirror 0 pot 0 control 00
|
||||
A6: data 0 mirror 0 pot 0 control 00
|
||||
A7: data 0 mirror 0 pot 0 control 00
|
||||
B0: data 0 mirror 0 pot 0 control 84
|
||||
B1: data 1 mirror 1 pot 0 control 84
|
||||
B2: data 1 mirror 1 pot 0 control 84
|
||||
B3: data 1 mirror 1 pot 0 control 80
|
||||
B4: data 1 mirror 1 pot 0 control 40
|
||||
B5: data 1 mirror 1 pot 0 control 80
|
||||
B6: data 1 mirror 1 pot 0 control 40
|
||||
B7: data 1 mirror 1 pot 0 control 80
|
||||
C0: data 1 mirror 1 pot 0 control 80
|
||||
C1: data 1 mirror 1 pot 0 control 04
|
||||
C2: data 1 mirror 1 pot 0 control 04
|
||||
C3: data 0 mirror 0 pot 0 control 04
|
||||
C4: data 0 mirror 0 pot 0 control 84
|
||||
C5: data 0 mirror 0 pot 0 control 04
|
||||
C6: data 0 mirror 0 pot 0 control 80
|
||||
C7: data 1 mirror 1 pot 0 control 44
|
||||
D0: data 1 mirror 1 pot 0 control 40
|
||||
D1: data 1 mirror 1 pot 0 control 44
|
||||
D2: data 1 mirror 1 pot 0 control 00
|
||||
D3: data 1 mirror 1 pot 0 control 80
|
||||
D4: data 1 mirror 1 pot 0 control 40
|
||||
D5: data 1 mirror 1 pot 0 control 40
|
||||
D6: data 0 mirror 0 pot 0 control 02
|
||||
D7: data 0 mirror 1 pot 0 control 02
|
||||
E0: data 1 mirror 1 pot 0 control 04
|
||||
E1: data 1 mirror 1 pot 0 control 40
|
||||
E2: data 1 mirror 1 pot 0 control 80
|
||||
E3: data 1 mirror 1 pot 0 control 44
|
||||
E4: data 1 mirror 1 pot 0 control 40
|
||||
E5: data 1 mirror 1 pot 0 control 40
|
||||
E6: data 0 mirror 0 pot 0 control 80
|
||||
E7: data 1 mirror 1 pot 0 control 04
|
||||
F0: data 0 mirror 0 pot 0 control 44
|
||||
F1: data 1 mirror 1 pot 0 control 40
|
||||
F2: data 1 mirror 1 pot 0 control 44
|
||||
F3: data 1 mirror 1 pot 0 control 44
|
||||
F4: data 0 mirror 0 pot 0 control 04
|
||||
F5: data 1 mirror 1 pot 0 control 04
|
||||
F6: data 0 mirror 0 pot 0 control 00
|
||||
F7: data 1 mirror 1 pot 1 control 44
|
||||
G0: data 1 mirror 1 pot 0 control 80
|
||||
G1: data 1 mirror 1 pot 0 control 80
|
||||
G2: data 1 mirror 1 pot 0 control 80
|
||||
G3: data 0 mirror 0 pot 0 control 00
|
||||
G4: data 0 mirror 0 pot 0 control 00
|
||||
G5: data 0 mirror 0 pot 0 control 00
|
||||
G6: data 0 mirror 0 pot 0 control 40
|
||||
G7: data 0 mirror 0 pot 0 control 00
|
||||
H0: data 1 mirror 1 pot 0 control 80
|
||||
H1: data 1 mirror 1 pot 0 control 80
|
||||
H2: data 0 mirror 0 pot 0 control 44
|
||||
H3: data 1 mirror 1 pot 0 control 80
|
||||
H4: data 1 mirror 1 pot 0 control 80
|
||||
H5: data 0 mirror 0 pot 0 control 40
|
||||
H6: data 1 mirror 1 pot 0 control 80
|
||||
H7: data 1 mirror 1 pot 0 control 80
|
||||
I0: data 0 mirror 0 pot 0 control 00
|
||||
I1: data 0 mirror 0 pot 0 control 00
|
||||
I2: data 1 mirror 1 pot 0 control 84
|
||||
I3: data 0 mirror 0 pot 0 control 00
|
||||
I4: data 0 mirror 0 pot 0 control 00
|
||||
I5: data 0 mirror 0 pot 0 control 40
|
||||
I6: data 0 mirror 0 pot 0 control 00
|
||||
I7: data 0 mirror 0 pot 0 control 00
|
||||
J0: data 1 mirror 1 pot 0 control 40
|
||||
J1: data 1 mirror 1 pot 0 control 40
|
||||
J2: data 0 mirror 0 pot 0 control 00
|
||||
J3: data 0 mirror 0 pot 0 control 80
|
||||
J4: data 1 mirror 1 pot 0 control 40
|
||||
J5: data 0 mirror 0 pot 0 control 80
|
||||
J6: data 0 mirror 0 pot 0 control 44
|
||||
J7: data 1 mirror 1 pot 0 control 84
|
||||
M0: data 1 mirror 1 control 06
|
||||
M1: data 1 mirror 1 control 06
|
||||
M2: data 1 mirror 1 control 06
|
||||
M3: data 1 mirror 1 control 06
|
||||
M4: data 0 mirror 1 control 06
|
||||
M5: data 0 mirror 0 control 00
|
||||
M6: data 1 mirror 1 control 86
|
||||
M7: data 0 mirror 0 control 00
|
||||
GCR: 0x04
|
||||
GCR1: 0x00
|
||||
GCR2: 0x00
|
||||
GCR3: 0x40
|
||||
GCR4: 0x00
|
||||
GCR5: 0x00
|
||||
GCR6: 0x00
|
||||
GCR7: 0x00
|
||||
GCR8: 0x10
|
||||
GCR9: 0x20
|
||||
GCR10: 0x02
|
||||
GCR11: 0x00
|
||||
GCR12: 0x00
|
||||
GCR13: 0x00
|
||||
GCR14: 0x00
|
||||
GCR15: 0x10
|
||||
GCR16: 0x00
|
||||
GCR17: 0x00
|
||||
GCR18: 0x00
|
||||
GCR19: 0x81
|
||||
GCR20: 0x80
|
||||
GCR21: 0x66
|
||||
GCR22: 0x80
|
||||
GCR23: 0x01
|
14
models/darp10/edk2.config
Normal file
14
models/darp10/edk2.config
Normal file
@ -0,0 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp10/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10/gbe.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10/gbe.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10/me.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/darp7/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/darp7/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/darp7/vbt.rom
(Stored with Git LFS)
BIN
models/darp7/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1 +0,0 @@
|
||||
../oryp11/AlderLakeFspBinPkg
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/galp5/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/galp5/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/galp5/vbt.rom
(Stored with Git LFS)
BIN
models/galp5/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1 +0,0 @@
|
||||
../oryp11/AlderLakeFspBinPkg
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/gaze16-3050/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/gaze16-3050/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/gaze16-3050/vbt.rom
(Stored with Git LFS)
BIN
models/gaze16-3050/vbt.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/gaze16-3060-b/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/gaze16-3060-b/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/gaze16-3060-b/vbt.rom
(Stored with Git LFS)
BIN
models/gaze16-3060-b/vbt.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/gaze16-3060/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/gaze16-3060/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/gaze16-3060/vbt.rom
(Stored with Git LFS)
BIN
models/gaze16-3060/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1 +0,0 @@
|
||||
../oryp11/AlderLakeFspBinPkg
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/lemp10/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/lemp10/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/lemp10/vbt.rom
(Stored with Git LFS)
BIN
models/lemp10/vbt.rom
(Stored with Git LFS)
Binary file not shown.
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
@ -1 +0,0 @@
|
||||
../oryp11/AlderLakeFspBinPkg
|
@ -1,9 +1,14 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
BOOTSPLASH_IMAGE=TRUE
|
||||
BOOT_MANAGER_ESCAPE=TRUE
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SD_MMC_TIMEOUT=100000
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
SIO_BUS_ENABLE=TRUE
|
||||
TPM_ENABLE=TRUE
|
||||
VARIABLE_SUPPORT=EMU
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
||||
|
BIN
models/lemp13-b/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/lemp13-b/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/lemp13-b/IntelGopDriver.inf
Normal file
9
models/lemp13-b/IntelGopDriver.inf
Normal file
@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
6489
models/lemp13-b/MeteorLakeFspBinPkg/Fsp.bsf
Normal file
6489
models/lemp13-b/MeteorLakeFspBinPkg/Fsp.bsf
Normal file
File diff suppressed because it is too large
Load Diff
BIN
models/lemp13-b/MeteorLakeFspBinPkg/Fsp.fd
(Stored with Git LFS)
Normal file
BIN
models/lemp13-b/MeteorLakeFspBinPkg/Fsp.fd
(Stored with Git LFS)
Normal file
Binary file not shown.
114
models/lemp13-b/MeteorLakeFspBinPkg/FspPkgPcdShare.dsc
Normal file
114
models/lemp13-b/MeteorLakeFspBinPkg/FspPkgPcdShare.dsc
Normal file
@ -0,0 +1,114 @@
|
||||
## @file
|
||||
# Platform description for DynamicEx PCDs, defined in FSP Package
|
||||
# and shared with Board Package.
|
||||
#
|
||||
# @copyright
|
||||
# INTEL CONFIDENTIAL
|
||||
# Copyright 2018 - 2021 Intel Corporation.
|
||||
#
|
||||
# The source code contained or described herein and all documents related to the
|
||||
# source code ("Material") are owned by Intel Corporation or its suppliers or
|
||||
# licensors. Title to the Material remains with Intel Corporation or its suppliers
|
||||
# and licensors. The Material may contain trade secrets and proprietary and
|
||||
# confidential information of Intel Corporation and its suppliers and licensors,
|
||||
# and is protected by worldwide copyright and trade secret laws and treaty
|
||||
# provisions. No part of the Material may be used, copied, reproduced, modified,
|
||||
# published, uploaded, posted, transmitted, distributed, or disclosed in any way
|
||||
# without Intel's prior express written permission.
|
||||
#
|
||||
# No license under any patent, copyright, trade secret or other intellectual
|
||||
# property right is granted to or conferred upon you by disclosure or delivery
|
||||
# of the Materials, either expressly, by implication, inducement, estoppel or
|
||||
# otherwise. Any license under such intellectual property rights must be
|
||||
# express and approved by Intel in writing.
|
||||
#
|
||||
# Unless otherwise agreed by Intel in writing, you may not remove or alter
|
||||
# this notice or any other notice embedded in Materials by Intel or
|
||||
# Intel's suppliers or licensors in any way.
|
||||
#
|
||||
# This file contains an 'Intel Peripheral Driver' and is uniquely identified as
|
||||
# "Intel Reference Module" and is licensed for Intel CPUs and chipsets under
|
||||
# the terms of your license agreement with Intel or your vendor. This file may
|
||||
# be modified by the user, subject to additional terms of the license agreement.
|
||||
#
|
||||
# @par Specification
|
||||
##
|
||||
|
||||
[PcdsDynamicExDefault]
|
||||
|
||||
## Specifies max supported number of Logical Processors.
|
||||
# @Prompt Configure max supported number of Logical Processorss
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
|
||||
|
||||
gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|0xC0000000
|
||||
gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
|
||||
|
||||
## Specifies the base address of the first microcode Patch in the microcode Region.
|
||||
# @Prompt Microcode Region base address.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0
|
||||
|
||||
## Specifies the size of the microcode Region.
|
||||
# @Prompt Microcode Region size.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0
|
||||
|
||||
## Specifies the AP wait loop state during POST phase.
|
||||
# The value is defined as below.
|
||||
# 1: Place AP in the Hlt-Loop state.
|
||||
# 2: Place AP in the Mwait-Loop state.
|
||||
# 3: Place AP in the Run-Loop state.
|
||||
# @Prompt The AP wait loop state.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2
|
||||
|
||||
## Specifies the AP target C-state for Mwait during POST phase.
|
||||
# The default value 0 means C1 state.
|
||||
# The value is defined as below.<BR><BR>
|
||||
# @Prompt The specified AP target C-state for Mwait.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0
|
||||
|
||||
#
|
||||
# Enable ACPI S3 support in FSP by default
|
||||
#
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable|1
|
||||
|
||||
## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
|
||||
# @Prompt The pointer to a CPU S3 data buffer.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x00
|
||||
|
||||
## As input, specifies user's desired settings for enabling/disabling processor features.
|
||||
## As output, specifies actual settings for processor features, each bit corresponding to a specific feature.
|
||||
# @Prompt As input, specifies user's desired processor feature settings. As output, specifies actual processor feature settings.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
|
||||
|
||||
## Contains the size of memory required when CPU processor trace is enabled.<BR><BR>
|
||||
# Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
|
||||
# @Prompt The memory size used for processor trace if processor trace is enabled.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0
|
||||
|
||||
## Contains the processor trace output scheme when CPU processor trace is enabled.<BR><BR>
|
||||
# Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
|
||||
# @Prompt The processor trace output scheme used when processor trace is enabled.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0
|
||||
|
||||
## Indicates processor feature capabilities, each bit corresponding to a specific feature.
|
||||
# @Prompt Processor feature capabilities.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
|
||||
|
||||
# Set SEV-ES defaults
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
|
||||
|
||||
## This dynamic PCD hold an address to point to private data structure used in DxeS3BootScriptLib library
|
||||
# instance which records the S3 boot script table start address, length, etc. To introduce this PCD is
|
||||
# only for DxeS3BootScriptLib instance implementation purpose. The platform developer should make sure the
|
||||
# default value is set to Zero. And the PCD is assumed ONLY to be accessed in DxeS3BootScriptLib Library.
|
||||
# @Prompt S3 Boot Script Table Private Data pointer.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0
|
||||
|
||||
## This dynamic PCD hold an address to point to private data structure SMM copy used in DxeS3BootScriptLib library
|
||||
# instance which records the S3 boot script table start address, length, etc. To introduce this PCD is
|
||||
# only for DxeS3BootScriptLib instance implementation purpose. The platform developer should make sure the
|
||||
# default value is set to Zero. And the PCD is assumed ONLY to be accessed in DxeS3BootScriptLib Library.
|
||||
# @Prompt S3 Boot Script Table Private Smm Data pointer.
|
||||
# @ValidList 0x80000001 | 0x0
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateSmmDataPtr|0
|
@ -0,0 +1,55 @@
|
||||
/** @file
|
||||
Intel Firmware Version Info (FVI) related definitions.
|
||||
|
||||
@todo update document/spec reference
|
||||
|
||||
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
@par Specification Reference:
|
||||
System Management BIOS (SMBIOS) Reference Specification v3.0.0 dated 2015-Feb-12
|
||||
http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.0.0.pdf
|
||||
|
||||
**/
|
||||
|
||||
#ifndef __FIRMWARE_VERSION_INFO_H__
|
||||
#define __FIRMWARE_VERSION_INFO_H__
|
||||
|
||||
#include <IndustryStandard/SmBios.h>
|
||||
|
||||
#define INTEL_FIRMWARE_VERSION_INFO_GROUP_NAME "Firmware Version Info"
|
||||
#define INTEL_FVI_SMBIOS_TYPE 0xDD
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
///
|
||||
/// Firmware Version Structure
|
||||
///
|
||||
typedef struct {
|
||||
UINT8 MajorVersion;
|
||||
UINT8 MinorVersion;
|
||||
UINT8 Revision;
|
||||
UINT16 BuildNumber;
|
||||
} INTEL_FIRMWARE_VERSION;
|
||||
|
||||
///
|
||||
/// Firmware Version Info (FVI) Structure
|
||||
///
|
||||
typedef struct {
|
||||
SMBIOS_TABLE_STRING ComponentName; ///< String Index of Component Name
|
||||
SMBIOS_TABLE_STRING VersionString; ///< String Index of Version String
|
||||
INTEL_FIRMWARE_VERSION Version; ///< Firmware version
|
||||
} INTEL_FIRMWARE_VERSION_INFO;
|
||||
|
||||
///
|
||||
/// SMBIOS OEM Type Intel Firmware Version Info (FVI) Structure
|
||||
///
|
||||
typedef struct {
|
||||
SMBIOS_STRUCTURE Header; ///< SMBIOS structure header
|
||||
UINT8 Count; ///< Number of FVI entries in this structure
|
||||
INTEL_FIRMWARE_VERSION_INFO Fvi[1]; ///< FVI structure(s)
|
||||
} SMBIOS_TABLE_TYPE_OEM_INTEL_FVI;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
@ -0,0 +1,80 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
**/
|
||||
#ifndef _FSP_PRODUCER_DATA_HEADER_H_
|
||||
#define _FSP_PRODUCER_DATA_HEADER_H_
|
||||
|
||||
#include <Guid/FspHeaderFile.h>
|
||||
|
||||
#define BUILD_TIME_STAMP_SIZE 12
|
||||
|
||||
//
|
||||
// FSP Header Data structure from FspHeader driver.
|
||||
//
|
||||
#pragma pack(1)
|
||||
///
|
||||
/// FSP Producer Data Subtype - 1
|
||||
///
|
||||
typedef struct {
|
||||
///
|
||||
/// Byte 0x00: Length of this FSP producer data type record.
|
||||
///
|
||||
UINT16 Length;
|
||||
///
|
||||
/// Byte 0x02: FSP producer data type.
|
||||
///
|
||||
UINT8 Type;
|
||||
///
|
||||
/// Byte 0x03: Revision of this FSP producer data type.
|
||||
///
|
||||
UINT8 Revision;
|
||||
///
|
||||
/// Byte 0x04: 4 byte field of RC version which is used to build this FSP image.
|
||||
///
|
||||
UINT32 RcVersion;
|
||||
///
|
||||
/// Byte 0x08: Represents the build time stamp "YYYYMMDDHHMM".
|
||||
///
|
||||
UINT8 BuildTimeStamp[BUILD_TIME_STAMP_SIZE];
|
||||
} FSP_PRODUCER_DATA_TYPE1;
|
||||
|
||||
///
|
||||
/// FSP Producer Data Subtype - 2
|
||||
///
|
||||
typedef struct {
|
||||
///
|
||||
/// Byte 0x00: Length of this FSP producer data type record.
|
||||
///
|
||||
UINT16 Length;
|
||||
///
|
||||
/// Byte 0x02: FSP producer data type.
|
||||
///
|
||||
UINT8 Type;
|
||||
///
|
||||
/// Byte 0x03: Revision of this FSP producer data type.
|
||||
///
|
||||
UINT8 Revision;
|
||||
///
|
||||
/// Byte 0x04: 4 byte field of Mrc version which is used to build this FSP image.
|
||||
///
|
||||
UINT8 MrcVersion [4];
|
||||
} FSP_PRODUCER_DATA_TYPE2;
|
||||
|
||||
typedef struct {
|
||||
FSP_INFO_HEADER FspInfoHeader;
|
||||
FSP_INFO_EXTENDED_HEADER FspInfoExtendedHeader;
|
||||
FSP_PRODUCER_DATA_TYPE1 FspProduceDataType1;
|
||||
FSP_PRODUCER_DATA_TYPE2 FspProduceDataType2;
|
||||
FSP_PATCH_TABLE FspPatchTable;
|
||||
} FSP_PRODUCER_DATA_TABLES;
|
||||
#pragma pack()
|
||||
|
||||
#endif // _FSP_PRODUCER_DATA_HEADER_H
|
48
models/lemp13-b/MeteorLakeFspBinPkg/Include/FspUpd.h
Normal file
48
models/lemp13-b/MeteorLakeFspBinPkg/Include/FspUpd.h
Normal file
@ -0,0 +1,48 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
* Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright notice, this
|
||||
list of conditions and the following disclaimer in the documentation and/or
|
||||
other materials provided with the distribution.
|
||||
* Neither the name of Intel Corporation nor the names of its contributors may
|
||||
be used to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
This file is automatically generated. Please do NOT modify !!!
|
||||
|
||||
**/
|
||||
|
||||
#ifndef __FSPUPD_H__
|
||||
#define __FSPUPD_H__
|
||||
|
||||
#include <FspEas.h>
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
#define FSPT_UPD_SIGNATURE 0x545F4450554C544D /* 'MTLUPD_T' */
|
||||
|
||||
#define FSPM_UPD_SIGNATURE 0x4D5F4450554C544D /* 'MTLUPD_M' */
|
||||
|
||||
#define FSPS_UPD_SIGNATURE 0x535F4450554C544D /* 'MTLUPD_S' */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
5134
models/lemp13-b/MeteorLakeFspBinPkg/Include/FspmUpd.h
Normal file
5134
models/lemp13-b/MeteorLakeFspBinPkg/Include/FspmUpd.h
Normal file
File diff suppressed because it is too large
Load Diff
4577
models/lemp13-b/MeteorLakeFspBinPkg/Include/FspsUpd.h
Normal file
4577
models/lemp13-b/MeteorLakeFspBinPkg/Include/FspsUpd.h
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user