Update kudu6 chip

.github/ISSUE_TEMPLATE/bug_report.md

@@ -10,7 +10,6 @@ assignees: []
 - BIOS version: <!-- `cat /sys/class/dmi/id/bios_version` (e.g.: 2021-09-30_14b8a6e)-->
 - EC version: <!-- This will match the BIOS version unless you flashed it separately. -->
 - OS: <!-- e.g.: Pop!_OS 21.10, Fedora 35, Windows 11 -->
-- Kernel: <!-- `uname -r` (e.g.: 6.0.6-76060006-generic) -->
 
 <!-- Briefly describe the problem. -->
 

.gitmodules

@@ -6,10 +6,30 @@
 	path = coreboot
 	url = https://github.com/system76/coreboot.git
 	branch = system76
+[submodule "edk2-platforms"]
+	path = edk2-platforms
+	url = https://github.com/system76/edk2-platforms.git
+	branch = system76
 [submodule "tools/UEFITool"]
 	path = tools/UEFITool
 	url = https://github.com/LongSoft/UEFITool.git
 	branch = new_engine
+[submodule "libs/intelflash"]
+	path = libs/intelflash
+	url = https://gitlab.redox-os.org/redox-os/intelflash.git
+	branch = master
+[submodule "libs/uefi"]
+	path = libs/uefi
+	url = https://gitlab.redox-os.org/redox-os/uefi.git
+	branch = master
+[submodule "libs/coreboot-table"]
+	path = libs/coreboot-table
+	url = https://gitlab.redox-os.org/redox-os/coreboot-table.git
+	branch = master
+[submodule "libs/intel-spi"]
+	path = libs/intel-spi
+	url = https://github.com/system76/intel-spi.git
+	branch = master
 [submodule "tools/coreboot-collector"]
 	path = tools/coreboot-collector
 	url = https://github.com/system76/coreboot-collector.git
@@ -26,10 +46,26 @@
 	path = tools/MEAnalyzer
 	url = https://github.com/platomav/MEAnalyzer.git
 	branch = master
+[submodule "libs/coreboot-fs"]
+	path = libs/coreboot-fs
+	url = https://gitlab.redox-os.org/redox-os/coreboot-fs.git
+	branch = master
 [submodule "apps/gop-policy"]
 	path = apps/gop-policy
 	url = https://github.com/system76/gop-policy.git
 	branch = master
+[submodule "edk2-non-osi"]
+	path = edk2-non-osi
+	url = https://github.com/tianocore/edk2-non-osi.git
+	branch = devel-MinPlatform
+[submodule "FSP"]
+	path = FSP
+	url = https://github.com/IntelFsp/FSP.git
+	branch = master
+[submodule "apps/firmware-smmstore"]
+	path = apps/firmware-smmstore
+	url = https://github.com/system76/firmware-smmstore.git
+	branch = master
 [submodule "tools/ipxe"]
 	path = tools/ipxe
 	url = https://github.com/ipxe/ipxe.git
@@ -42,3 +78,7 @@
 	path = tools/apobtool
 	url = https://github.com/system76/apobtool.git
 	branch = master
+[submodule "tools/PSPTool"]
+	path = tools/PSPTool
+	url = https://github.com/PSPReverse/PSPTool.git
+	branch = master

CHANGELOG.md

@@ -1,202 +1,32 @@
-# System76 Open Firmware Changelog
+# Changelog
 
 Changes are identified by the date of the released firmware including them. If
 you are running System76 Open Firmware, opening the boot menu will show this
-date followed by an underscore and a short git revision. To see if specific
+date followed by an underscore and a short git revision.
-features apply to your model and firmware version, see the
-[feature matrix](./FEATURES.md).
-
-## unreleased
-
-- tgl-u: Fixed CPU not going lower than C2 due to card reader LTR
-- bonw15: Fixed speaker audio cutting in/out
-- oryp11: Fixed speaker audio cutting in/out
-
-## 2023-10-13
-
-- tgl-u: Fixed potential EC lock up during opportunistic suspend
-- galp5: Fixed CPU not going lower than C2 due to card reader LTR
-
-## 2023-09-19
-
-- rpl-hx: Added support for 5600 MHz RAM
-
-## 2023-09-08
-
-- adl: Updated CSME to 16.1.25.2124
-- adl,rpl: Fixed SMMSTORE init sometimes failing
-- Increased key debounce from 5ms to 10ms
-
-## 2023-08-23
-
-- rpl: Fixed RPL-S GPIO driver on Windows
-
-## 2023-08-18
-
-- cml-u: Fixed boot failing at FSP-S
-- Added KBC reset on CPU reset to prevent keyboard from being locked
-- Enabled power switch Watch Dog Timer with a timeout of 10 seconds
-- Fixed detecting if PECI is available on eSPI systems using S0ix
-- Added support for a FnLock key
-- tgl: Fixed Bluetooth performance by enabling audio offload
-- gaze16: Fixed CPU not going lower than C2 due to card reader LTR
-- adl: Fixed CPU not going lower than C2 due to card reader LTR
-- rpl: Fixed CPU not going lower than C2 due to card reader LTR
-- Changed battery charge start threshold to 90%
-- Changed charger to disable when battery is full
-
-## 2023-07-19
-
-- bonw14: Fixed loading CPU microcode
-- rpl-hx: Fixed setting PL1 and PL2 power limits
-- rpl-hx: Fixed LPM substates
-- gaze17: Removed invalid RTD3 configs
-- oryp10: Removed invalid RTD3 configs
-- galp8: Removed SATA RTD3 to fix drives being lost on suspend
-- lemp11: Removed SATA RTD3 to fix drives being lost on suspend
-- Reduced key debounce from 15ms to 5ms
-- galp6: Fixed fan tachometer GPIOs
-- lemp9: Fixed fan tachometer GPIOs
-- lemp10: Fixed fan tachometer GPIOs
-- lemp11: Fixed fan tachometer GPIOs
-
-## 2023-07-10
-
-- Updated Secure Boot DBX to version 371 (2023-05-09)
-- bonw15: Added initial release of open firmware with System76 EC
-- oryp11: Changed adapter Rsense to 10 milliohms
-- serw13: Changed adapter Rsense to 10 milliohms
-
-## 2023-06-22
-
-- addw3: Enabled support for 5200 MT/s memory
-- serw13: Enabled support for 5200 MT/s memory
-- oryp11: Added initial release of open firmware with System76 EC
-- rpl: Enabled TPM read delay to fix occasional failures with Infineon chips
-- Changed TPM behavior to perform TPM Restart if TPM Resume fails
-
-## 2023-06-08
-
-- darp9: Added initial release of open firmware with System76 EC
-- Added detection of RGB keyboards at runtime
-- oryp9: Enabled firmware security
-- oryp9: Enabled NVIDIA Dynamic Boost
-- oryp10: Enabled firmware security
-- oryp10: Enabled NVIDIA Dynamic Boost
-- Invalidated CMOS checksum after flashing to ensure default options are used
-
-## 2023-05-25
-
-- Set PL4 based on AC state for all boards
-- Increased PL4 on battery to 45W for dGPU boards
-- galp6: Enabled firmware security
-- galp7: Added initial release of open firmware with System76 EC
-
-## 2023-05-17
-
-- serw13: Added initial release of open firmware with System76 EC
-- Fixed Windows BSoD on RPL-HX
-
-## 2023-05-16
-
-- lemp12: Added initial release of open firmware with System76 EC
-
-## 2023-04-28
-
-- addw3: Added initial release of open firmware with System76 EC
-
-## 2023-03-22
-
-- Updated coreboot to upstream commit decbf7b4d975
-- Enabled support for Secure Boot
-- Enabled minimal UI for enforcing Secure Boot and resetting keys
-- Added firmware locking support
-- Enabled S3 suspend on everything but TGL-U
-- Disabled ME by default on everything but TGL-U
-- Added support for NVIDIA Dynamic Boost
-- gaze18: Added initial release of open firmware with System76 EC
-
-## 2022-11-21
-
-- lemp11: Added workaround to force S0ix entry on suspend
-- tgl-u: Removed CPU PCIe RP RTD3 config to fix suspend with certain drives
-- adl-p: Removed CPU PCIe RP RTD3 config to fix suspend with certain drives
-- adl-p: Fixed ACPI brightness controls on Windows 10 and Linux 6.1
-- adl-p: Disabled SATA DevSlp to fix S0ix entry
-- tgl-u: Disabled SATA DevSlp to fix S0ix entry
-- Updated Rust toolchain to nightly-2022-03-18
-- adl-p: Added workaround to force S0ix entry on suspend
-- adl-p: Fixed case where system gets stuck in S5 due to power loss
-- tgl-u: Fixed case where system gets stuck in S5 due to power loss
-- galp5: Fixed power off failing due to WLAN GPIO
-
-## 2022-10-14
-
-- Fixed smart charger values for all boards
-- Fixed keyboard backlight color with custom values
-- lemp11: Removed RTD3 config for card reader to fix suspend
-
-## 2022-09-26
-
-- oryp8: Fixed brightness controls on Windows
-- oryp10: Added initial release of open firmware with System76 EC
-
-## 2022-09-07
-
-- Updated CSME for TGL-H to 15.0.41.2158
-- Updated CSME for TGL-U to 15.0.41.2158
-- Changed build to use coreboot toolchain for edk2
-- Fixed signal used to detect S0ix
-- Fixed off-by-one for battery charging start/stop thresholds
-
-## 2022-08-03
-
-- Updated coreboot to upstream commit 37bf8c6dd590
-- Updated TGL-U microcode to revision 0xa4 from Intel's public repo
-- Updated TGL-H microcode to revision 0x3e from Intel's public repo
-- Updated ADL microcode to revision 0x41c from Intel's public repo
-- Updated ADL FSP to C.0.69.74 from Intel's public repo
-- Updated CSME for ADL-P to 16.0.15.1810v8 (16.0.15.1829)
-- Fixed uncommon I2C HID initialization failure on boot
-- Fixed smart charger values for all boards
-- galp6: Added initial release of open firmware with System76 EC
-
-## 2022-07-27
-
-- gaze17-3050: Added initial release of open firmware with System76 EC
-- gaze17-3060: Fixed suspend with WD drives
-
-## 2022-07-20
-
-- oryp9: Added initial release of open firmware with System76 EC
-
-## 2022-07-13
-
-- darp8: Fixed power off under load while on battery power
 
 ## 2022-07-05
 
-- lemp11: Added initial release of open firmare with System76 EC
+- lemp11: Fix power off under load while on battery power
+
+## 2022-06-29
+
+- lemp11: Release of open firmare with System76 EC
 
 ## 2022-06-23
 
-- darp8: Added initial release of open firmware with System76 EC
+- darp8: Release of open firmware with System76 EC
 
 ## 2022-06-07
 
 - Fixed building for QEMU
 - Updated coreboot to upstream commit 670572ff6a
-- Fixed NVIDIA subsystem ID being lost on suspend
-- TGL: Fixed Device Manager warning about missing drivers for Tiger Lake IPC
-  Controller and System76 EC ACPI devices
 - Improved NVIDIA Optimus support
-- tgl-u: Fixed suspend with certain drives
+- gaze17-3060-b: Release of open firmware with System76 EC
-- gaze17-3060-b: Added initial release of open firmware with System76 EC
 
 ## 2022-02-15
 
-- Updated ME for all supported systems
+- Update ME for all supported systems
-- Ensured that system powers off S5 plane if it fails to reach S0
+- Ensure that system powers off S5 plane if it fails to reach S0
 
 ## 2022-01-06
 
@@ -204,7 +34,7 @@ features apply to your model and firmware version, see the
 - Enabled coreboot measured boot
 - Updated Rust toolchain to nightly-2021-06-15
 - Updated coreboot to 4.15
-- Updated EDK2 to edk2-stable202108
+- Updated EDK2 to edk2-stabke202108
 - Updated TGL-U microcode blobs to revision 0x9a
 - Updated TGL-H microcode blobs to revision 0x3c
 - Updated all other boards to use microcode blobs from Intel's public repo
@@ -213,23 +43,23 @@ features apply to your model and firmware version, see the
 
 ## 2021-09-30
 
-- gaze16: Removed need to unplug the AC adapter after flashing
+- gaze16: Do not require unplugging the AC adapter after flashing
-- gaze16: Fixed using USB 2.0 devices in Type-C port
+- gaze16: Fix using USB 2.0 devices in Type-C port
 
 ## 2021-09-23
 
-- oryp8: Added initial release of open firmware with System76 EC
+- oryp8: Release of open firmware with System76 EC
-- gaze16: Fixed input current on 3050 variant
+- gaze16: Fix input current on 3050 variant
-- gaze16: Fixed power limit when booting on battery
+- gaze16: Fix power limit when booting on battery
-- gaze16: Fixed touchpad on newer Linux kernel and Windows
+- gaze16: Fix touchpad on newer Linux kernel and Windows
-- Fixed brightness controls on TGL platforms
+- Fix brightness controls on TGL platforms
-- Fixed PCIe subsystem IDs on TGL platforms
+- Fix PCIe subsystem IDs on TGL platforms
-- Fixed spurious clearing of boot options on Windows
+- Fix spurious clearing of boot options on Windows
-- Added battery cycle count
+- Provide battery cycle count
 
 ## 2021-07-20
 
-- gaze16: Added initial release of open firmware with System76 EC
+- gaze16: Release of open firmware with System76 EC
 - Improved thermals by syncing CPU and GPU fans
 - Enabled fan speed interpolation
 - Fixed ACPI timeout on S3 resume if a key is held
@@ -239,148 +69,142 @@ features apply to your model and firmware version, see the
 
 ## 2021-04-07
 
-- tgl-u: Updated microcode
+- darp7, galp5, lemp10: Update microcode
 
 ## 2021-04-02
 
-- Fixed fan max keeping fan on when in S0iX
+- Fix fan max keeping fan on when in S0iX
-- Changed keyboard behavior to report all keys as released when lid is closed
+- Report all keys as released when lid is closed
 
 ## 2021-03-19
 
-- gaze15: Added initial release of open firmware with System76 EC
+- gaze15: Release of open firmware with System76 EC
-- gaze15: Added ELAN touchpad settings
+- gaze15: Add ELAN touchpad settings
 
 ## 2021-03-16
 
-- oryp6: Fixed buzzing at lowest fan speed
+- oryp6, oryp7: Fix buzzing at lowest fan speed
-- oryp7: Fixed buzzing at lowest fan speed
 
 ## 2021-03-11
 
-- lemp9: Fixed backlight ACPI issues and TPM interrupt
+- lemp9: Fix backlight ACPI issues and TPM interrupt
 
 ## 2021-03-08
 
-- oryp6: Improved fan curve
+- oryp6, oryp7: Improved fan curve
-- oryp7: Improved fan curve
 
 ## 2021-03-03
 
-- oryp7: Added initial release of open firmware with System76 EC
+- oryp7: Release of open firmware with System76 EC
 
 ## 2021-02-15
 
-- darp7: Increased HDMI data rate to support 4K@60Hz
+- darp7, galp5: Raise HDMI data rate to support 4K@60Hz
-- galp5: Increased HDMI data rate to support 4K@60Hz
 
 ## 2021-02-09
 
-- galp5: Fixed GPU driver crash in compute graphics mode
+- galp5: Fix GPU driver crash in compute graphics mode
 
 ## 2021-02-05
 
-- darp7: Fixed keyboard scanning glitches
+- darp7: Fix keyboard scanning glitches
 
 ## 2021-01-21
 
-- darp7: Added initial release of open firmware with System76 EC
+- darp7: Release of open firmware with System76 EC
 
 ## 2021-01-19
 
-- Added behavior to update boot options on device hotplug
+- Update boot options on device hotplug
-- Added fan toggle key (Fn+1)
+- Add fan toggle key (Fn+1)
-- Added behavior to clear NVRAM when CMOS battery is removed
+- Clear NVRAM when CMOS battery is removed
-- galp5: Fixed NVRAM compacting
+- galp5, lemp10: Fix NVRAM compacting
-- lemp10: Fixed NVRAM compacting
 
 ## 2021-12-15
 
-- galp5: Added support for variant with NVIDIA GPU
+- galp5: Support variant with NVIDIA GPU
 
 ## 2020-12-04
 
-- galp5: Added initial release of open firmware with System76 EC
+- galp5, lemp10: Release of open firmware with System76 EC
-- lemp10: Added initial release of open firmware with System76 EC
 
 ## 2020-10-19
 
-- Added support for customizing keyboard at runtime
+- Support customizing keyboard at runtime
-- Added battery charging thresholds
+- Add battery charging thresholds
-- oryp6: Fixed smart charger values
+- oryp6: Fix smart charger values
-- Prevented wake when lid is closed
+- Prevent wake when lid is closed
 
 ## 2020-09-22
 
-- darp6: Added initial release of open firmware with System76 EC
+- darp6: Release of open firmware with System76 EC
-- darp6: Fixed allocation of memory type range registers
+- darp6: Fix allocation of memory type range registers
 
 ## 2020-09-17
 
-- Enabled Wake-on-Lan (on supported models)
+- Enable Wake-on-Lan (on supported models)
-- Added ACPI thermal interface
+- Add ACPI thermal interface
-- Fixed ESXi keyboard issue
+- Fix ESXi keyboard issue
 
 ## 2020-09-03
 
-- addw2: Added initial release of open firmware with System76 EC
+- addw2: Release of open firmware with System76 EC
 
 ## 2020-08-24
 
-- bonw14: Added initial release of open firmware with System76 EC
+- bonw14: Release of open firmware with System76 EC
 
 ## 2020-08-13
 
-- Added UEFI TPM2 support
+- Add UEFI TPM2 support
 
 ## 2020-08-06
 
-- Enabled ACPI backlight
+- Enable ACPI backlight
-- Added firmware configuration information
+- Add firmware configuration information
 
 ## 2020-07-06
 
-- oryp6: Added initial release of open firmware with System76 EC
+- oryp6: Release of open firmware with System76 EC
 
 ## 2020-05-20
 
-- Added warning if no bootable media is found
+- Warn if no bootable media is found
 
 ## 2020-05-15
 
-- Enabled i2c-hid touchpad interface
+- Enable i2c-hid touchpad interface
 
 ## 2020-05-07
 
-- Fixed ghost key debouncing
+- Fix ghost key debouncing
 
 ## 2020-05-04
 
-- Improved ghost key handling and reduce key debounce
+- Improve ghost key handling and reduce key debounce
 
 ## 2020-04-23
 
-- Fixed duplicate release of key after release of function key
+- Fix duplicate release of key after release of function key
 
 ## 2020-04-18
 
-- lemp9: Updated fan curve
+- lemp9: Update fan curve
 
 ## 2020-04-09
 
-- lemp9: Added initial release of open firmware with System76 EC
+- lemp9: Release of open firmware with System76 EC
 
 ## 2020-02-05
 
-- Changed boot manager to use descriptive device names
+- Use descriptive device names
-- Changed boot manager to only show bootable devices
+- Only show bootable devices
 
 ## 2020-01-13
 
-- Fixed NVIDIA eGPU issues
+- Fix NVIDIA eGPU issues
-- Improved boot order editing
+- Iimprove boot order editing
 
 ## 2019-10-31
 
-- darp6: Added intial release of open firmware with proprietary EC
+- darp6, galp4: Release of open firmware with proprietary EC
-- galp4: Added intial release of open firmware with proprietary EC

FEATURES.md

@@ -1,190 +0,0 @@
-# System76 Open Firmware Feature Matrix
-
-This lists important features provided by System76 Open Firmware. Your system
-must be updated to at least the firmware version specified in the following
-[platform tables](#platforms) to include all specified [features](#features).
-To see the changes in specific firmware versions, see the
-[changelog](./CHANGELOG.md).
-
-## Platforms
-
-- [Intel 13th Gen (Raptor Lake)](#intel-13th-gen-raptor-lake)
-- [Intel 12th Gen (Alder Lake)](#intel-12th-gen-alder-lake)
-- [Intel 11th Gen (Tiger Lake)](#intel-11th-gen-tiger-lake)
-- [Intel 10th Gen (Comet Lake)](#intel-10th-gen-comet-lake)
-
-### Intel 13th Gen (Raptor Lake)
-
-This generation universally supports these features with up-to-date firmware:
-
-- [Intel VT-x](#intel-vt-x)
-- [Intel VT-d](#intel-vt-d)
-- [Disabled Management Engine](#disabled-management-engine)
-- [TPM 2.0 Support](#tpm-20-support)
-- [Battery Charging Thresholds](#battery-charging-thresholds)
-- [Keyboard Customization](#keyboard-customization)
-- [Measured Boot](#measured-boot)
-- [Firmware Security System](#firmware-security-system)
-- [Secure Boot Support](#secure-boot-support)
-
-| System76 Model (Version) | Firmware Version    | SoC    | [Windows 11 Support](#windows-11-support) | [NVIDIA Dynamic Boost](#nvidia-dynamic-boost) |
-|--------------------------|---------------------|--------|-----|-----|
-| Adder WS (addw3)         | 2023-05-17\_9560b2e | RPL-HX | ✔   | ✔   |
-| Bonobo WS (bonw15)       | 2023-07-10\_0e4a64a | RPL-HX | ✔   | ✔   |
-| Darter Pro (darp9)       | 2023-06-08\_a8590a5 | RPL-P  | ✔   | N/A |
-| Galago Pro (galp7)       | 2023-05-25\_5608a8d | RPL-H  | ✔   | N/A |
-| Gazelle (gaze18)         | 2023-03-22\_799ed79 | RPL-H  | ✔   | ✔   |
-| Lemur Pro (lemp12)       | 2023-05-16\_e9b9ea8 | RPL-U  | ✔   | N/A |
-| Oryx Pro (oryp11)        | 2023-06-22\_e5c3632 | RPL-H  | ✔   | ✔   |
-| Serval WS (serw13)       | 2023-05-17\_9560b2e | RPL-HX | ✔   | ✔   |
-
-### Intel 12th Gen (Alder Lake)
-
-This generation universally supports these features with up-to-date firmware:
-
-- [Intel VT-x](#intel-vt-x)
-- [Intel VT-d](#intel-vt-d)
-- [TPM 2.0 Support](#tpm-20-support)
-- [Battery Charging Thresholds](#battery-charging-thresholds)
-- [Keyboard Customization](#keyboard-customization)
-- [Measured Boot](#measured-boot)
-
-| System76 Model (Version) | Firmware Version    | SoC    |
-|--------------------------|---------------------|--------|
-| Darter Pro (darp8)       | 2022-11-21\_b337ac6 | ADL-P  |
-| Galago Pro (galp6)       | 2022-11-21\_b337ac6 | ADL-P  |
-| Gazelle (gaze17-3050)    | 2022-11-21\_b337ac6 | ADL-H  |
-| Gazelle (gaze17-3060-b)  | 2022-06-07\_090f9e0 | ADL-H  |
-| Lemur Pro (lemp11)       | 2022-11-21\_b337ac6 | ADL-U  |
-| Oryx Pro (oryp9)         | 2022-07-20\_ae6aa72 | ADL-H  |
-| Oryx Pro (oryp10)        | 2022-09-26\_aa797d2 | ADL-H  |
-
-### Intel 11th Gen (Tiger Lake)
-
-This generation universally supports these features with up-to-date firmware:
-
-- [Intel VT-x](#intel-vt-x)
-- [Intel VT-d](#intel-vt-d)
-- [TPM 2.0 Support](#tpm-20-support)
-- [Battery Charging Thresholds](#battery-charging-thresholds)
-- [Keyboard Customization](#keyboard-customization)
-
-| System76 Model (Version) | Firmware Version    | SoC    | [Measured Boot](#measured-boot) |
-|--------------------------|---------------------|--------|----|
-| Darter Pro (darp7)       | 2022-11-21\_b337ac6 | TGL-U  | ✔️  |
-| Galago Pro (galp5)       | 2022-11-21\_b337ac6 | TGL-U  | ✔️  |
-| Gazelle (gaze16-3050)    | 2022-11-21\_b337ac6 | TGL-H  | ✔️  |
-| Gazelle (gaze16-3060)    | 2021-09-30\_14b8a6e | TGL-H  | ❌ |
-| Gazelle (gaze16-3060-b)  | 2021-11-01\_fb9d759 | TGL-H  | ❌ |
-| Lemur Pro (lemp10)       | 2022-11-21\_b337ac6 | TGL-U  | ✔️  |
-| Oryx Pro (oryp8)         | 2022-10-14\_4136ef8 | TGL-H  | ✔️  |
-
-### Intel 10th Gen (Comet Lake)
-
-This generation universally supports these features with up-to-date firmware:
-
-- [Intel VT-x](#intel-vt-x)
-- [Intel VT-d](#intel-vt-d)
-- [Disabled Management Engine](#disabled-management-engine)
-- [TPM 2.0 Support](#tpm-20-support)
-- [Battery Charging Thresholds](#battery-charging-thresholds)
-- [Keyboard Customization](#keyboard-customization)
-
-| System76 Model (Version) | Firmware Version    | SoC    | [Measured Boot](#measured-boot) |
-|--------------------------|---------------------|--------|----|
-| Adder WS (addw2)         | 2022-11-21\_b337ac6 | CML-H  | ✔️  |
-| Bonobo WS (bonw14)       | 2021-07-20\_93c2809 | CML-S  | ❌ |
-| Darter Pro (darp6)       | 2021-07-20\_93c2809 | CML-U  | ❌ |
-| Gazelle (gaze15)         | 2022-11-21\_b337ac6 | CML-H  | ✔️  |
-| Lemur Pro (lemp9)        | 2021-07-20\_93c2809 | CML-U  | ❌ |
-| Oryx Pro (oryp6)         | 2021-07-20\_93c2809 | CML-H  | ❌ |
-| Oryx Pro (oryp7)         | 2022-11-21\_b337ac6 | CML-H  | ✔️  |
-
-## Features
-
-### Intel VT-x
-
-Intel Virtualization Technology is enabled, which provides support for high
-performance virtual machines.
-
-### Intel VT-d
-
-Intel Virtualization Technology for Directed I/O is enabled, which provides
-support for passing PCIe devices to virtual machines, and for protecting against
-PCIe device craches and DMA attacks.
-
-### Disabled Management Engine
-
-The Intel Management Engine is disabled at runtime to improve security.
-
-### TPM 2.0 Support
-
-**Introduced in firmware version 2020-08-13.**
-
-A discrete TPM 2.0 is available for use.
-
-### Battery Charging Thresholds
-
-**Introduced in firmware version 2020-10-19.**
-
-Battery charging thresholds extend the life of the battery by reducing the
-maximum charge that the battery is charged to, as well as the minimum charge
-when charging the battery begins.
-
-### Keyboard Customization
-
-**Introduced in firmware version 2020-10-19.**
-
-Keyboard customization allows the keyboard layout to be modified at runtime
-using the
-[System76 Keyboard Configurator](https://github.com/pop-os/keyboard-configurator/).
-
-### Measured Boot
-
-**Introduced in firmware version 2022-01-06.**
-
-Measured boot uses the TPM to maintain hashes of all binaries used in the boot
-process. This allows for detecting changes to the firmware, which can be used
-by a system such as TPM2-TOTP or BitLocker to improve security.
-
-### Firmware Security System
-
-**Introduced in firmware version 2023-04-03.**
-
-The firmware security system ensures both SoC and EC firmware is read-only at
-runtime. Unlocking the firmware requires the system to reboot and physical
-presence is required. The user must enter in a secure, randomly generated number
-before the system can boot any third-party code while unlocked. Both EC firmware
-and system firmware are locked on any boots where the prompt is not shown. For
-screenshots showing this prompt, see the pull request here:
-https://github.com/system76/firmware-setup/pull/18
-
-### Secure Boot Support
-
-**Introduced in firmware version 2023-04-03.**
-
-A new firmware setup menu allows enabling and disabling Secure Boot and also
-allows for entering setup mode for custom key enrollment. Work is being done in
-Pop!\_OS to enable the use of custom secure boot keys, in addition to adding
-TPM2-TOTP authentication of the firmware boot path. For screenshots showing the
-new menus, see the pull request here:
-https://github.com/system76/edk2/pull/38
-
-### Windows 11 Support
-
-**Introduced in firmware version 2023-04-03.**
-
-Windows 11 requires [TPM 2.0 Support](#tpm-20-support) and
-[Secure Boot Support](#secure-boot-support). For users wanting to use Windows, the use of Windows 11 is
-recommended for Intel 12th Generation (Alder Lake) and newer systems, as it
-includes a new scheduler that supports the efficiency cores.
-
-### NVIDIA Dynamic Boost
-
-**Introduced in firmware version 2023-04-03.**
-
-On new systems with the NVIDIA 4000 series GPUs, NVIDIA Dynamic Boost has been
-enabled with new code in coreboot. This allows power to be shared between the
-CPU and GPU, diverting power to the subsystem that needs it most. This can
-provide an additional 25W boost split between the CPU and GPU depending on the
-task, significantly improving throughput and framerates.

Jenkinsfile

@@ -1,129 +0,0 @@
-#!/usr/bin/env groovy
-
-// Required plugins:
-// - Jenkins Core
-// - AnsiColor (https://plugins.jenkins.io/ansicolor/)
-// - Git (https://plugins.jenkins.io/git/)
-// - Pipeline (https://plugins.jenkins.io/workflow-aggregator/)
-// - Slack Notification (https://plugins.jenkins.io/slack/)
-
-def all_models = 'addw2 addw3 bonw14 bonw15 darp5 darp6 darp7 darp8 darp9 galp3-c galp4 galp5 galp6 galp7 gaze15 gaze16-3050 gaze16-3060 gaze16-3060-b gaze16-3050 gaze16-3060-b gaze17-3050 gaze17-3060-b gaze18 lemp9 lemp10 lemp11 lemp12 oryp5 oryp6 oryp7 oryp8 oryp9 oryp10 oryp11 serw13'
-
-void setBuildStatus(String state, String message) {
-    // FIXME: https://www.jenkins.io/doc/book/pipeline/jenkinsfile/#string-interpolation
-    sh """
-    curl \
-      -X POST \
-      -H \'Accept: application/vnd.github+json\' \
-      -H \'Authorization: Bearer ${GITHUB_TOKEN}\' \
-      -H \'X-GitHub-Api-Version: 2022-11-28\' \
-      https://api.github.com/repos/system76/firmware-open/statuses/${GIT_COMMIT} \
-      -d \'{\"state\": \"${state}\", \"target_url\": \"${BUILD_URL}\", \"description\": \"${message}\"}\'
-    """
-}
-
-pipeline {
-    agent {
-        label 'warp.pop-os.org'
-    }
-
-    environment {
-        GITHUB_TOKEN = credentials('github-commit-status')
-    }
-
-    options {
-        buildDiscarder(logRotator(numToKeepStr: '16', artifactNumToKeepStr: '1'))
-        disableConcurrentBuilds()
-        timeout(time: 1, unit: 'HOURS')
-        timestamps()
-        ansiColor('xterm')
-    }
-
-    parameters {
-        string(name: 'MODELS', defaultValue: "$all_models", description: 'Space separated list of models to build', trim: true)
-        string(name: 'SOURCE_BRANCH', defaultValue: 'master', description: 'Git branch or revision to build', trim: true)
-    }
-
-    triggers {
-        pollSCM('')
-    }
-
-    stages {
-        stage('Prepare') {
-            steps {
-                setBuildStatus("pending", "Pending")
-                slackSend(color: "good", message: "${env.JOB_NAME} - #${env.BUILD_ID} started (<${env.BUILD_URL}|Open>)")
-
-                // https://www.jenkins.io/doc/pipeline/steps/params/scmgit/
-                checkout scmGit(
-                    branches: [[name: '${SOURCE_BRANCH}']],
-                    extensions: [
-                        lfs(),
-                        pruneStaleBranch(),
-                        pruneTags(true),
-                        submodule(
-                            parentCredentials: true,
-                            recursiveSubmodules: true,
-                            reference: ''
-                        ),
-                    ],
-                    userRemoteConfigs: [[url: 'https://github.com/system76/firmware-open.git']]
-                )
-
-                sh """#!/bin/bash
-                    # Install dependencies
-                    #./scripts/install-deps.sh
-                    . "${HOME}/.cargo/env"
-
-                    # Reset
-                    git submodule update --init --recursive --checkout
-                    git reset --hard
-                    git submodule foreach --recursive git reset --hard
-
-                    # Clean
-                    git clean -dffx
-                    git submodule foreach --recursive git clean -dff
-
-                    # EDK2 builds fail if file paths in INFs change from what's in the build cache
-                    pushd edk2; git clean -dffx; popd
-                """
-            }
-        }
-        stage('Build') {
-            steps {
-                // The workspace is reused, so must build models sequentially.
-                script {
-                    def list = params.MODELS.tokenize()
-                    list.each { model ->
-                        stage(model) {
-                            sh """#!/bin/bash
-                                . "${HOME}/.cargo/env"
-                                # WORSKSPACE is set by Jenkins, but EDK2 uses it
-                                env --unset=WORKSPACE \
-                                ./scripts/build.sh "${model}"
-                            """
-                        }
-                    }
-                }
-            }
-        }
-    }
-
-    post {
-        always {
-            archiveArtifacts artifacts: 'build/*/*', allowEmptyArchive: true
-        }
-        success {
-            setBuildStatus("success", "Successful")
-            slackSend(color: "good", message: "${env.JOB_NAME} - #${env.BUILD_ID} successful after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
-        }
-        failure {
-            setBuildStatus("failure", "Failed")
-            slackSend(color: "danger", message: "${env.JOB_NAME} - #${env.BUILD_ID} failed after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
-        }
-        aborted {
-            setBuildStatus("failure", "Failed")
-            slackSend(color: "warning", message: "${env.JOB_NAME} - #${env.BUILD_ID} aborted after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
-        }
-    }
-}

README.md

@@ -3,11 +3,26 @@
 An open source distribution of firmware utilizing coreboot, EDK2, and System76
 firmware applications.
 
-## Supported models and features
+## Supported models
 
-To view models that are supported and will receive updates through the firmware
+These models are supported and will receive updates through the firmware
-manager, as well as available features for those models, please see the
+manager:
-[feature matrix](./FEATURES.md).
+
+- addw2
+- bonw14
+- darp6
+- darp7
+- galp4
+- galp5
+- gaze15
+- gaze16-3050
+- gaze16-3060
+- gaze16-3060-b
+- lemp9
+- lemp10
+- oryp6
+- oryp7
+- oryp8
 
 Other models may be in development or available without support, and can be
 seen in the `models/` directory.
@@ -32,8 +47,8 @@ For a list of important changes please see the [changelog](./CHANGELOG.md).
 
 Dependencies can be installed with the provided script.
 
-```sh
+```
-./scripts/install-deps.sh
+./scripts/deps.sh
 ```
 
 If rustup was installed for the first time, it will be required to source the

apps/README.md

@@ -3,5 +3,6 @@
 ## Contents
 
 - [firmware-setup](https://github.com/system76/firmware-setup.git) - System76 Firmware Setup
+- [firmware-smmstore](https://github.com/system76/firmware-smmstore.git) - System76 Firmware SMMSTORE
 - [firmware-update](https://github.com/system76/firmware-update.git) - System76 Firmware Update
 - [gop-policy](https://github.com/system76/gop-policy.git) - System76 Platform GOP Policy

docs/adding-a-new-board.md

@@ -61,16 +61,12 @@ If the microcode blobs from coreboot will not be used, then `microcode.rom`
 must be generated for the correct CPU set from the private [intel-microcode]
 repo.
 
-Other things that should be dumped before porting/flashing are:
-
-- The kernel log (`dmesg`)
-- DMI info (`dmidecode`)
-- ACPI tables (`acpidump -b`)
-
 ## Porting coreboot
 
 To port coreboot to a new board, see the coreboot documentation.
 
+- [TAS5825M] smart amp
+
 Once coreboot is ported, add its configuration.
 
 ```
@@ -82,19 +78,6 @@ cp coreboot/.config models/<model>/coreboot.config
 `generate.sh` does not create `devicetree.cb`. Some values for this file can be
 produced using the `devicetree.py` script.
 
-### Smart amp
-
-Boards may have a smart amp, which must be configured for speaker output to
-work.
-
-The initialization data for Realtek smart amps can be dumped from the module
-that does the codec init in proprietary firmware. The correct module can be
-found using UEFITool by searching for the vendor/device ID of the codec, such
-as "10ec1220" for the ALC1220. This is the start of the `cim_verb_data` array
-in coreboot.
-
-For info on the TI TAS5825M smart amp, see the [smart-amp] repo.
-
 ## Configuring Intel CSME
 
 The CSME image may need to be regenerated. Common changes that may be required
@@ -117,4 +100,4 @@ READMEs.
 [external-programmer]: ./flashing.md#external-programmer
 [intel-microcode]: https://github.com/system76/intel-microcode
 [mega2560]: https://github.com/system76/ec/blob/master/doc/mega2560.md
-[smart-amp]: https://github.com/system76/smart-amp
+[TAS5825M]: https://github.com/system76/smart-amp

docs/debugging.md

@@ -52,8 +52,8 @@ A couple of methods can be used to get debug logging.
 
 This method requires no soldering of board components.
 
-See [Debugging the EC firmware](https://github.com/system76/ec/blob/master/docs/debugging.md)
+See [Debugging the EC firmware](./ec/doc/debugging.md) for details on setting
-for details on setting up EC debugging over the parallel port.
+up EC debugging over the parallel port.
 
 cbmem output can be passed through the EC by enabling the driver in coreboot.
 Uncomment the config in `models/<model>/coreboot.config` to enable logging the

docs/flashing.md

@@ -31,8 +31,8 @@ Use one of these methods for first-time flashing or flashing a bricked system.
 ### Identifying the BIOS chip
 
 The packaging and protocol can be determined by `board_info.txt` in coreboot.
-Pin 1 is marked by a small dot indent and a white paint mark. The silkscreen
+Laptops use a SOIC-8 package for the SPI flash ROM. Pin 1 is marked by a small
-may also indicate pin 1.
+dot indent and a white paint mark. The silkscreen may also indicate pin 1.
 
 ### CH341A USB programmer - slower, but easier to set up
 

docs/intel-me.md

@@ -27,34 +27,6 @@ A restart is required for the change to take effect. On the boot after changing
 the value, the system will perform a global reset (power off again) to complete
 the change and ensure the IME is operating in a valid state.
 
-### Checking the state
-
-coreboot will log some IME data to cbmem during startup. This can be used to
-check if it is in the correct state.
-
-```
-make -C coreboot/util/cbmem
-sudo ./coreboot/util/cbmem/cbmem -c
-```
-
-When disabled it will report:
-
-```
-ME: Current Working State       : 4
-ME: Current Operation State     : 1
-ME: Current Operation Mode      : 3
-ME: Error Code                  : 2
-```
-
-When enabled it will report:
-
-```
-ME: Current Working State       : 5
-ME: Current Operation State     : 1
-ME: Current Operation Mode      : 0
-ME: Error Code                  : 0
-```
-
 ## Tiger Lake-U
 
 Models using TGL-U processors default to having the IME enabled. TGL-U removes

libs/README.md

@@ -0,0 +1,9 @@
+# Libraries
+
+## Contents
+
+- [coreboot-fs](https://gitlab.redox-os.org/redox-os/coreboot-fs.git) - coreboot-fs
+- [coreboot-table](https://gitlab.redox-os.org/redox-os/coreboot-table.git) - coreboot-table
+- [intelflash](https://gitlab.redox-os.org/redox-os/intelflash.git) - intelflash
+- [intel-spi](https://github.com/system76/intel-spi.git) - intel-spi
+- [uefi](https://gitlab.redox-os.org/redox-os/uefi.git) - Redox UEFI

libs/README.md.in

@@ -0,0 +1 @@
+# Libraries

models/README.md

@@ -4,22 +4,17 @@
 
 - [addw1](./addw1) - System76 Adder Workstation (addw1)
 - [addw2](./addw2) - System76 Adder WS (addw2)
-- [addw3](./addw3) - System76 Adder WS (addw3)
 - [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
-- [bonw15](./bonw15) - System76 Bonobo WS (bonw15)
 - [darp5](./darp5) - System76 Darter Pro (darp5)
 - [darp6](./darp6) - System76 Darter Pro (darp6)
 - [darp7](./darp7) - System76 Darter Pro (darp7)
 - [darp8](./darp8) - System76 Darter Pro (darp8)
-- [darp9](./darp9) - System76 Darter Pro (darp9)
 - [galp2](./galp2) - System76 Galago Pro (galp2)
 - [galp3](./galp3) - System76 Galago Pro (galp3)
 - [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
 - [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
 - [galp4](./galp4) - System76 Galago Pro (galp4)
 - [galp5](./galp5) - System76 Galago Pro (galp5)
-- [galp6](./galp6) - System76 Galago Pro (galp6)
-- [galp7](./galp7) - System76 Galago Pro (galp7)
 - [gaze14_1650](./gaze14_1650) - System76 Gazelle (gaze14)
 - [gaze14_1660ti](./gaze14_1660ti) - System76 Gazelle (gaze14)
 - [gaze15](./gaze15) - System76 Gazelle (gaze15)
@@ -28,17 +23,13 @@
 - [gaze16-3060-b](./gaze16-3060-b) - System76 Gazelle (gaze16)
 - [gaze17-3050](./gaze17-3050) - System76 Gazelle (gaze17)
 - [gaze17-3060-b](./gaze17-3060-b) - System76 Gazelle (gaze17-3060-b)
-- [gaze18](./gaze18) - System76 Gazelle (gaze18)
+- [kudu6](./kudu6) - System76 Kudu (kudu6)
 - [lemp10](./lemp10) - System76 Lemur Pro (lemp10)
 - [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
-- [lemp12](./lemp12) - System76 Lemur Pro (lemp12)
 - [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
-- [oryp10](./oryp10) - System76 Oryx Pro (oryp10)
-- [oryp11](./oryp11) - System76 Oryx Pro (oryp11)
 - [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
 - [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
 - [oryp7](./oryp7) - System76 Oryx Pro (oryp7)
 - [oryp8](./oryp8) - System76 Oryx Pro (oryp8)
-- [oryp9](./oryp9) - System76 Oryx Pro (oryp9)
 - [qemu](./qemu) - QEMU (Virtualization)
-- [serw13](./serw13) - System76 Serval WS (serw13)
+- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)

models/addw1/coreboot.config

@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
 CONFIG_USE_OPTION_TABLE=y

models/addw1/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=230b1cbc-6df5-437a-a364-b61f9fa6a4f6
-EC_FMP_UUID=45a6839a-1666-40e3-8e90-103de469f025

models/addw2/coreboot.config

@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
 CONFIG_USE_OPTION_TABLE=y

models/addw2/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=baaca94e-b8e8-4357-acb9-35819eeba12b
-EC_FMP_UUID=3e21b09a-c90c-43b7-a9e9-07704264d44a

models/addw3/AlderLakeFspBinPkg/Include/FsptUpd.h

@@ -1,357 +0,0 @@
-/** @file
-
-Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice, this
-  list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice, this
-  list of conditions and the following disclaimer in the documentation and/or
-  other materials provided with the distribution.
-* Neither the name of Intel Corporation nor the names of its contributors may
-  be used to endorse or promote products derived from this software without
-  specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-  THE POSSIBILITY OF SUCH DAMAGE.
-
-  This file is automatically generated. Please do NOT modify !!!
-
-**/
-
-#ifndef __FSPTUPD_H__
-#define __FSPTUPD_H__
-
-#include <FspUpd.h>
-
-#pragma pack(1)
-
-
-/** Fsp T Core UPD
-**/
-typedef struct {
-
-/** Offset 0x0040
-**/
-  UINT32                      MicrocodeRegionBase;
-
-/** Offset 0x0044
-**/
-  UINT32                      MicrocodeRegionSize;
-
-/** Offset 0x0048
-**/
-  UINT32                      CodeRegionBase;
-
-/** Offset 0x004C
-**/
-  UINT32                      CodeRegionSize;
-
-/** Offset 0x0050
-**/
-  UINT8                       Reserved[16];
-} FSPT_CORE_UPD;
-
-/** Fsp T Configuration
-**/
-typedef struct {
-
-/** Offset 0x0060 - PcdSerialIoUartDebugEnable
-  Enable SerialIo Uart debug library with/without initializing SerialIo Uart device in FSP.
-  0:Disable, 1:Enable and Initialize, 2:Enable without Initializing
-**/
-  UINT8                       PcdSerialIoUartDebugEnable;
-
-/** Offset 0x0061 - PcdSerialIoUartNumber
-  Select SerialIo Uart Controller for debug. Note: If UART0 is selected as CNVi BT
-  Core interface, it cannot be used for debug purpose.
-  0:SerialIoUart0, 1:SerialIoUart1, 2:SerialIoUart2
-**/
-  UINT8                       PcdSerialIoUartNumber;
-
-/** Offset 0x0062 - PcdSerialIoUartMode - FSPT
-  Select SerialIo Uart Controller mode
-  0:SerialIoUartDisabled, 1:SerialIoUartPci, 2:SerialIoUartHidden, 3:SerialIoUartCom,
-  4:SerialIoUartSkipInit
-**/
-  UINT8                       PcdSerialIoUartMode;
-
-/** Offset 0x0063
-**/
-  UINT8                       Rsvd00;
-
-/** Offset 0x0064 - PcdSerialIoUartBaudRate - FSPT
-  Set default BaudRate Supported from 0 - default to 6000000
-**/
-  UINT32                      PcdSerialIoUartBaudRate;
-
-/** Offset 0x0068 - Pci Express Base Address
-  Base address to be programmed for Pci Express
-**/
-  UINT64                      PcdPciExpressBaseAddress;
-
-/** Offset 0x0070 - Pci Express Region Length
-  Region Length to be programmed for Pci Express
-**/
-  UINT32                      PcdPciExpressRegionLength;
-
-/** Offset 0x0074 - PcdSerialIoUartParity - FSPT
-  Set default Parity.
-  0: DefaultParity, 1: NoParity, 2: EvenParity, 3: OddParity
-**/
-  UINT8                       PcdSerialIoUartParity;
-
-/** Offset 0x0075 - PcdSerialIoUartDataBits - FSPT
-  Set default word length. 0: Default, 5,6,7,8
-**/
-  UINT8                       PcdSerialIoUartDataBits;
-
-/** Offset 0x0076 - PcdSerialIoUartStopBits - FSPT
-  Set default stop bits.
-  0: DefaultStopBits, 1: OneStopBit, 2: OneFiveStopBits, 3: TwoStopBits
-**/
-  UINT8                       PcdSerialIoUartStopBits;
-
-/** Offset 0x0077 - PcdSerialIoUartAutoFlow - FSPT
-  Enables UART hardware flow control, CTS and RTS lines.
-  0: Disable, 1:Enable
-**/
-  UINT8                       PcdSerialIoUartAutoFlow;
-
-/** Offset 0x0078 - PcdSerialIoUartRxPinMux - FSPT
-  Select RX pin muxing for SerialIo UART used for debug
-**/
-  UINT32                      PcdSerialIoUartRxPinMux;
-
-/** Offset 0x007C - PcdSerialIoUartTxPinMux - FSPT
-  Select TX pin muxing for SerialIo UART used for debug
-**/
-  UINT32                      PcdSerialIoUartTxPinMux;
-
-/** Offset 0x0080 - PcdSerialIoUartRtsPinMux - FSPT
-  Select SerialIo Uart used for debug Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS*
-  for possible values.
-**/
-  UINT32                      PcdSerialIoUartRtsPinMux;
-
-/** Offset 0x0084 - PcdSerialIoUartCtsPinMux - FSPT
-  Select SerialIo Uart used for debug Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS*
-  for possible values.
-**/
-  UINT32                      PcdSerialIoUartCtsPinMux;
-
-/** Offset 0x0088 - PcdSerialIoUartDebugMmioBase - FSPT
-  Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIoUartMode
-  = SerialIoUartPci.
-**/
-  UINT32                      PcdSerialIoUartDebugMmioBase;
-
-/** Offset 0x008C - PcdLpcUartDebugEnable
-  Enable to initialize LPC Uart device in FSP.
-  0:Disable, 1:Enable
-**/
-  UINT8                       PcdLpcUartDebugEnable;
-
-/** Offset 0x008D - Debug Interfaces
-  Debug Interfaces. BIT0-RAM, BIT1-UART, BIT3-USB3, BIT4-Serial IO, BIT5-TraceHub,
-  BIT2 - Not used.
-**/
-  UINT8                       PcdDebugInterfaceFlags;
-
-/** Offset 0x008E - PcdSerialDebugLevel
-  Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load,
-  Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings,
-  Info & Verbose.
-  0:Disable, 1:Error Only, 2:Error and Warnings, 3:Load Error Warnings and Info, 4:Load
-  Error Warnings and Info, 5:Load Error Warnings Info and Verbose
-**/
-  UINT8                       PcdSerialDebugLevel;
-
-/** Offset 0x008F - ISA Serial Base selection
-  Select ISA Serial Base address. Default is 0x3F8.
-  0:0x3F8, 1:0x2F8
-**/
-  UINT8                       PcdIsaSerialUartBase;
-
-/** Offset 0x0090 - PcdSerialIo2ndUartEnable
-  Enable Additional SerialIo Uart device in FSP.
-  0:Disable, 1:Enable and Initialize, 2:Enable without Initializing
-**/
-  UINT8                       PcdSerialIo2ndUartEnable;
-
-/** Offset 0x0091 - PcdSerialIo2ndUartNumber
-  Select SerialIo Uart Controller Number
-  0:SerialIoUart0, 1:SerialIoUart1, 2:SerialIoUart2
-**/
-  UINT8                       PcdSerialIo2ndUartNumber;
-
-/** Offset 0x0092 - PcdSerialIo2ndUartMode - FSPT
-  Select SerialIo Uart Controller mode
-  0:SerialIoUartDisabled, 1:SerialIoUartPci, 2:SerialIoUartHidden, 3:SerialIoUartCom,
-  4:SerialIoUartSkipInit
-**/
-  UINT8                       PcdSerialIo2ndUartMode;
-
-/** Offset 0x0093
-**/
-  UINT8                       Rsvd01;
-
-/** Offset 0x0094 - PcdSerialIo2ndUartBaudRate - FSPT
-  Set default BaudRate Supported from 0 - default to 6000000
-**/
-  UINT32                      PcdSerialIo2ndUartBaudRate;
-
-/** Offset 0x0098 - PcdSerialIo2ndUartParity - FSPT
-  Set default Parity.
-  0: DefaultParity, 1: NoParity, 2: EvenParity, 3: OddParity
-**/
-  UINT8                       PcdSerialIo2ndUartParity;
-
-/** Offset 0x0099 - PcdSerialIo2ndUartDataBits - FSPT
-  Set default word length. 0: Default, 5,6,7,8
-**/
-  UINT8                       PcdSerialIo2ndUartDataBits;
-
-/** Offset 0x009A - PcdSerialIo2ndUartStopBits - FSPT
-  Set default stop bits.
-  0: DefaultStopBits, 1: OneStopBit, 2: OneFiveStopBits, 3: TwoStopBits
-**/
-  UINT8                       PcdSerialIo2ndUartStopBits;
-
-/** Offset 0x009B - PcdSerialIo2ndUartAutoFlow - FSPT
-  Enables UART hardware flow control, CTS and RTS lines.
-  0: Disable, 1:Enable
-**/
-  UINT8                       PcdSerialIo2ndUartAutoFlow;
-
-/** Offset 0x009C - PcdSerialIo2ndUartRxPinMux - FSPT
-  Select RX pin muxing for SerialIo UART
-**/
-  UINT32                      PcdSerialIo2ndUartRxPinMux;
-
-/** Offset 0x00A0 - PcdSerialIo2ndUartTxPinMux - FSPT
-  Select TX pin muxing for SerialIo UART
-**/
-  UINT32                      PcdSerialIo2ndUartTxPinMux;
-
-/** Offset 0x00A4 - PcdSerialIo2ndUartRtsPinMux - FSPT
-  Select SerialIo Uart Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS*
-  for possible values.
-**/
-  UINT32                      PcdSerialIo2ndUartRtsPinMux;
-
-/** Offset 0x00A8 - PcdSerialIo2ndUartCtsPinMux - FSPT
-  Select SerialIo Uart Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS*
-  for possible values.
-**/
-  UINT32                      PcdSerialIo2ndUartCtsPinMux;
-
-/** Offset 0x00AC - PcdSerialIo2ndUartMmioBase - FSPT
-  Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIo2ndUartMode
-  = SerialIoUartPci.
-**/
-  UINT32                      PcdSerialIo2ndUartMmioBase;
-
-/** Offset 0x00B0
-**/
-  UINT32                      TopMemoryCacheSize;
-
-/** Offset 0x00B4 - FspDebugHandler
-  <b>Optional</b> pointer to the boot loader's implementation of FSP_DEBUG_HANDLER.
-**/
-  UINT32                      FspDebugHandler;
-
-/** Offset 0x00B8 - Serial Io SPI Chip Select Polarity
-  Sets polarity for each chip Select. Available options: 0:SerialIoSpiCsActiveLow,
-  1:SerialIoSpiCsActiveHigh
-**/
-  UINT8                       PcdSerialIoSpiCsPolarity[2];
-
-/** Offset 0x00BA - Serial Io SPI Chip Select Enable
-  0:Disabled, 1:Enabled. Enables GPIO for CS0 or CS1 if it is Enabled
-**/
-  UINT8                       PcdSerialIoSpiCsEnable[2];
-
-/** Offset 0x00BC - Serial Io SPI Device Mode
-  When mode is set to Pci, controller is initalized in early stage. Available modes:
-  0:SerialIoSpiDisabled, 1:SerialIoSpiPci.
-**/
-  UINT8                       PcdSerialIoSpiMode;
-
-/** Offset 0x00BD - Serial Io SPI Default Chip Select Output
-  Sets Default CS as Output. Available options: 0:CS0, 1:CS1
-**/
-  UINT8                       PcdSerialIoSpiDefaultCsOutput;
-
-/** Offset 0x00BE - Serial Io SPI Default Chip Select Mode HW/SW
-  Sets Default CS Mode Hardware or Software. Available options: 0:HW, 1:SW
-**/
-  UINT8                       PcdSerialIoSpiCsMode;
-
-/** Offset 0x00BF - Serial Io SPI Default Chip Select State Low/High
-  Sets Default CS State Low or High. Available options: 0:Low, 1:High
-**/
-  UINT8                       PcdSerialIoSpiCsState;
-
-/** Offset 0x00C0 - Serial Io SPI Device Number
-  Select which Serial Io SPI controller is initalized in early stage.
-**/
-  UINT8                       PcdSerialIoSpiNumber;
-
-/** Offset 0x00C1
-**/
-  UINT8                       Rsvd02[3];
-
-/** Offset 0x00C4 - Serial Io SPI Device MMIO Base
-  Assigns MMIO for Serial Io SPI controller usage in early stage.
-**/
-  UINT32                      PcdSerialIoSpiMmioBase;
-
-/** Offset 0x00C8
-**/
-  UINT8                       ReservedFsptUpd1[16];
-} FSP_T_CONFIG;
-
-/** Fsp T UPD Configuration
-**/
-typedef struct {
-
-/** Offset 0x0000
-**/
-  FSP_UPD_HEADER              FspUpdHeader;
-
-/** Offset 0x0020
-**/
-  FSPT_ARCH_UPD               FsptArchUpd;
-
-/** Offset 0x0040
-**/
-  FSPT_CORE_UPD               FsptCoreUpd;
-
-/** Offset 0x0060
-**/
-  FSP_T_CONFIG                FsptConfig;
-
-/** Offset 0x00D8
-**/
-  UINT8                       Rsvd03[6];
-
-/** Offset 0x00DE
-**/
-  UINT16                      UpdTerminator;
-} FSPT_UPD;
-
-#pragma pack()
-
-#endif

models/addw3/AlderLakeFspBinPkg/Include/MemInfoHob.h

@@ -1,337 +0,0 @@
-/** @file
-  This file contains definitions required for creation of
-  Memory S3 Save data, Memory Info data and Memory Platform
-  data hobs.
-
-@copyright
-  INTEL CONFIDENTIAL
-  Copyright 1999 - 2021 Intel Corporation.
-
-  The source code contained or described herein and all documents related to the
-  source code ("Material") are owned by Intel Corporation or its suppliers or
-  licensors. Title to the Material remains with Intel Corporation or its suppliers
-  and licensors. The Material may contain trade secrets and proprietary and
-  confidential information of Intel Corporation and its suppliers and licensors,
-  and is protected by worldwide copyright and trade secret laws and treaty
-  provisions. No part of the Material may be used, copied, reproduced, modified,
-  published, uploaded, posted, transmitted, distributed, or disclosed in any way
-  without Intel's prior express written permission.
-
-  No license under any patent, copyright, trade secret or other intellectual
-  property right is granted to or conferred upon you by disclosure or delivery
-  of the Materials, either expressly, by implication, inducement, estoppel or
-  otherwise. Any license under such intellectual property rights must be
-  express and approved by Intel in writing.
-
-  Unless otherwise agreed by Intel in writing, you may not remove or alter
-  this notice or any other notice embedded in Materials by Intel or
-  Intel's suppliers or licensors in any way.
-
-  This file contains an 'Intel Peripheral Driver' and is uniquely identified as
-  "Intel Reference Module" and is licensed for Intel CPUs and chipsets under
-  the terms of your license agreement with Intel or your vendor. This file may
-  be modified by the user, subject to additional terms of the license agreement.
-
-@par Specification Reference:
-**/
-#ifndef _MEM_INFO_HOB_H_
-#define _MEM_INFO_HOB_H_
-
-
-#pragma pack (push, 1)
-
-extern EFI_GUID gSiMemoryS3DataGuid;
-extern EFI_GUID gSiMemoryInfoDataGuid;
-extern EFI_GUID gSiMemoryPlatformDataGuid;
-
-#define MAX_NODE        2
-#define MAX_CH          4
-#define MAX_DIMM        2
-#define HOB_MAX_SAGV_POINTS 4
-
-///
-/// Host reset states from MRC.
-///
-#define  WARM_BOOT        2
-
-#define R_MC_CHNL_RANK_PRESENT  0x7C
-#define   B_RANK0_PRS           BIT0
-#define   B_RANK1_PRS           BIT1
-#define   B_RANK2_PRS           BIT4
-#define   B_RANK3_PRS           BIT5
-
-// @todo remove and use the MdePkg\Include\Pi\PiHob.h
-#if !defined(_PEI_HOB_H_) && !defined(__PI_HOB_H__)
-#ifndef __HOB__H__
-typedef struct _EFI_HOB_GENERIC_HEADER {
-  UINT16  HobType;
-  UINT16  HobLength;
-  UINT32  Reserved;
-} EFI_HOB_GENERIC_HEADER;
-
-typedef struct _EFI_HOB_GUID_TYPE {
-  EFI_HOB_GENERIC_HEADER  Header;
-  EFI_GUID                Name;
-  ///
-  /// Guid specific data goes here
-  ///
-} EFI_HOB_GUID_TYPE;
-#endif
-#endif
-
-///
-/// Defines taken from MRC so avoid having to include MrcInterface.h
-///
-
-//
-// Matches MAX_SPD_SAVE define in MRC
-//
-#ifndef MAX_SPD_SAVE
-#define MAX_SPD_SAVE 29
-#endif
-
-//
-// MRC version description.
-//
-typedef struct {
-  UINT8  Major;     ///< Major version number
-  UINT8  Minor;     ///< Minor version number
-  UINT8  Rev;       ///< Revision number
-  UINT8  Build;     ///< Build number
-} SiMrcVersion;
-
-//
-// Matches MrcChannelSts enum in MRC
-//
-#ifndef CHANNEL_NOT_PRESENT
-#define CHANNEL_NOT_PRESENT     0  // There is no channel present on the controller.
-#endif
-#ifndef CHANNEL_DISABLED
-#define CHANNEL_DISABLED        1  // There is a channel present but it is disabled.
-#endif
-#ifndef CHANNEL_PRESENT
-#define CHANNEL_PRESENT         2  // There is a channel present and it is enabled.
-#endif
-
-//
-// Matches MrcDimmSts enum in MRC
-//
-#ifndef DIMM_ENABLED
-#define DIMM_ENABLED     0  // DIMM/rank Pair is enabled, presence will be detected.
-#endif
-#ifndef DIMM_DISABLED
-#define DIMM_DISABLED    1  // DIMM/rank Pair is disabled, regardless of presence.
-#endif
-#ifndef DIMM_PRESENT
-#define DIMM_PRESENT     2  // There is a DIMM present in the slot/rank pair and it will be used.
-#endif
-#ifndef DIMM_NOT_PRESENT
-#define DIMM_NOT_PRESENT 3  // There is no DIMM present in the slot/rank pair.
-#endif
-
-//
-// Matches MrcBootMode enum in MRC
-//
-#ifndef __MRC_BOOT_MODE__
-#define __MRC_BOOT_MODE__                 //The below values are originated from MrcCommonTypes.h
-  #ifndef INT32_MAX
-  #define INT32_MAX                       (0x7FFFFFFF)
-  #endif  //INT32_MAX
-typedef enum {
-  bmCold,                                 ///< Cold boot
-  bmWarm,                                 ///< Warm boot
-  bmS3,                                   ///< S3 resume
-  bmFast,                                 ///< Fast boot
-  MrcBootModeMax,                         ///< MRC_BOOT_MODE enumeration maximum value.
-  MrcBootModeDelim = INT32_MAX            ///< This value ensures the enum size is consistent on both sides of the PPI.
-} MRC_BOOT_MODE;
-#endif  //__MRC_BOOT_MODE__
-
-//
-// Matches MrcDdrType enum in MRC
-//
-#ifndef MRC_DDR_TYPE_DDR5
-#define MRC_DDR_TYPE_DDR5     1
-#endif
-#ifndef MRC_DDR_TYPE_LPDDR5
-#define MRC_DDR_TYPE_LPDDR5   2
-#endif
-#ifndef MRC_DDR_TYPE_LPDDR4
-#define MRC_DDR_TYPE_LPDDR4   3
-#endif
-#ifndef MRC_DDR_TYPE_UNKNOWN
-#define MRC_DDR_TYPE_UNKNOWN  4
-#endif
-
-#define MAX_PROFILE_NUM     7 // number of memory profiles supported
-#define MAX_XMP_PROFILE_NUM 5 // number of XMP profiles supported
-
-#define MAX_TRACE_REGION             5
-#define MAX_TRACE_CACHE_TYPE         2
-
-//
-// DIMM timings
-//
-typedef struct {
-  UINT32 tCK;       ///< Memory cycle time, in femtoseconds.
-  UINT16 NMode;     ///< Number of tCK cycles for the channel DIMM's command rate mode.
-  UINT16 tCL;       ///< Number of tCK cycles for the channel DIMM's CAS latency.
-  UINT16 tCWL;      ///< Number of tCK cycles for the channel DIMM's minimum CAS write latency time.
-  UINT16 tFAW;      ///< Number of tCK cycles for the channel DIMM's minimum four activate window delay time.
-  UINT16 tRAS;      ///< Number of tCK cycles for the channel DIMM's minimum active to precharge delay time.
-  UINT16 tRCDtRP;   ///< Number of tCK cycles for the channel DIMM's minimum RAS# to CAS# delay time and Row Precharge delay time.
-  UINT16 tREFI;     ///< Number of tCK cycles for the channel DIMM's minimum Average Periodic Refresh Interval.
-  UINT16 tRFC;      ///< Number of tCK cycles for the channel DIMM's minimum refresh recovery delay time.
-  UINT16 tRFCpb;    ///< Number of tCK cycles for the channel DIMM's minimum per bank refresh recovery delay time.
-  UINT16 tRFC2;     ///< Number of tCK cycles for the channel DIMM's minimum refresh recovery delay time.
-  UINT16 tRFC4;     ///< Number of tCK cycles for the channel DIMM's minimum refresh recovery delay time.
-  UINT16 tRPab;     ///< Number of tCK cycles for the channel DIMM's minimum row precharge delay time for all banks.
-  UINT16 tRRD;      ///< Number of tCK cycles for the channel DIMM's minimum row active to row active delay time.
-  UINT16 tRRD_L;    ///< Number of tCK cycles for the channel DIMM's minimum row active to row active delay time for same bank groups.
-  UINT16 tRRD_S;    ///< Number of tCK cycles for the channel DIMM's minimum row active to row active delay time for different bank groups.
-  UINT16 tRTP;      ///< Number of tCK cycles for the channel DIMM's minimum internal read to precharge command delay time.
-  UINT16 tWR;       ///< Number of tCK cycles for the channel DIMM's minimum write recovery time.
-  UINT16 tWTR;      ///< Number of tCK cycles for the channel DIMM's minimum internal write to read command delay time.
-  UINT16 tWTR_L;    ///< Number of tCK cycles for the channel DIMM's minimum internal write to read command delay time for same bank groups.
-  UINT16 tWTR_S;    ///< Number of tCK cycles for the channel DIMM's minimum internal write to read command delay time for different bank groups.
-  UINT16 tCCD_L;  ///< Number of tCK cycles for the channel DIMM's minimum CAS-to-CAS delay for same bank group.
-} MRC_CH_TIMING;
-
-typedef struct {
-  UINT16 tRDPRE;     ///< Read CAS to Precharge cmd delay
-} MRC_IP_TIMING;
-
-///
-/// Memory SMBIOS & OC Memory Data Hob
-///
-typedef struct {
-  UINT8            Status;                  ///< See MrcDimmStatus for the definition of this field.
-  UINT8            DimmId;
-  UINT32           DimmCapacity;            ///< DIMM size in MBytes.
-  UINT16           MfgId;
-  UINT8            ModulePartNum[20];       ///< Module part number for DDR3 is 18 bytes however for DRR4 20 bytes as per JEDEC Spec, so reserving 20 bytes
-  UINT8            RankInDimm;              ///< The number of ranks in this DIMM.
-  UINT8            SpdDramDeviceType;       ///< Save SPD DramDeviceType information needed for SMBIOS structure creation.
-  UINT8            SpdModuleType;           ///< Save SPD ModuleType information needed for SMBIOS structure creation.
-  UINT8            SpdModuleMemoryBusWidth; ///< Save SPD ModuleMemoryBusWidth information needed for SMBIOS structure creation.
-  UINT8            SpdSave[MAX_SPD_SAVE];   ///< Save SPD Manufacturing information needed for SMBIOS structure creation.
-  UINT16           Speed;                   ///< The maximum capable speed of the device, in MHz
-  UINT8            MdSocket;                ///< MdSocket: 0 = Memory Down, 1 = Socketed. Needed for SMBIOS structure creation.
-} DIMM_INFO;
-
-typedef struct {
-  UINT8            Status;                  ///< Indicates whether this channel should be used.
-  UINT8            ChannelId;
-  UINT8            DimmCount;               ///< Number of valid DIMMs that exist in the channel.
-  MRC_CH_TIMING    Timing[MAX_PROFILE_NUM]; ///< The channel timing values.
-  DIMM_INFO        DimmInfo[MAX_DIMM];      ///< Save the DIMM output characteristics.
-} CHANNEL_INFO;
-
-typedef struct {
-  UINT8            Status;                  ///< Indicates whether this controller should be used.
-  UINT16           DeviceId;                ///< The PCI device id of this memory controller.
-  UINT8            RevisionId;              ///< The PCI revision id of this memory controller.
-  UINT8            ChannelCount;            ///< Number of valid channels that exist on the controller.
-  CHANNEL_INFO     ChannelInfo[MAX_CH];     ///< The following are channel level definitions.
-} CONTROLLER_INFO;
-
-typedef struct {
-  UINT64   BaseAddress;   ///< Trace Base Address
-  UINT64   TotalSize;     ///< Total Trace Region of Same Cache type
-  UINT8    CacheType;     ///< Trace Cache Type
-  UINT8    ErrorCode;     ///< Trace Region Allocation Fail Error code
-  UINT8    Rsvd[2];
-} PSMI_MEM_INFO;
-
-/// This data structure contains per-SaGv timing values that are considered output by the MRC.
-typedef struct {
-  UINT32        DataRate;    ///< The memory rate for the current SaGv Point in units of MT/s
-  MRC_CH_TIMING JedecTiming; ///< Timings used for this entry's corresponding SaGv Point - derived from JEDEC SPD spec
-  MRC_IP_TIMING IpTiming;    ///< Timings used for this entry's corresponding SaGv Point - IP specific
-} HOB_SAGV_TIMING_OUT;
-
-/// This data structure contains SAGV config values that are considered output by the MRC.
-typedef struct {
-  UINT32              NumSaGvPointsEnabled; ///< Count of the total number of SAGV Points enabled.
-  UINT32              SaGvPointMask;        ///< Bit mask where each bit indicates an enabled SAGV point.
-  HOB_SAGV_TIMING_OUT SaGvTiming[HOB_MAX_SAGV_POINTS];
-} HOB_SAGV_INFO;
-
-typedef struct {
-  UINT8             Revision;
-  UINT16            DataWidth;              ///< Data width, in bits, of this memory device
-  /** As defined in SMBIOS 3.0 spec
-    Section 7.18.2 and Table 75
-  **/
-  UINT8             MemoryType;             ///< DDR type: DDR3, DDR4, or LPDDR3
-  UINT16            MaximumMemoryClockSpeed;///< The maximum capable speed of the device, in megahertz (MHz)
-  UINT16            ConfiguredMemoryClockSpeed; ///< The configured clock speed to the memory device, in megahertz (MHz)
-  /** As defined in SMBIOS 3.0 spec
-    Section 7.17.3 and Table 72
-  **/
-  UINT8             ErrorCorrectionType;
-
-  SiMrcVersion      Version;
-  BOOLEAN           EccSupport;
-  UINT8             MemoryProfile;
-  UINT8             IsDMBRunning;                      ///< Deprecated.
-  UINT32            TotalPhysicalMemorySize;
-  UINT32            DefaultXmptCK[MAX_XMP_PROFILE_NUM];///< Stores the tCK value read from SPD XMP profiles if they exist.
-  ///
-  /// Set of bit flags showing XMP and User Profile capability status for the DIMMs detected in system. For each bit, 1 is supported, 0 is unsupported.
-  /// Bit 0: XMP Profile 1 capability status
-  /// Bit 1: XMP Profile 2 capability status
-  /// Bit 2: XMP Profile 3 capability status
-  /// Bit 3: User Profile 4 capability status
-  /// Bit 4: User Profile 5 capability status
-  ///
-  UINT8             XmpProfileEnable;
-  UINT8             XmpConfigWarning;                  ///< If XMP capable DIMMs config support only 1DPC, but 2DPC is installed
-  UINT8             Ratio;                             ///< DDR Frequency Ratio, Max Value 255
-  UINT8             RefClk;
-  UINT32            VddVoltage[MAX_PROFILE_NUM];
-  UINT32            VddqVoltage[MAX_PROFILE_NUM];
-  UINT32            VppVoltage[MAX_PROFILE_NUM];
-  CONTROLLER_INFO   Controller[MAX_NODE];
-  UINT16            Ratio_UINT16;                      ///< DDR Frequency Ratio, used for programs that require ratios higher then 255
-  UINT32            NumPopulatedChannels;              ///< Total number of memory channels populated
-  HOB_SAGV_INFO     SagvConfigInfo;                    ///< This data structure contains SAGV config values that are considered output by the MRC.
-  UINT16            TotalMemWidth;                     ///< Total Memory Width in bits from all populated channels
-  BOOLEAN           MemorySpeedReducedWrongDimmSlot;   ///< Can be used by OEM BIOS to display a warning on the screen that DDR speed was reduced due to wrong DIMM population
-  BOOLEAN           MemorySpeedReducedMixedConfig;     ///< Can be used by OEM BIOS to display a warning on the screen that DDR speed was reduced due to mixed DIMM config
-  BOOLEAN           DynamicMemoryBoostTrainingFailed;  ///< TRUE if Dynamic Memory Boost failed to train and was force disabled on the last full training boot. FALSE otherwise.
-} MEMORY_INFO_DATA_HOB;
-
-/**
-  Memory Platform Data Hob
-
-  <b>Revision 1:</b>
-  - Initial version.
-  <b>Revision 2:</b>
-  - Added TsegBase, PrmrrSize, PrmrrBase, Gttbase, MmioSize, PciEBaseAddress fields
-**/
-typedef struct {
-  UINT8             Revision;
-  UINT8             Reserved[3];
-  UINT32            BootMode;
-  UINT32            TsegSize;
-  UINT32            TsegBase;
-  UINT32            PrmrrSize;
-  UINT64            PrmrrBase;
-  UINT32            GttBase;
-  UINT32            MmioSize;
-  UINT32            PciEBaseAddress;
-  PSMI_MEM_INFO     PsmiInfo[MAX_TRACE_CACHE_TYPE];
-  PSMI_MEM_INFO     PsmiRegionInfo[MAX_TRACE_REGION];
-  BOOLEAN           MrcBasicMemoryTestPass;
-} MEMORY_PLATFORM_DATA;
-
-typedef struct {
-  EFI_HOB_GUID_TYPE    EfiHobGuidType;
-  MEMORY_PLATFORM_DATA Data;
-  UINT8                *Buffer;
-} MEMORY_PLATFORM_DATA_HOB;
-
-#pragma pack (pop)
-
-#endif // _MEM_INFO_HOB_H_

models/addw3/README.md.in

@@ -1 +0,0 @@
-# System76 Adder WS (addw3)

models/addw3/chip.txt

@@ -1 +0,0 @@
-GD25Q256D

models/addw3/coreboot-collector.txt

@@ -1,333 +0,0 @@
-## PCI ##
-PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
-PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
-PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
-PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
-PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
-PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
-PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
-PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
-PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
-PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
-PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
-PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
-PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
-PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
-PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3C, Revision 0x11
-PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
-PCI Device: 0000:00:1f.3: Class 0x00040100, Vendor 0x8086, Device 0x7A50, Revision 0x11
-PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
-PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
-PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x0DC8, Revision 0x11
-PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x2820, Revision 0xA1
-PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BD, Revision 0xA1
-PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
-PCI Device: 0000:03:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
-PCI Device: 0000:03:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
-PCI Device: 0000:03:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
-PCI Device: 0000:03:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
-PCI Device: 0000:04:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1134, Revision 0x00
-PCI Device: 0000:39:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1135, Revision 0x00
-PCI Device: 0000:6c:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
-PCI Device: 10000:e0:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
-PCI Device: 10000:e0:1d.4: Class 0x00060400, Vendor 0x8086, Device 0x7A34, Revision 0x11
-PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
-## GPIO ##
-600 Series PCH
-GPP_I0 (0x6E,0x00) 0x44000100 0x00000018 0x00000000 0x00000000
-GPP_I1 (0x6E,0x02) 0x44000500 0x00000019 0x00000000 0x00000000
-GPP_I2 (0x6E,0x04) 0x86800100 0x0000001a 0x00000000 0x00000000
-GPP_I3 (0x6E,0x06) 0x44000500 0x0000001b 0x00000000 0x00000000
-GPP_I4 (0x6E,0x08) 0x86800100 0x0000001c 0x00000000 0x00000000
-GPP_I5 (0x6E,0x0A) 0x84000201 0x0000001d 0x00000000 0x00000000
-GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
-GPP_I7 (0x6E,0x0E) 0x44000300 0x00000020 0x00000000 0x00000000
-GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
-GPP_I9 (0x6E,0x12) 0x44000300 0x00000022 0x00000000 0x00000000
-GPP_I10 (0x6E,0x14) 0x44000300 0x00000023 0x00000000 0x00000000
-GPP_I11 (0x6E,0x16) 0x84000402 0x00000024 0x00000000 0x00000000
-GPP_I12 (0x6E,0x18) 0x84000402 0x00000025 0x00000000 0x00000000
-GPP_I13 (0x6E,0x1A) 0x84000402 0x00000026 0x00000000 0x00000000
-GPP_I14 (0x6E,0x1C) 0x84000402 0x00000027 0x00000000 0x00000000
-GPP_I15 (0x6E,0x1E) 0x44000300 0x00000028 0x00000000 0x00000000
-GPP_I16 (0x6E,0x20) 0x44000300 0x00000029 0x00000000 0x00000000
-GPP_I17 (0x6E,0x22) 0x44000300 0x0000002a 0x00000000 0x00000000
-GPP_I18 (0x6E,0x24) 0x44000200 0x0000002b 0x00000000 0x00000000
-GPP_I19 (0x6E,0x26) 0x44000300 0x0000002c 0x00000000 0x00000000
-GPP_I20 (0x6E,0x28) 0x44000300 0x0000002d 0x00000000 0x00000000
-GPP_I21 (0x6E,0x2A) 0x44000300 0x0000002e 0x00000000 0x00000000
-GPP_I22 (0x6E,0x2C) 0x44000200 0x00000030 0x00000000 0x00000000
-GPP_R0 (0x6E,0x32) 0x44000600 0x00000031 0x00000000 0x00000000
-GPP_R1 (0x6E,0x34) 0x44000600 0x00003c32 0x00000000 0x00000000
-GPP_R2 (0x6E,0x36) 0x44000600 0x00003c33 0x00000000 0x00000000
-GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
-GPP_R4 (0x6E,0x3A) 0x44000600 0x00000035 0x00000000 0x00000000
-GPP_R5 (0x6E,0x3C) 0x44000300 0x00000036 0x00000000 0x00000000
-GPP_R6 (0x6E,0x3E) 0x44000300 0x00000037 0x00000000 0x00000000
-GPP_R7 (0x6E,0x40) 0x44000300 0x00000038 0x00000000 0x00000000
-GPP_R8 (0x6E,0x42) 0x84000102 0x00000039 0x00000000 0x00000000
-GPP_R9 (0x6E,0x44) 0x44000502 0x0000003a 0x00000000 0x00000000
-GPP_R10 (0x6E,0x46) 0x44000300 0x0000003b 0x00000000 0x00000000
-GPP_R11 (0x6E,0x48) 0x44000300 0x0000003c 0x00000000 0x00000000
-GPP_R12 (0x6E,0x4A) 0x44000300 0x0000003d 0x00000000 0x00000000
-GPP_R13 (0x6E,0x4C) 0x44000300 0x0000003e 0x00000000 0x00000000
-GPP_R14 (0x6E,0x4E) 0x44000300 0x0000003f 0x00000000 0x00000000
-GPP_R15 (0x6E,0x50) 0x44000300 0x00000040 0x00000000 0x00000000
-GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
-GPP_R17 (0x6E,0x54) 0x44000300 0x00000042 0x00000000 0x00000000
-GPP_R18 (0x6E,0x56) 0x44000300 0x00000043 0x00000000 0x00000000
-GPP_R19 (0x6E,0x58) 0x44000300 0x00000044 0x00000000 0x00000000
-GPP_R20 (0x6E,0x5A) 0x44000300 0x00000045 0x00000000 0x00000000
-GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
-GPP_J0 (0x6E,0x60) 0x44000502 0x00000047 0x00000000 0x00000000
-GPP_J1 (0x6E,0x62) 0x84000600 0x00000048 0x00000000 0x00000000
-GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
-GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
-GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
-GPP_J5 (0x6E,0x6A) 0x44000502 0x0000304c 0x00000000 0x00000000
-GPP_J6 (0x6E,0x6C) 0x44000502 0x0000004d 0x00000000 0x00000000
-GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
-GPP_J8 (0x6E,0x70) 0x44000300 0x00000050 0x00000000 0x00000000
-GPP_J9 (0x6E,0x72) 0x44000300 0x00000051 0x00000000 0x00000000
-GPP_J10 (0x6E,0x74) 0x44000700 0x00001052 0x00000000 0x00000000
-GPP_J11 (0x6E,0x76) 0x44000700 0x00001053 0x00000000 0x00000000
-GPP_B0 (0x6D,0x00) 0x40100102 0x00000050 0x00000000 0x00000000
-GPP_B1 (0x6D,0x02) 0x44000300 0x00000051 0x00000000 0x00000000
-GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
-GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
-GPP_B4 (0x6D,0x08) 0x44000300 0x00000054 0x00000000 0x00000000
-GPP_B5 (0x6D,0x0A) 0x44000300 0x00000055 0x00000000 0x00000000
-GPP_B6 (0x6D,0x0C) 0x44000300 0x00000056 0x00000000 0x00000000
-GPP_B7 (0x6D,0x0E) 0x44000300 0x00000057 0x00000000 0x00000000
-GPP_B8 (0x6D,0x10) 0x44000300 0x00000058 0x00000000 0x00000000
-GPP_B9 (0x6D,0x12) 0x44000300 0x00000059 0x00000000 0x00000000
-GPP_B10 (0x6D,0x14) 0x44000300 0x0000005a 0x00000000 0x00000000
-GPP_B11 (0x6D,0x16) 0x44000300 0x0000005b 0x00000000 0x00000000
-GPP_B12 (0x6D,0x18) 0x44000600 0x0000005c 0x00000000 0x00000000
-GPP_B13 (0x6D,0x1A) 0x44000600 0x0000005d 0x00000000 0x00000000
-GPP_B14 (0x6D,0x1C) 0x44000200 0x0000005e 0x00000000 0x00000000
-GPP_B15 (0x6D,0x1E) 0x44000102 0x0000005f 0x00000000 0x00000000
-GPP_B16 (0x6D,0x20) 0x44000300 0x00000060 0x00000000 0x00000000
-GPP_B17 (0x6D,0x22) 0x44000300 0x00000061 0x00000000 0x00000000
-GPP_B18 (0x6D,0x24) 0x04000602 0x00000062 0x00000000 0x00000000
-GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
-GPP_B20 (0x6D,0x28) 0x44000700 0x00001064 0x00000000 0x00000000
-GPP_B21 (0x6D,0x2A) 0x42880102 0x00000065 0x00000000 0x00000000
-GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
-GPP_B23 (0x6D,0x2E) 0x44000200 0x00000067 0x00000800 0x00000000
-GPP_G0 (0x6D,0x30) 0x44000100 0x00000068 0x00000000 0x00000000
-GPP_G1 (0x6D,0x32) 0x44000102 0x00000069 0x00000000 0x00000000
-GPP_G2 (0x6D,0x34) 0x44000700 0x0000106a 0x00000000 0x00000000
-GPP_G3 (0x6D,0x36) 0x44000100 0x0000006b 0x00000000 0x00000000
-GPP_G4 (0x6D,0x38) 0x44000102 0x0000006c 0x00000000 0x00000000
-GPP_G5 (0x6D,0x3A) 0x44000600 0x0000006d 0x00000000 0x00000000
-GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
-GPP_G7 (0x6D,0x3E) 0x44000100 0x0000006f 0x00000000 0x00000000
-GPP_H0 (0x6D,0x40) 0x44000300 0x00000070 0x00000000 0x00000000
-GPP_H1 (0x6D,0x42) 0x44000102 0x00000071 0x00000000 0x00000000
-GPP_H2 (0x6D,0x44) 0x44000702 0x00000072 0x00000000 0x00000000
-GPP_H3 (0x6D,0x46) 0x44000300 0x00000073 0x00000000 0x00000000
-GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
-GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
-GPP_H6 (0x6D,0x4C) 0x44000702 0x00000076 0x00000000 0x00000000
-GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
-GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
-GPP_H9 (0x6D,0x52) 0x44000700 0x00000019 0x00000000 0x00000000
-GPP_H10 (0x6D,0x54) 0x84000402 0x00000020 0x00000000 0x00000000
-GPP_H11 (0x6D,0x56) 0x84000402 0x00000021 0x00000000 0x00000000
-GPP_H12 (0x6D,0x58) 0x44000200 0x00000022 0x00000000 0x00000000
-GPP_H13 (0x6D,0x5A) 0x84000402 0x00000023 0x00000000 0x00000000
-GPP_H14 (0x6D,0x5C) 0x84000402 0x00000024 0x00000000 0x00000000
-GPP_H15 (0x6D,0x5E) 0x84000402 0x00000025 0x00000800 0x00000000
-GPP_H16 (0x6D,0x60) 0x84000402 0x00000026 0x00000000 0x00000000
-GPP_H17 (0x6D,0x62) 0x84000201 0x00000027 0x00000000 0x00000000
-GPP_H18 (0x6D,0x64) 0x44000200 0x00000028 0x00000000 0x00000000
-GPP_H19 (0x6D,0x66) 0x44000300 0x00000029 0x00000000 0x00000000
-GPP_H20 (0x6D,0x68) 0x44000300 0x0000002a 0x00000000 0x00000000
-GPP_H21 (0x6D,0x6A) 0x44000200 0x0000002b 0x00000000 0x00000000
-GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
-GPP_H23 (0x6D,0x6E) 0x44000300 0x0000002d 0x00000000 0x00000000
-GPD0 (0x6C,0x00) 0x04000502 0x00003060 0x00000000 0x00000000
-GPD1 (0x6C,0x02) 0x04000502 0x00003c61 0x00000000 0x00000000
-GPD2 (0x6C,0x04) 0x04000702 0x00000062 0x00000000 0x00000000
-GPD3 (0x6C,0x06) 0x04000502 0x00003063 0x00000010 0x00000000
-GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
-GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
-GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
-GPD7 (0x6C,0x0E) 0x04000200 0x00000067 0x00000000 0x00000000
-GPD8 (0x6C,0x10) 0x04000600 0x00000068 0x00000000 0x00000000
-GPD9 (0x6C,0x12) 0x04000600 0x00000069 0x00000000 0x00000000
-GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
-GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
-GPD12 (0x6C,0x18) 0x04000300 0x0000006c 0x00000000 0x00000000
-GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
-GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
-GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
-GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
-GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
-GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
-GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
-GPP_A7 (0x6B,0x20) 0x44000700 0x00003025 0x00000000 0x00000000
-GPP_A8 (0x6B,0x22) 0x44000700 0x00003026 0x00000000 0x00000000
-GPP_A9 (0x6B,0x24) 0x44000700 0x00003027 0x00000000 0x00000000
-GPP_A10 (0x6B,0x26) 0x44000702 0x00003028 0x00000000 0x00000000
-GPP_A11 (0x6B,0x28) 0x44000702 0x00003029 0x00000000 0x00000000
-GPP_A12 (0x6B,0x2A) 0x44000702 0x0000302a 0x00000000 0x00000000
-GPP_A13 (0x6B,0x2C) 0x44000702 0x0000302b 0x00000000 0x00000000
-GPP_A14 (0x6B,0x2E) 0x44000300 0x0000002c 0x00000000 0x00000000
-GPP_C0 (0x6B,0x32) 0x44000402 0x0000002d 0x00000000 0x00000000
-GPP_C1 (0x6B,0x34) 0x44000402 0x0000002e 0x00000000 0x00000000
-GPP_C2 (0x6B,0x36) 0x44000200 0x0000002f 0x00000800 0x00000000
-GPP_C3 (0x6B,0x38) 0x44000c02 0x00000030 0x00000000 0x00000000
-GPP_C4 (0x6B,0x3A) 0x44000c02 0x00000031 0x00000000 0x00000000
-GPP_C5 (0x6B,0x3C) 0x44000200 0x00000032 0x00000000 0x00000000
-GPP_C6 (0x6B,0x3E) 0x44000802 0x00000033 0x00000000 0x00000000
-GPP_C7 (0x6B,0x40) 0x44000802 0x00000034 0x00000000 0x00000000
-GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
-GPP_C9 (0x6B,0x44) 0x44000300 0x00000036 0x00000000 0x00000000
-GPP_C10 (0x6B,0x46) 0x44000201 0x00000037 0x00000000 0x00000000
-GPP_C11 (0x6B,0x48) 0x44000201 0x00000038 0x00000000 0x00000000
-GPP_C12 (0x6B,0x4A) 0x44000300 0x00000039 0x00000000 0x00000000
-GPP_C13 (0x6B,0x4C) 0x44000300 0x0000003a 0x00000000 0x00000000
-GPP_C14 (0x6B,0x4E) 0x44000300 0x0000003b 0x00000000 0x00000000
-GPP_C15 (0x6B,0x50) 0x44000300 0x0000003c 0x00000000 0x00000000
-GPP_C16 (0x6B,0x52) 0x44000402 0x0000003d 0x00000000 0x00000000
-GPP_C17 (0x6B,0x54) 0x44000402 0x0000003e 0x00000000 0x00000000
-GPP_C18 (0x6B,0x56) 0x44000402 0x0000003f 0x00000000 0x00000000
-GPP_C19 (0x6B,0x58) 0x44000402 0x00000040 0x00000000 0x00000000
-GPP_C20 (0x6B,0x5A) 0x44000300 0x00000041 0x00000000 0x00000000
-GPP_C21 (0x6B,0x5C) 0x44000300 0x00000042 0x00000000 0x00000000
-GPP_C22 (0x6B,0x5E) 0x44000300 0x00000043 0x00000000 0x00000000
-GPP_C23 (0x6B,0x60) 0x44000300 0x00000044 0x00000000 0x00000000
-GPP_S0 (0x6A,0x00) 0x44000300 0x01800030 0x00000000 0x00000000
-GPP_S1 (0x6A,0x02) 0x44000300 0x01800031 0x00000000 0x00000000
-GPP_S2 (0x6A,0x04) 0x44000300 0x01800032 0x00000000 0x00000000
-GPP_S3 (0x6A,0x06) 0x44000300 0x01800033 0x00000000 0x00000000
-GPP_S4 (0x6A,0x08) 0x44000300 0x01800034 0x00000000 0x00000000
-GPP_S5 (0x6A,0x0A) 0x44000300 0x01800035 0x00000000 0x00000000
-GPP_S6 (0x6A,0x0C) 0x44000a00 0x01800036 0x00000000 0x00000000
-GPP_S7 (0x6A,0x0E) 0x44000900 0x01800037 0x00000000 0x00000000
-GPP_E0 (0x6A,0x10) 0x44000300 0x00000038 0x00000000 0x00000000
-GPP_E1 (0x6A,0x12) 0x44000300 0x00000039 0x00000000 0x00000000
-GPP_E2 (0x6A,0x14) 0x44000300 0x0000003a 0x00000000 0x00000000
-GPP_E3 (0x6A,0x16) 0x42840103 0x0000003b 0x00000000 0x00000000
-GPP_E4 (0x6A,0x18) 0x44000300 0x0000003c 0x00000000 0x00000000
-GPP_E5 (0x6A,0x1A) 0x44000300 0x0000003d 0x00000000 0x00000000
-GPP_E6 (0x6A,0x1C) 0x44000300 0x0000003e 0x00000000 0x00000000
-GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
-GPP_E8 (0x6A,0x20) 0x44000600 0x00000040 0x00000000 0x00000000
-GPP_E9 (0x6A,0x22) 0x44000602 0x00000041 0x00000800 0x00000000
-GPP_E10 (0x6A,0x24) 0x44000602 0x00000042 0x00000800 0x00000000
-GPP_E11 (0x6A,0x26) 0x44000602 0x00000043 0x00000800 0x00000000
-GPP_E12 (0x6A,0x28) 0x44000602 0x00000044 0x00000000 0x00000000
-GPP_E13 (0x6A,0x2A) 0x44000300 0x00000045 0x00000000 0x00000000
-GPP_E14 (0x6A,0x2C) 0x44000300 0x00000046 0x00000000 0x00000000
-GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
-GPP_E16 (0x6A,0x30) 0x44000300 0x00000048 0x00000000 0x00000000
-GPP_E17 (0x6A,0x32) 0x44000102 0x00001049 0x00000000 0x00000000
-GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
-GPP_E19 (0x6A,0x36) 0x44000300 0x0000004b 0x00000000 0x00000000
-GPP_E20 (0x6A,0x38) 0x44000300 0x0000004c 0x00000000 0x00000000
-GPP_E21 (0x6A,0x3A) 0x44000300 0x0000004d 0x00000000 0x00000000
-GPP_K0 (0x6A,0x3E) 0x42800102 0x0000004e 0x00000000 0x00000000
-GPP_K1 (0x6A,0x40) 0x44000300 0x00000050 0x00000000 0x00000000
-GPP_K2 (0x6A,0x42) 0x44000300 0x00000051 0x00000000 0x00000000
-GPP_K3 (0x6A,0x44) 0x84000201 0x00000052 0x00000000 0x00000000
-GPP_K4 (0x6A,0x46) 0x04000200 0x00000053 0x00000000 0x00000000
-GPP_K5 (0x6A,0x48) 0x44000300 0x00000054 0x00000000 0x00000000
-GPP_K6 (0x6A,0x4A) 0x44000b02 0x00003055 0x00000000 0x00000000
-GPP_K7 (0x6A,0x4C) 0x44000b00 0x00001056 0x00000000 0x00000000
-GPP_K8 (0x6A,0x4E) 0x44000600 0x00000057 0x00000000 0x00000000
-GPP_K9 (0x6A,0x50) 0x44000600 0x00000058 0x00000000 0x00000000
-GPP_K10 (0x6A,0x52) 0x44000b02 0x00003059 0x00000000 0x00000000
-GPP_K11 (0x6A,0x54) 0x44000300 0x0000005a 0x00000000 0x00000000
-GPP_F0 (0x6A,0x5C) 0x44000a02 0x0000005b 0x00000000 0x00000000
-GPP_F1 (0x6A,0x5E) 0x44000300 0x0000005c 0x00000000 0x00000000
-GPP_F2 (0x6A,0x60) 0x84000201 0x0000005d 0x00000000 0x00000000
-GPP_F3 (0x6A,0x62) 0x84000201 0x0000005e 0x00000000 0x00000000
-GPP_F4 (0x6A,0x64) 0x84000201 0x00000060 0x00000000 0x00000000
-GPP_F5 (0x6A,0x66) 0x44000600 0x00000061 0x00000000 0x00000000
-GPP_F6 (0x6A,0x68) 0x44000300 0x00000062 0x00000000 0x00000000
-GPP_F7 (0x6A,0x6A) 0x84000102 0x00000063 0x00000000 0x00000000
-GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
-GPP_F9 (0x6A,0x6E) 0x44000201 0x00000065 0x00000000 0x00000000
-GPP_F10 (0x6A,0x70) 0x44000300 0x00000066 0x00000000 0x00000000
-GPP_F11 (0x6A,0x72) 0x44000300 0x00000067 0x00000000 0x00000000
-GPP_F12 (0x6A,0x74) 0x44000300 0x00000068 0x00000000 0x00000000
-GPP_F13 (0x6A,0x76) 0x44000300 0x00000069 0x00000000 0x00000000
-GPP_F14 (0x6A,0x78) 0x44000700 0x0000006a 0x00000000 0x00000000
-GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
-GPP_F16 (0x6A,0x7C) 0x44000300 0x0000006c 0x00000000 0x00000000
-GPP_F17 (0x6A,0x7E) 0x44000102 0x0000006d 0x00000000 0x00000000
-GPP_F18 (0x6A,0x80) 0x84000200 0x0000006e 0x00000000 0x00000000
-GPP_F19 (0x6A,0x82) 0x44000600 0x0000006f 0x00000000 0x00000000
-GPP_F20 (0x6A,0x84) 0x44000600 0x00000070 0x00000000 0x00000000
-GPP_F21 (0x6A,0x86) 0x44000600 0x00000071 0x00000000 0x00000000
-GPP_F22 (0x6A,0x88) 0x44000300 0x00000072 0x00000000 0x00000000
-GPP_F23 (0x6A,0x8A) 0x44000300 0x00000073 0x00000000 0x00000000
-GPP_D0 (0x69,0x20) 0x44000300 0x00000026 0x00000000 0x00000000
-GPP_D1 (0x69,0x22) 0x44000300 0x00000027 0x00000000 0x00000000
-GPP_D2 (0x69,0x24) 0x44000300 0x00000028 0x00000000 0x00000000
-GPP_D3 (0x69,0x26) 0x44000300 0x00000029 0x00000000 0x00000000
-GPP_D4 (0x69,0x28) 0x44000300 0x0000002a 0x00000000 0x00000000
-GPP_D5 (0x69,0x2A) 0x44000300 0x0000002b 0x00000000 0x00000000
-GPP_D6 (0x69,0x2C) 0x44000300 0x0000002c 0x00000000 0x00000000
-GPP_D7 (0x69,0x2E) 0x44000300 0x0000002d 0x00000000 0x00000000
-GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
-GPP_D9 (0x69,0x32) 0x40000702 0x00003c00 0x00000000 0x00000000
-GPP_D10 (0x69,0x34) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
-GPP_D13 (0x69,0x3A) 0x40000702 0x00003c00 0x00000000 0x00000000
-GPP_D14 (0x69,0x3C) 0x40000702 0x00003c00 0x00000000 0x00000000
-GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
-GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
-GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
-GPP_D22 (0x69,0x4C) 0x40000700 0x00000000 0x00000000 0x00000000
-GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
-## HDAUDIO ##
-hdaudioC0D0
-  vendor_name: Realtek
-  chip_name: ALC256
-  vendor_id: 0x10ec0256
-  subsystem_id: 0x1558a671
-  revision_id: 0x100002
-  0x12: 0x90a60130
-  0x13: 0x40000000
-  0x14: 0x90170110
-  0x18: 0x411111f0
-  0x19: 0x411111f0
-  0x1a: 0x411111f0
-  0x1b: 0x02a11040
-  0x1d: 0x41700001
-  0x1e: 0x411111f0
-  0x21: 0x02211020
-hdaudioC0D2
-  vendor_name: Intel
-  chip_name: Raptorlake HDMI
-  vendor_id: 0x80862818
-  subsystem_id: 0x80860101
-  revision_id: 0x100000
-  0x04: 0x18560010
-  0x06: 0x18560010
-  0x08: 0x18560010
-  0x0a: 0x18560010
-  0x0b: 0x18560010
-  0x0c: 0x18560010
-  0x0d: 0x18560010
-  0x0e: 0x18560010
-  0x0f: 0x18560010
-hdaudioC1D0
-  vendor_name: Nvidia
-  chip_name: Generic HDMI
-  vendor_id: 0x10de00a6
-  subsystem_id: 0x10de0000
-  revision_id: 0x100100
-  0x04: 0x185600f0
-  0x05: 0x585600f0
-  0x06: 0x185600f0
-  0x07: 0x585600f0

models/addw3/coreboot.config

@@ -1,28 +0,0 @@
-CONFIG_VENDOR_SYSTEM76=y
-CONFIG_BOARD_SYSTEM76_ADDW3=y
-CONFIG_CCACHE=y
-CONFIG_CONSOLE_SERIAL=n
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-CONFIG_HAVE_GBE_BIN=y
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_HAVE_ME_BIN=y
-CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
-CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
-CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
-CONFIG_PAYLOAD_ELF=y
-CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
-CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
-CONFIG_POST_IO=n
-CONFIG_SMMSTORE=y
-CONFIG_SMMSTORE_V2=y
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
-#CONFIG_CONSOLE_SYSTEM76_EC=y
-
-# Custom FSP
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Fsp.fd"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Include"
-CONFIG_FSP_USE_REPO=n

models/addw3/ec.config

@@ -1 +0,0 @@
-BOARD=system76/addw3

models/addw3/ecspy.txt

@@ -1,89 +0,0 @@
-id 5570 rev 6
-A0: data 1 mirror 1 pot 0 control 00
-A1: data 0 mirror 0 pot 0 control 00
-A2: data 0 mirror 1 pot 0 control 00
-A3: data 1 mirror 1 pot 0 control 80
-A4: data 0 mirror 0 pot 0 control 00
-A5: data 0 mirror 0 pot 0 control 00
-A6: data 0 mirror 0 pot 0 control 00
-A7: data 0 mirror 1 pot 0 control 00
-B0: data 0 mirror 0 pot 0 control 84
-B1: data 1 mirror 1 pot 0 control 84
-B2: data 1 mirror 1 pot 0 control 80
-B3: data 1 mirror 1 pot 0 control 80
-B4: data 1 mirror 1 pot 0 control 40
-B5: data 1 mirror 1 pot 0 control 40
-B6: data 1 mirror 1 pot 0 control 44
-B7: data 1 mirror 1 pot 0 control 80
-C0: data 1 mirror 1 pot 0 control 80
-C1: data 1 mirror 1 pot 0 control 04
-C2: data 1 mirror 1 pot 0 control 04
-C3: data 0 mirror 0 pot 0 control 04
-C4: data 0 mirror 0 pot 0 control 84
-C5: data 0 mirror 0 pot 0 control 04
-C6: data 1 mirror 1 pot 0 control 40
-C7: data 1 mirror 1 pot 0 control 44
-D0: data 1 mirror 1 pot 0 control 44
-D1: data 1 mirror 1 pot 0 control 44
-D2: data 1 mirror 1 pot 0 control 00
-D3: data 1 mirror 1 pot 0 control 44
-D4: data 1 mirror 1 pot 0 control 40
-D5: data 1 mirror 1 pot 0 control 44
-D6: data 1 mirror 1 pot 0 control 02
-D7: data 0 mirror 0 pot 0 control 02
-E0: data 1 mirror 1 pot 0 control 04
-E1: data 1 mirror 1 pot 0 control 44
-E2: data 0 mirror 0 pot 0 control 84
-E3: data 1 mirror 1 pot 0 control 40
-E4: data 1 mirror 1 pot 0 control 42
-E5: data 1 mirror 1 pot 0 control 40
-E6: data 1 mirror 1 pot 0 control 80
-E7: data 1 mirror 1 pot 0 control 04
-F0: data 0 mirror 0 pot 0 control 44
-F1: data 1 mirror 1 pot 0 control 44
-F2: data 1 mirror 1 pot 0 control 44
-F3: data 1 mirror 1 pot 0 control 40
-F4: data 1 mirror 1 pot 0 control 04
-F5: data 1 mirror 1 pot 0 control 04
-F6: data 0 mirror 0 pot 0 control 00
-F7: data 0 mirror 0 pot 0 control 80
-G0: data 0 mirror 0 pot 0 control 80
-G1: data 1 mirror 1 pot 0 control 80
-G2: data 1 mirror 1 pot 0 control 80
-G3: data 0 mirror 0 pot 0 control 00
-G4: data 0 mirror 0 pot 0 control 00
-G5: data 0 mirror 0 pot 0 control 00
-G6: data 0 mirror 0 pot 0 control 44
-G7: data 0 mirror 0 pot 0 control 00
-H0: data 0 mirror 0 pot 0 control 80
-H1: data 1 mirror 1 pot 0 control 80
-H2: data 0 mirror 0 pot 0 control 44
-H3: data 0 mirror 0 pot 0 control 40
-H4: data 1 mirror 1 pot 0 control 80
-H5: data 0 mirror 0 pot 0 control 44
-H6: data 1 mirror 1 pot 0 control 80
-H7: data 1 mirror 1 pot 0 control 80
-I0: data 0 mirror 0 pot 0 control 00
-I1: data 0 mirror 0 pot 0 control 00
-I2: data 0 mirror 0 pot 0 control 00
-I3: data 0 mirror 0 pot 0 control 00
-I4: data 0 mirror 0 pot 0 control 00
-I5: data 1 mirror 1 pot 0 control 80
-I6: data 1 mirror 1 pot 0 control 80
-I7: data 0 mirror 0 pot 0 control 00
-J0: data 1 mirror 1 pot 0 control 44
-J1: data 1 mirror 1 pot 0 control 40
-J2: data 1 mirror 1 pot 0 control 80
-J3: data 0 mirror 0 pot 0 control 80
-J4: data 1 mirror 1 pot 0 control 40
-J5: data 0 mirror 0 pot 0 control 40
-J6: data 0 mirror 0 pot 0 control 44
-J7: data 1 mirror 1 pot 0 control 80
-M0: data 0 mirror 0 control 06
-M1: data 1 mirror 0 control 06
-M2: data 1 mirror 1 control 06
-M3: data 1 mirror 1 control 06
-M4: data 0 mirror 1 control 06
-M5: data 0 mirror 0 control 00
-M6: data 1 mirror 1 control 86
-M7: data 0 mirror 0 control 00

models/addw3/gpio.h

@@ -1,272 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_GPIO_H
-#define MAINBOARD_GPIO_H
-
-#include <soc/gpe.h>
-#include <soc/gpio.h>
-
-#ifndef __ACPI__
-
-/* Pad configuration in ramstage. */
-static const struct pad_config gpio_table[] = {
-	PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
-	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
-	PAD_CFG_NF(GPD2, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
-	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
-	PAD_CFG_GPO(GPD7, 0, PWROK),
-	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
-	_PAD_CFG_STRUCT(GPD12, 0x04000300, 0x0000),
-	PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_A7, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A8, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A9, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A13, UP_20K, DEEP, NF1),
-	PAD_NC(GPP_A14, NONE),
-	_PAD_CFG_STRUCT(GPP_B0, 0x40100100, 0x0000),
-	PAD_NC(GPP_B1, NONE),
-	PAD_CFG_GPI(GPP_B2, NONE, DEEP),
-	PAD_CFG_GPO(GPP_B3, 1, DEEP),
-	PAD_NC(GPP_B4, NONE),
-	PAD_NC(GPP_B5, NONE),
-	PAD_NC(GPP_B6, NONE),
-	PAD_NC(GPP_B7, NONE),
-	PAD_NC(GPP_B8, NONE),
-	PAD_NC(GPP_B9, NONE),
-	PAD_NC(GPP_B10, NONE),
-	PAD_NC(GPP_B11, NONE),
-	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_B14, 0, DEEP),
-	PAD_CFG_GPI(GPP_B15, NONE, DEEP),
-	PAD_NC(GPP_B16, NONE),
-	PAD_NC(GPP_B17, NONE),
-	PAD_CFG_NF(GPP_B18, NONE, PWROK, NF1),
-	PAD_CFG_GPO(GPP_B19, 1, DEEP),
-	PAD_CFG_NF(GPP_B20, DN_20K, DEEP, NF1),
-	_PAD_CFG_STRUCT(GPP_B21, 0x42880100, 0x0000),
-	PAD_CFG_GPO(GPP_B22, 1, DEEP),
-	PAD_CFG_GPO(GPP_B23, 0, DEEP),
-	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_C2, 0, DEEP),
-	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF3),
-	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF3),
-	PAD_CFG_GPO(GPP_C5, 0, DEEP),
-	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF2),
-	PAD_CFG_GPI(GPP_C8, NONE, DEEP),
-	PAD_NC(GPP_C9, NONE),
-	PAD_CFG_GPO(GPP_C10, 1, DEEP),
-	PAD_CFG_GPO(GPP_C11, 1, DEEP),
-	PAD_NC(GPP_C12, NONE),
-	PAD_NC(GPP_C13, NONE),
-	PAD_NC(GPP_C14, NONE),
-	PAD_NC(GPP_C15, NONE),
-	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
-	PAD_NC(GPP_C20, NONE),
-	PAD_NC(GPP_C21, NONE),
-	PAD_NC(GPP_C22, NONE),
-	PAD_NC(GPP_C23, NONE),
-	PAD_NC(GPP_D0, NONE),
-	PAD_NC(GPP_D1, NONE),
-	PAD_NC(GPP_D2, NONE),
-	PAD_NC(GPP_D3, NONE),
-	PAD_NC(GPP_D4, NONE),
-	PAD_NC(GPP_D5, NONE),
-	PAD_NC(GPP_D6, NONE),
-	PAD_NC(GPP_D7, NONE),
-	PAD_NC(GPP_D8, NONE),
-	PAD_CFG_NF(GPP_D9, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D14, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D15, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D16, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D18, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D19, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
-	PAD_NC(GPP_E0, NONE),
-	PAD_NC(GPP_E1, NONE),
-	PAD_NC(GPP_E2, NONE),
-	_PAD_CFG_STRUCT(GPP_E3, 0x42840101, 0x0000),
-	PAD_NC(GPP_E4, NONE),
-	PAD_NC(GPP_E5, NONE),
-	PAD_NC(GPP_E6, NONE),
-	_PAD_CFG_STRUCT(GPP_E7, 0x80100100, 0x0000),
-	PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
-	PAD_NC(GPP_E13, NONE),
-	PAD_NC(GPP_E14, NONE),
-	PAD_CFG_GPO(GPP_E15, 0, DEEP),
-	PAD_NC(GPP_E16, NONE),
-	PAD_CFG_GPI(GPP_E17, DN_20K, DEEP),
-	PAD_CFG_GPO(GPP_E18, 1, DEEP),
-	PAD_NC(GPP_E19, NONE),
-	PAD_NC(GPP_E20, NONE),
-	PAD_NC(GPP_E21, NONE),
-	PAD_CFG_NF(GPP_F0, NONE, DEEP, NF2),
-	PAD_NC(GPP_F1, NONE),
-	PAD_CFG_GPO(GPP_F2, 1, PLTRST),
-	PAD_CFG_GPO(GPP_F3, 1, PLTRST),
-	PAD_CFG_GPO(GPP_F4, 1, PLTRST),
-	PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1),
-	PAD_NC(GPP_F6, NONE),
-	PAD_CFG_GPI(GPP_F7, NONE, PLTRST),
-	PAD_CFG_GPI(GPP_F8, NONE, DEEP),
-	PAD_CFG_GPO(GPP_F9, 1, DEEP),
-	PAD_NC(GPP_F10, NONE),
-	PAD_NC(GPP_F11, NONE),
-	PAD_NC(GPP_F12, NONE),
-	PAD_NC(GPP_F13, NONE),
-	PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_F15, NONE, DEEP),
-	PAD_NC(GPP_F16, NONE),
-	PAD_CFG_GPI(GPP_F17, NONE, DEEP),
-	PAD_CFG_GPO(GPP_F18, 0, PLTRST),
-	PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
-	PAD_NC(GPP_F22, NONE),
-	PAD_NC(GPP_F23, NONE),
-	PAD_CFG_GPI(GPP_G0, NONE, DEEP),
-	PAD_CFG_GPI(GPP_G1, NONE, DEEP),
-	PAD_CFG_NF(GPP_G2, DN_20K, DEEP, NF1),
-	PAD_CFG_GPI(GPP_G3, NONE, DEEP),
-	PAD_CFG_GPI(GPP_G4, NONE, DEEP),
-	PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_G6, NONE, DEEP),
-	PAD_CFG_GPI(GPP_G7, NONE, DEEP),
-	PAD_NC(GPP_H0, NONE),
-	PAD_CFG_GPI(GPP_H1, NONE, DEEP),
-	PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
-	PAD_NC(GPP_H3, NONE),
-	PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF1),
-	PAD_CFG_GPO(GPP_H12, 0, DEEP),
-	PAD_CFG_NF(GPP_H13, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_H14, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_H15, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_H16, NONE, PLTRST, NF1),
-	PAD_CFG_GPO(GPP_H17, 1, PLTRST),
-	PAD_CFG_GPO(GPP_H18, 0, DEEP),
-	PAD_NC(GPP_H19, NONE),
-	PAD_NC(GPP_H20, NONE),
-	PAD_CFG_GPO(GPP_H21, 0, DEEP),
-	PAD_CFG_GPO(GPP_H22, 0, DEEP),
-	PAD_NC(GPP_H23, NONE),
-	PAD_CFG_GPI(GPP_I0, NONE, DEEP),
-	PAD_CFG_NF(GPP_I1, NONE, DEEP, NF1),
-	_PAD_CFG_STRUCT(GPP_I2, 0x86800100, 0x0000),
-	PAD_CFG_NF(GPP_I3, NONE, DEEP, NF1),
-	_PAD_CFG_STRUCT(GPP_I4, 0x86800100, 0x0000),
-	PAD_CFG_GPO(GPP_I5, 1, PLTRST),
-	PAD_CFG_GPO(GPP_I6, 0, DEEP),
-	PAD_NC(GPP_I7, NONE),
-	PAD_CFG_GPO(GPP_I8, 0, DEEP),
-	PAD_NC(GPP_I9, NONE),
-	PAD_NC(GPP_I10, NONE),
-	PAD_CFG_NF(GPP_I11, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_I12, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_I13, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_I14, NONE, PLTRST, NF1),
-	PAD_NC(GPP_I15, NONE),
-	PAD_NC(GPP_I16, NONE),
-	PAD_NC(GPP_I17, NONE),
-	PAD_CFG_GPO(GPP_I18, 0, DEEP),
-	PAD_NC(GPP_I19, NONE),
-	PAD_NC(GPP_I20, NONE),
-	PAD_NC(GPP_I21, NONE),
-	PAD_CFG_GPO(GPP_I22, 0, DEEP),
-	PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J1, NONE, PLTRST, NF1),
-	PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1),
-	PAD_NC(GPP_J8, NONE),
-	PAD_NC(GPP_J9, NONE),
-	PAD_CFG_NF(GPP_J10, DN_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_J11, DN_20K, DEEP, NF1),
-	_PAD_CFG_STRUCT(GPP_K0, 0x42800100, 0x0000),
-	PAD_NC(GPP_K1, NONE),
-	PAD_NC(GPP_K2, NONE),
-	PAD_CFG_GPO(GPP_K3, 1, PLTRST),
-	PAD_CFG_GPO(GPP_K4, 0, PWROK),
-	PAD_NC(GPP_K5, NONE),
-	PAD_CFG_NF(GPP_K6, UP_20K, DEEP, NF2),
-	PAD_CFG_NF(GPP_K7, DN_20K, DEEP, NF2),
-	PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_K10, UP_20K, DEEP, NF2),
-	PAD_NC(GPP_K11, NONE),
-	PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
-	PAD_NC(GPP_R5, NONE),
-	PAD_NC(GPP_R6, NONE),
-	PAD_NC(GPP_R7, NONE),
-	PAD_CFG_GPI(GPP_R8, NONE, PLTRST),
-	PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1),
-	PAD_NC(GPP_R10, NONE),
-	PAD_NC(GPP_R11, NONE),
-	PAD_NC(GPP_R12, NONE),
-	PAD_NC(GPP_R13, NONE),
-	PAD_NC(GPP_R14, NONE),
-	PAD_NC(GPP_R15, NONE),
-	PAD_CFG_GPO(GPP_R16, 1, DEEP),
-	PAD_NC(GPP_R17, NONE),
-	PAD_NC(GPP_R18, NONE),
-	PAD_NC(GPP_R19, NONE),
-	PAD_NC(GPP_R20, NONE),
-	PAD_CFG_GPO(GPP_R21, 0, DEEP),
-	PAD_NC(GPP_S0, NONE),
-	PAD_NC(GPP_S1, NONE),
-	PAD_NC(GPP_S2, NONE),
-	PAD_NC(GPP_S3, NONE),
-	PAD_NC(GPP_S4, NONE),
-	PAD_NC(GPP_S5, NONE),
-	PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2),
-};
-
-#endif
-
-#endif

models/addw3/hda_verb.c

@@ -1,48 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-	/* Realtek, ALC256 */
-	0x10ec0256, /* Vendor ID */
-	0x1558a671, /* Subsystem ID */
-	11, /* Number of entries */
-	AZALIA_SUBVENDOR(0, 0x1558a671),
-	AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
-	AZALIA_PIN_CFG(0, 0x13, 0x40000000),
-	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1b, 0x02a11040),
-	AZALIA_PIN_CFG(0, 0x1d, 0x41700001),
-	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x21, 0x02211020),
-	/* Intel, RaptorlakeHDMI */
-	0x80862818, /* Vendor ID */
-	0x80860101, /* Subsystem ID */
-	10, /* Number of entries */
-	AZALIA_SUBVENDOR(2, 0x80860101),
-	AZALIA_PIN_CFG(2, 0x04, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x06, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x08, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
-	/* Nvidia, GenericHDMI */
-	0x10de00a6, /* Vendor ID */
-	0x10de0000, /* Subsystem ID */
-	5, /* Number of entries */
-	AZALIA_SUBVENDOR(0, 0x10de0000),
-	AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
-	AZALIA_PIN_CFG(0, 0x05, 0x585600f0),
-	AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
-	AZALIA_PIN_CFG(0, 0x07, 0x585600f0),
-};
-
-const u32 pc_beep_verbs[] = {};
-
-AZALIA_ARRAY_SIZES;

models/bonw14/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=ddb89e07-21a5-4fc4-a489-a1dd805de663
-EC_FMP_UUID=38bf32e8-d40d-47cd-9412-cd362779ad1b

models/bonw15/AlderLakeFspBinPkg

@@ -1 +0,0 @@
-../addw3/AlderLakeFspBinPkg

models/bonw15/IntelGopDriver.inf

@@ -1,9 +0,0 @@
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = IntelGopDriver
-  FILE_GUID                      = 767222f4-a9f4-41ba-9faa-edaa1405a486
-  MODULE_TYPE                    = UEFI_DRIVER
-  VERSION_STRING                 = 1.0
-
-[Binaries.X64]
-  PE32|IntelGopDriver.efi|*

models/bonw15/README.md

@@ -1,12 +0,0 @@
-# System76 Bonobo WS (bonw15)
-
-## Contents
-
-- [EC](./ec.rom)
-  - *Read Error: No such file or directory (os error 2)*
-- [FD](./fd.rom)
-  - Size: 4 KB
-  - HAP: false
-- [ME](./me.rom)
-  - Size: 3944 KB
-  - Version: 16.1.25.2091

models/bonw15/README.md.in

@@ -1 +0,0 @@
-# System76 Bonobo WS (bonw15)

models/bonw15/chip.txt

@@ -1 +0,0 @@
-GD25Q256D

models/bonw15/coreboot-collector.txt

@@ -1,334 +0,0 @@
-## PCI ##
-PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
-PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
-PCI Device: 0000:00:01.1: Class 0x00060400, Vendor 0x8086, Device 0xA72D, Revision 0x01
-PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
-PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
-PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
-PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
-PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
-PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
-PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
-PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
-PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
-PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
-PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
-PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3E, Revision 0x11
-PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x7A30, Revision 0x11
-PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
-PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x7A50, Revision 0x11
-PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
-PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
-PCI Device: 0000:02:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x27E0, Revision 0xA1
-PCI Device: 0000:02:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BC, Revision 0xA1
-PCI Device: 0000:03:00.0: Class 0x00020000, Vendor 0x8086, Device 0x3101, Revision 0x03
-PCI Device: 0000:04:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
-PCI Device: 0000:05:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
-PCI Device: 0000:05:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
-PCI Device: 0000:05:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
-PCI Device: 0000:05:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
-PCI Device: 0000:06:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1137, Revision 0x00
-PCI Device: 0000:3a:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1138, Revision 0x00
-PCI Device: 10000:e0:1b.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
-PCI Device: 10000:e0:1b.4: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
-PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
-## GPIO ##
-600 Series PCH
-GPP_I0 (0x6E,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
-GPP_I1 (0x6E,0x02) 0x86880100 0x00000019 0x00000000 0x00000000
-GPP_I2 (0x6E,0x04) 0x86880100 0x0000001a 0x00000000 0x00000000
-GPP_I3 (0x6E,0x06) 0x86880100 0x0000001b 0x00000000 0x00000000
-GPP_I4 (0x6E,0x08) 0x86880100 0x0000001c 0x00000000 0x00000000
-GPP_I5 (0x6E,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
-GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
-GPP_I7 (0x6E,0x0E) 0x44000200 0x00000020 0x00000000 0x00000000
-GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
-GPP_I9 (0x6E,0x12) 0x44000200 0x00000022 0x00000000 0x00000000
-GPP_I10 (0x6E,0x14) 0x44000200 0x00000023 0x00000000 0x00000000
-GPP_I11 (0x6E,0x16) 0x44000300 0x00000024 0x00000000 0x00000000
-GPP_I12 (0x6E,0x18) 0x44000300 0x00000025 0x00000000 0x00000000
-GPP_I13 (0x6E,0x1A) 0x44000300 0x00000026 0x00000000 0x00000000
-GPP_I14 (0x6E,0x1C) 0x44000300 0x00000027 0x00000000 0x00000000
-GPP_I15 (0x6E,0x1E) 0x44000200 0x00000028 0x00000000 0x00000000
-GPP_I16 (0x6E,0x20) 0x44000200 0x00000029 0x00000000 0x00000000
-GPP_I17 (0x6E,0x22) 0x44000200 0x0000002a 0x00000000 0x00000000
-GPP_I18 (0x6E,0x24) 0x44000102 0x0000002b 0x00000000 0x00000000
-GPP_I19 (0x6E,0x26) 0x44000200 0x0000002c 0x00000000 0x00000000
-GPP_I20 (0x6E,0x28) 0x44000200 0x0000002d 0x00000000 0x00000000
-GPP_I21 (0x6E,0x2A) 0x44000200 0x0000002e 0x00000000 0x00000000
-GPP_I22 (0x6E,0x2C) 0x44000102 0x00000030 0x00000000 0x00000000
-GPP_R0 (0x6E,0x32) 0x44000500 0x00000031 0x00000000 0x00000000
-GPP_R1 (0x6E,0x34) 0x44000500 0x00003c32 0x00000000 0x00000000
-GPP_R2 (0x6E,0x36) 0x44000500 0x00003c33 0x00000000 0x00000000
-GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
-GPP_R4 (0x6E,0x3A) 0x44000500 0x00000035 0x00000000 0x00000000
-GPP_R5 (0x6E,0x3C) 0x44000200 0x00000036 0x00000000 0x00000000
-GPP_R6 (0x6E,0x3E) 0x44000200 0x00000037 0x00000000 0x00000000
-GPP_R7 (0x6E,0x40) 0x44000200 0x00000038 0x00000000 0x00000000
-GPP_R8 (0x6E,0x42) 0x44000102 0x00000039 0x00000000 0x00000000
-GPP_R9 (0x6E,0x44) 0x44000702 0x0000003a 0x00000000 0x00000000
-GPP_R10 (0x6E,0x46) 0x44000200 0x0000003b 0x00000000 0x00000000
-GPP_R11 (0x6E,0x48) 0x44000200 0x0000003c 0x00000000 0x00000000
-GPP_R12 (0x6E,0x4A) 0x44000200 0x0000003d 0x00000000 0x00000000
-GPP_R13 (0x6E,0x4C) 0x44000200 0x0000003e 0x00000000 0x00000000
-GPP_R14 (0x6E,0x4E) 0x44000200 0x0000003f 0x00000000 0x00000000
-GPP_R15 (0x6E,0x50) 0x44000200 0x00000040 0x00000000 0x00000000
-GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
-GPP_R17 (0x6E,0x54) 0x44000200 0x00000042 0x00000000 0x00000000
-GPP_R18 (0x6E,0x56) 0x44000200 0x00000043 0x00000000 0x00000000
-GPP_R19 (0x6E,0x58) 0x44000200 0x00000044 0x00000000 0x00000000
-GPP_R20 (0x6E,0x5A) 0x44000200 0x00000045 0x00000000 0x00000000
-GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
-GPP_J0 (0x6E,0x60) 0x44000500 0x00000047 0x00000000 0x00000000
-GPP_J1 (0x6E,0x62) 0x44000700 0x00000048 0x00000000 0x00000000
-GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
-GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
-GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
-GPP_J5 (0x6E,0x6A) 0x44000500 0x0000304c 0x00000000 0x00000000
-GPP_J6 (0x6E,0x6C) 0x44000500 0x0000004d 0x00000000 0x00000000
-GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
-GPP_J8 (0x6E,0x70) 0x44000102 0x00000050 0x00000000 0x00000000
-GPP_J9 (0x6E,0x72) 0x44000200 0x00000051 0x00000000 0x00000000
-GPP_J10 (0x6E,0x74) 0x44000200 0x00000052 0x00000000 0x00000000
-GPP_J11 (0x6E,0x76) 0x44000200 0x00000053 0x00000000 0x00000000
-GPP_B0 (0x6D,0x00) 0x82900102 0x00000050 0x00000000 0x00000000
-GPP_B1 (0x6D,0x02) 0x44000200 0x00000051 0x00000000 0x00000000
-GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
-GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
-GPP_B4 (0x6D,0x08) 0x44000200 0x00000054 0x00000000 0x00000000
-GPP_B5 (0x6D,0x0A) 0x44000200 0x00000055 0x00000000 0x00000000
-GPP_B6 (0x6D,0x0C) 0x44000200 0x00000056 0x00000000 0x00000000
-GPP_B7 (0x6D,0x0E) 0x44000200 0x00000057 0x00000000 0x00000000
-GPP_B8 (0x6D,0x10) 0x44000200 0x00000058 0x00000000 0x00000000
-GPP_B9 (0x6D,0x12) 0x44000200 0x00000059 0x00000000 0x00000000
-GPP_B10 (0x6D,0x14) 0x44000200 0x0000005a 0x00000000 0x00000000
-GPP_B11 (0x6D,0x16) 0x44000200 0x0000005b 0x00000000 0x00000000
-GPP_B12 (0x6D,0x18) 0x44000700 0x0000005c 0x00000000 0x00000000
-GPP_B13 (0x6D,0x1A) 0x44000700 0x0000005d 0x00000000 0x00000000
-GPP_B14 (0x6D,0x1C) 0x44000600 0x0000005e 0x00000000 0x00000000
-GPP_B15 (0x6D,0x1E) 0x44000200 0x0000005f 0x00000000 0x00000000
-GPP_B16 (0x6D,0x20) 0x44000200 0x00000060 0x00000000 0x00000000
-GPP_B17 (0x6D,0x22) 0x04000201 0x00000061 0x00000000 0x00000000
-GPP_B18 (0x6D,0x24) 0x04000702 0x00000062 0x00000000 0x00000000
-GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
-GPP_B20 (0x6D,0x28) 0x44000200 0x00000064 0x00000000 0x00000000
-GPP_B21 (0x6D,0x2A) 0x44000200 0x00000065 0x00000000 0x00000000
-GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
-GPP_B23 (0x6D,0x2E) 0x44000102 0x00000067 0x00000800 0x00000000
-GPP_G0 (0x6D,0x30) 0x04000200 0x00000068 0x00000000 0x00000000
-GPP_G1 (0x6D,0x32) 0x44000100 0x00000069 0x00000000 0x00000000
-GPP_G2 (0x6D,0x34) 0x44000100 0x0000106a 0x00000000 0x00000000
-GPP_G3 (0x6D,0x36) 0x44000102 0x0000006b 0x00000000 0x00000000
-GPP_G4 (0x6D,0x38) 0x44000100 0x0000006c 0x00000000 0x00000000
-GPP_G5 (0x6D,0x3A) 0x44000700 0x0000006d 0x00000000 0x00000000
-GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
-GPP_G7 (0x6D,0x3E) 0x42800102 0x0000006f 0x00000000 0x00000000
-GPP_H0 (0x6D,0x40) 0x44000102 0x00000070 0x00000000 0x00000000
-GPP_H1 (0x6D,0x42) 0x44000200 0x00000071 0x00000000 0x00000000
-GPP_H2 (0x6D,0x44) 0x44000100 0x00000072 0x00000000 0x00000000
-GPP_H3 (0x6D,0x46) 0x44000702 0x00000073 0x00000000 0x00000000
-GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
-GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
-GPP_H6 (0x6D,0x4C) 0x44000300 0x00000076 0x00000000 0x00000000
-GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
-GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
-GPP_H9 (0x6D,0x52) 0x44000702 0x00000019 0x00000000 0x00000000
-GPP_H10 (0x6D,0x54) 0x44000502 0x00000020 0x00000000 0x00000000
-GPP_H11 (0x6D,0x56) 0x44000502 0x00000021 0x00000000 0x00000000
-GPP_H12 (0x6D,0x58) 0x44000102 0x00000022 0x00000000 0x00000000
-GPP_H13 (0x6D,0x5A) 0x44000502 0x00000023 0x00000000 0x00000000
-GPP_H14 (0x6D,0x5C) 0x44000500 0x00000024 0x00000000 0x00000000
-GPP_H15 (0x6D,0x5E) 0x44000102 0x00000025 0x00000800 0x00000000
-GPP_H16 (0x6D,0x60) 0x44000102 0x00000026 0x00000000 0x00000000
-GPP_H17 (0x6D,0x62) 0x44000201 0x00000027 0x00000000 0x00000000
-GPP_H18 (0x6D,0x64) 0x44000102 0x00000028 0x00000000 0x00000000
-GPP_H19 (0x6D,0x66) 0x44000200 0x00000029 0x00000000 0x00000000
-GPP_H20 (0x6D,0x68) 0x44000200 0x0000002a 0x00000000 0x00000000
-GPP_H21 (0x6D,0x6A) 0x44000201 0x0000002b 0x00000000 0x00000000
-GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
-GPP_H23 (0x6D,0x6E) 0x44000102 0x0000002d 0x00000000 0x00000000
-GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
-GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
-GPD2 (0x6C,0x04) 0x42880102 0x00000062 0x00000000 0x00000000
-GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
-GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
-GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
-GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
-GPD7 (0x6C,0x0E) 0x04000100 0x00000067 0x00000000 0x00000000
-GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
-GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
-GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
-GPD11 (0x6C,0x16) 0x44000200 0x0000006b 0x00000000 0x00000000
-GPD12 (0x6C,0x18) 0x44000200 0x0000006c 0x00000000 0x00000000
-GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
-GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
-GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
-GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
-GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
-GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
-GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
-GPP_A7 (0x6B,0x20) 0x44000200 0x00000025 0x00000000 0x00000000
-GPP_A8 (0x6B,0x22) 0x44000200 0x00000026 0x00000000 0x00000000
-GPP_A9 (0x6B,0x24) 0x44000200 0x00000027 0x00000000 0x00000000
-GPP_A10 (0x6B,0x26) 0x44000500 0x00000028 0x00000000 0x00000000
-GPP_A11 (0x6B,0x28) 0x44000102 0x00003029 0x00000000 0x00000000
-GPP_A12 (0x6B,0x2A) 0x44000200 0x0000002a 0x00000000 0x00000000
-GPP_A13 (0x6B,0x2C) 0x44000200 0x0000002b 0x00000000 0x00000000
-GPP_A14 (0x6B,0x2E) 0x44000200 0x0000002c 0x00000000 0x00000000
-GPP_C0 (0x6B,0x32) 0x44000502 0x0000002d 0x00000000 0x00000000
-GPP_C1 (0x6B,0x34) 0x44000502 0x0000002e 0x00000000 0x00000000
-GPP_C2 (0x6B,0x36) 0x84000102 0x0000002f 0x00000800 0x00000000
-GPP_C3 (0x6B,0x38) 0x44000200 0x00000030 0x00000000 0x00000000
-GPP_C4 (0x6B,0x3A) 0x44000200 0x00000031 0x00000000 0x00000000
-GPP_C5 (0x6B,0x3C) 0x44000502 0x00000032 0x00000000 0x00000000
-GPP_C6 (0x6B,0x3E) 0x44000200 0x00000033 0x00000000 0x00000000
-GPP_C7 (0x6B,0x40) 0x44000200 0x00000034 0x00000000 0x00000000
-GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
-GPP_C9 (0x6B,0x44) 0x44000200 0x00000036 0x00000000 0x00000000
-GPP_C10 (0x6B,0x46) 0x44000200 0x00000037 0x00000000 0x00000000
-GPP_C11 (0x6B,0x48) 0x44000200 0x00000038 0x00000000 0x00000000
-GPP_C12 (0x6B,0x4A) 0x44000200 0x00000039 0x00000000 0x00000000
-GPP_C13 (0x6B,0x4C) 0x44000200 0x0000003a 0x00000000 0x00000000
-GPP_C14 (0x6B,0x4E) 0x44000200 0x0000003b 0x00000000 0x00000000
-GPP_C15 (0x6B,0x50) 0x44000200 0x0000003c 0x00000000 0x00000000
-GPP_C16 (0x6B,0x52) 0x44000502 0x0000003d 0x00000000 0x00000000
-GPP_C17 (0x6B,0x54) 0x44000502 0x0000003e 0x00000000 0x00000000
-GPP_C18 (0x6B,0x56) 0x44000502 0x0000003f 0x00000000 0x00000000
-GPP_C19 (0x6B,0x58) 0x44000502 0x00000040 0x00000000 0x00000000
-GPP_C20 (0x6B,0x5A) 0x44000102 0x00000041 0x00000000 0x00000000
-GPP_C21 (0x6B,0x5C) 0x44000102 0x00000042 0x00000000 0x00000000
-GPP_C22 (0x6B,0x5E) 0x44000200 0x00000043 0x00000000 0x00000000
-GPP_C23 (0x6B,0x60) 0x44000200 0x00000044 0x00000000 0x00000000
-GPP_S0 (0x6A,0x00) 0x44000200 0x01800030 0x00000000 0x00000000
-GPP_S1 (0x6A,0x02) 0x44000200 0x01800031 0x00000000 0x00000000
-GPP_S2 (0x6A,0x04) 0x44000200 0x01800032 0x00000000 0x00000000
-GPP_S3 (0x6A,0x06) 0x44000200 0x01800033 0x00000000 0x00000000
-GPP_S4 (0x6A,0x08) 0x44000200 0x01800034 0x00000000 0x00000000
-GPP_S5 (0x6A,0x0A) 0x44000200 0x01800035 0x00000000 0x00000000
-GPP_S6 (0x6A,0x0C) 0x44000200 0x01800036 0x00000000 0x00000000
-GPP_S7 (0x6A,0x0E) 0x44000200 0x01800037 0x00000000 0x00000000
-GPP_E0 (0x6A,0x10) 0x44000200 0x00000038 0x00000000 0x00000000
-GPP_E1 (0x6A,0x12) 0x44000200 0x00000039 0x00000000 0x00000000
-GPP_E2 (0x6A,0x14) 0x44000200 0x0000003a 0x00000000 0x00000000
-GPP_E3 (0x6A,0x16) 0x44000200 0x0000003b 0x00000000 0x00000000
-GPP_E4 (0x6A,0x18) 0x44000200 0x0000003c 0x00000000 0x00000000
-GPP_E5 (0x6A,0x1A) 0x44000200 0x0000003d 0x00000000 0x00000000
-GPP_E6 (0x6A,0x1C) 0x44000200 0x0000003e 0x00000000 0x00000000
-GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
-GPP_E8 (0x6A,0x20) 0x44000500 0x00000040 0x00000000 0x00000000
-GPP_E9 (0x6A,0x22) 0x44000300 0x00000041 0x00000800 0x00000000
-GPP_E10 (0x6A,0x24) 0x44000300 0x00000042 0x00000800 0x00000000
-GPP_E11 (0x6A,0x26) 0x44000300 0x00000043 0x00000800 0x00000000
-GPP_E12 (0x6A,0x28) 0x44000300 0x00000044 0x00000000 0x00000000
-GPP_E13 (0x6A,0x2A) 0x44000200 0x00000045 0x00000000 0x00000000
-GPP_E14 (0x6A,0x2C) 0x44000200 0x00000046 0x00000000 0x00000000
-GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
-GPP_E16 (0x6A,0x30) 0x44000200 0x00000048 0x00000000 0x00000000
-GPP_E17 (0x6A,0x32) 0x44000200 0x00000049 0x00000000 0x00000000
-GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
-GPP_E19 (0x6A,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
-GPP_E20 (0x6A,0x38) 0x44000200 0x0000004c 0x00000000 0x00000000
-GPP_E21 (0x6A,0x3A) 0x44000200 0x0000004d 0x00000000 0x00000000
-GPP_K0 (0x6A,0x3E) 0x44000200 0x0000004e 0x00000000 0x00000000
-GPP_K1 (0x6A,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
-GPP_K2 (0x6A,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
-GPP_K3 (0x6A,0x44) 0x44000200 0x00000052 0x00000000 0x00000000
-GPP_K4 (0x6A,0x46) 0x44000200 0x00000053 0x00000000 0x00000000
-GPP_K5 (0x6A,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
-GPP_K6 (0x6A,0x4A) 0x44000a02 0x00000055 0x00000000 0x00000000
-GPP_K7 (0x6A,0x4C) 0x44000a02 0x00000056 0x00000000 0x00000000
-GPP_K8 (0x6A,0x4E) 0x44000700 0x00000057 0x00000000 0x00000000
-GPP_K9 (0x6A,0x50) 0x44000700 0x00000058 0x00000000 0x00000000
-GPP_K10 (0x6A,0x52) 0x44000a02 0x00000059 0x00000000 0x00000000
-GPP_K11 (0x6A,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
-GPP_F0 (0x6A,0x5C) 0x44000200 0x0000005b 0x00000000 0x00000000
-GPP_F1 (0x6A,0x5E) 0x44000200 0x0000005c 0x00000000 0x00000000
-GPP_F2 (0x6A,0x60) 0x44000200 0x0000005d 0x00000000 0x00000000
-GPP_F3 (0x6A,0x62) 0x44000200 0x0000005e 0x00000000 0x00000000
-GPP_F4 (0x6A,0x64) 0x44000200 0x00000060 0x00000000 0x00000000
-GPP_F5 (0x6A,0x66) 0x84000200 0x00000061 0x00000000 0x00000000
-GPP_F6 (0x6A,0x68) 0x44000200 0x00000062 0x00000000 0x00000000
-GPP_F7 (0x6A,0x6A) 0x44000200 0x00000063 0x00000000 0x00000000
-GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
-GPP_F9 (0x6A,0x6E) 0x42880102 0x00000065 0x00000000 0x00000000
-GPP_F10 (0x6A,0x70) 0x44000200 0x00000066 0x00000000 0x00000000
-GPP_F11 (0x6A,0x72) 0x44000200 0x00000067 0x00000000 0x00000000
-GPP_F12 (0x6A,0x74) 0x44000200 0x00000068 0x00000000 0x00000000
-GPP_F13 (0x6A,0x76) 0x44000200 0x00000069 0x00000000 0x00000000
-GPP_F14 (0x6A,0x78) 0x44000200 0x0000006a 0x00000000 0x00000000
-GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
-GPP_F16 (0x6A,0x7C) 0x44000200 0x0000006c 0x00000000 0x00000000
-GPP_F17 (0x6A,0x7E) 0x44000200 0x0000006d 0x00000000 0x00000000
-GPP_F18 (0x6A,0x80) 0x44000200 0x0000006e 0x00000000 0x00000000
-GPP_F19 (0x6A,0x82) 0x44000700 0x0000006f 0x00000000 0x00000000
-GPP_F20 (0x6A,0x84) 0x44000700 0x00000070 0x00000000 0x00000000
-GPP_F21 (0x6A,0x86) 0x44000700 0x00000071 0x00000000 0x00000000
-GPP_F22 (0x6A,0x88) 0x44000201 0x00000072 0x00000000 0x00000000
-GPP_F23 (0x6A,0x8A) 0x44000200 0x00000073 0x00000000 0x00000000
-GPP_D0 (0x69,0x20) 0x44000200 0x00000026 0x00000000 0x00000000
-GPP_D1 (0x69,0x22) 0x44000200 0x00000027 0x00000000 0x00000000
-GPP_D2 (0x69,0x24) 0x44000200 0x00000028 0x00000000 0x00000000
-GPP_D3 (0x69,0x26) 0x44000200 0x00000029 0x00000000 0x00000000
-GPP_D4 (0x69,0x28) 0x44000200 0x0000002a 0x00000000 0x00000000
-GPP_D5 (0x69,0x2A) 0x44000200 0x0000002b 0x00000000 0x00000000
-GPP_D6 (0x69,0x2C) 0x44000200 0x0000002c 0x00000000 0x00000000
-GPP_D7 (0x69,0x2E) 0x44000200 0x0000002d 0x00000000 0x00000000
-GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
-GPP_D9 (0x69,0x32) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D10 (0x69,0x34) 0x40000702 0x00003c00 0x00000000 0x00000000
-GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
-GPP_D13 (0x69,0x3A) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D14 (0x69,0x3C) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
-GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
-GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
-GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
-GPP_D22 (0x69,0x4C) 0x40000702 0x00000000 0x00000000 0x00000000
-GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
-## HDAUDIO ##
-hdaudioC0D0
-  vendor_name: Realtek
-  chip_name: ALC1220
-  vendor_id: 0x10ec1220
-  subsystem_id: 0x15583702
-  revision_id: 0x100101
-  0x12: 0x90a60130
-  0x14: 0x0421101f
-  0x15: 0x40000000
-  0x16: 0x411111f0
-  0x17: 0x411111f0
-  0x18: 0x04a11040
-  0x19: 0x411111f0
-  0x1a: 0x411111f0
-  0x1b: 0x90170110
-  0x1d: 0x40b7952d
-  0x1e: 0x04451150
-hdaudioC0D2
-  vendor_name: Intel
-  chip_name: Raptorlake HDMI
-  vendor_id: 0x80862818
-  subsystem_id: 0x80860101
-  revision_id: 0x100000
-  0x04: 0x18560010
-  0x06: 0x18560010
-  0x08: 0x18560010
-  0x0a: 0x18560010
-  0x0b: 0x18560010
-  0x0c: 0x18560010
-  0x0d: 0x18560010
-  0x0e: 0x18560010
-  0x0f: 0x18560010
-hdaudioC1D0
-  vendor_name: Nvidia
-  chip_name: Generic HDMI
-  vendor_id: 0x10de00a5
-  subsystem_id: 0x10de0000
-  revision_id: 0x100100
-  0x04: 0x585600f0
-  0x05: 0x185600f0
-  0x06: 0x185600f0
-  0x07: 0x185600f0

models/bonw15/coreboot.config

@@ -1,26 +0,0 @@
-CONFIG_VENDOR_SYSTEM76=y
-CONFIG_BOARD_SYSTEM76_BONW15=y
-CONFIG_CCACHE=y
-CONFIG_CONSOLE_SERIAL=n
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_HAVE_ME_BIN=y
-CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
-CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
-CONFIG_PAYLOAD_ELF=y
-CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
-CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
-CONFIG_POST_IO=n
-CONFIG_SMMSTORE=y
-CONFIG_SMMSTORE_V2=y
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
-#CONFIG_CONSOLE_SYSTEM76_EC=y
-
-# Custom FSP
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Fsp.fd"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Include"
-CONFIG_FSP_USE_REPO=n

models/bonw15/ec.config

@@ -1 +0,0 @@
-BOARD=system76/bonw15

models/bonw15/ecspy.txt

@@ -1,89 +0,0 @@
-id 5570 rev 6
-A0: data 1 mirror 1 pot 0 control 80
-A1: data 0 mirror 0 pot 0 control 00
-A2: data 1 mirror 0 pot 0 control 00
-A3: data 0 mirror 0 pot 0 control 00
-A4: data 0 mirror 1 pot 0 control 00
-A5: data 0 mirror 0 pot 0 control 00
-A6: data 0 mirror 0 pot 0 control 00
-A7: data 0 mirror 0 pot 0 control 00
-B0: data 0 mirror 0 pot 0 control 84
-B1: data 1 mirror 1 pot 0 control 84
-B2: data 1 mirror 1 pot 0 control 84
-B3: data 1 mirror 1 pot 0 control 80
-B4: data 1 mirror 1 pot 0 control 40
-B5: data 1 mirror 1 pot 0 control 40
-B6: data 1 mirror 1 pot 0 control 44
-B7: data 1 mirror 1 pot 0 control 80
-C0: data 1 mirror 1 pot 0 control 80
-C1: data 1 mirror 1 pot 0 control 04
-C2: data 1 mirror 1 pot 0 control 04
-C3: data 0 mirror 0 pot 0 control 04
-C4: data 0 mirror 0 pot 0 control 84
-C5: data 0 mirror 0 pot 0 control 04
-C6: data 1 mirror 1 pot 0 control 40
-C7: data 1 mirror 1 pot 0 control 44
-D0: data 1 mirror 1 pot 0 control 40
-D1: data 1 mirror 1 pot 0 control 44
-D2: data 1 mirror 1 pot 0 control 00
-D3: data 0 mirror 0 pot 0 control 40
-D4: data 0 mirror 0 pot 0 control 40
-D5: data 1 mirror 1 pot 0 control 44
-D6: data 0 mirror 0 pot 0 control 02
-D7: data 1 mirror 1 pot 0 control 02
-E0: data 1 mirror 1 pot 0 control 04
-E1: data 1 mirror 1 pot 0 control 44
-E2: data 1 mirror 1 pot 0 control 84
-E3: data 1 mirror 1 pot 0 control 40
-E4: data 1 mirror 1 pot 0 control 42
-E5: data 1 mirror 1 pot 0 control 40
-E6: data 0 mirror 0 pot 0 control 80
-E7: data 1 mirror 1 pot 0 control 04
-F0: data 0 mirror 0 pot 0 control 44
-F1: data 1 mirror 1 pot 0 control 44
-F2: data 1 mirror 1 pot 0 control 44
-F3: data 1 mirror 1 pot 0 control 40
-F4: data 1 mirror 1 pot 0 control 04
-F5: data 1 mirror 1 pot 0 control 04
-F6: data 1 mirror 1 pot 0 control 40
-F7: data 1 mirror 1 pot 0 control 80
-G0: data 1 mirror 1 pot 0 control 80
-G1: data 1 mirror 1 pot 0 control 40
-G2: data 1 mirror 1 pot 0 control 80
-G3: data 0 mirror 0 pot 0 control 00
-G4: data 0 mirror 0 pot 0 control 00
-G5: data 0 mirror 0 pot 0 control 00
-G6: data 0 mirror 0 pot 0 control 44
-G7: data 0 mirror 0 pot 0 control 00
-H0: data 0 mirror 0 pot 0 control 80
-H1: data 1 mirror 1 pot 0 control 80
-H2: data 0 mirror 0 pot 0 control 44
-H3: data 1 mirror 1 pot 0 control 80
-H4: data 0 mirror 0 pot 0 control 80
-H5: data 0 mirror 0 pot 0 control 44
-H6: data 1 mirror 1 pot 0 control 40
-H7: data 1 mirror 1 pot 0 control 80
-I0: data 0 mirror 0 pot 0 control 00
-I1: data 0 mirror 0 pot 0 control 00
-I2: data 0 mirror 0 pot 0 control 80
-I3: data 0 mirror 0 pot 0 control 00
-I4: data 0 mirror 0 pot 0 control 00
-I5: data 1 mirror 1 pot 0 control 40
-I6: data 0 mirror 0 pot 0 control 00
-I7: data 0 mirror 0 pot 0 control 00
-J0: data 1 mirror 1 pot 0 control 44
-J1: data 1 mirror 1 pot 0 control 40
-J2: data 1 mirror 1 pot 0 control 80
-J3: data 0 mirror 0 pot 0 control 80
-J4: data 1 mirror 1 pot 0 control 40
-J5: data 1 mirror 1 pot 0 control 80
-J6: data 0 mirror 0 pot 0 control 44
-J7: data 0 mirror 0 pot 0 control 84
-M0: data 0 mirror 0 control 06
-M1: data 0 mirror 0 control 06
-M2: data 1 mirror 1 control 06
-M3: data 1 mirror 1 control 06
-M4: data 0 mirror 1 control 06
-M5: data 0 mirror 0 control 00
-M6: data 0 mirror 0 control 86
-M7: data 0 mirror 0 control 00

models/bonw15/edk2.config

@@ -1,13 +0,0 @@
-BOOTLOADER=COREBOOT
-DISABLE_SERIAL_TERMINAL=TRUE
-PLATFORM_BOOT_TIMEOUT=2
-PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
-SERIAL_DRIVER_ENABLE=FALSE
-SHELL_TYPE=NONE
-TPM_ENABLE=TRUE
-#SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=2cf0f73c-f043-425a-a50e-111169eb6697
-EC_FMP_UUID=50cb5c95-5618-49b9-a075-ce47d990daad

models/bonw15/gpio.h

@@ -1,272 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_GPIO_H
-#define MAINBOARD_GPIO_H
-
-#include <soc/gpe.h>
-#include <soc/gpio.h>
-
-#ifndef __ACPI__
-
-/* Pad configuration in ramstage. */
-static const struct pad_config gpio_table[] = {
-	PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
-	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
-	_PAD_CFG_STRUCT(GPD2, 0x42880100, 0x0000),
-	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
-	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
-	PAD_CFG_GPI(GPD7, NONE, PWROK),
-	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
-	PAD_CFG_GPO(GPD9, 0, PWROK),
-	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
-	PAD_CFG_GPO(GPD11, 0, DEEP),
-	PAD_CFG_GPO(GPD12, 0, DEEP),
-	PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_A7, 0, DEEP),
-	PAD_CFG_GPO(GPP_A8, 0, DEEP),
-	PAD_CFG_GPO(GPP_A9, 0, DEEP),
-	PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
-	PAD_CFG_GPO(GPP_A12, 0, DEEP),
-	PAD_CFG_GPO(GPP_A13, 0, DEEP),
-	PAD_CFG_GPO(GPP_A14, 0, DEEP),
-	_PAD_CFG_STRUCT(GPP_B0, 0x82900100, 0x0000),
-	PAD_CFG_GPO(GPP_B1, 0, DEEP),
-	PAD_CFG_GPI(GPP_B2, NONE, DEEP),
-	PAD_CFG_GPO(GPP_B3, 1, DEEP),
-	PAD_CFG_GPO(GPP_B4, 0, DEEP),
-	PAD_CFG_GPO(GPP_B5, 0, DEEP),
-	PAD_CFG_GPO(GPP_B6, 0, DEEP),
-	PAD_CFG_GPO(GPP_B7, 0, DEEP),
-	PAD_CFG_GPO(GPP_B8, 0, DEEP),
-	PAD_CFG_GPO(GPP_B9, 0, DEEP),
-	PAD_CFG_GPO(GPP_B10, 0, DEEP),
-	PAD_CFG_GPO(GPP_B11, 0, DEEP),
-	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_B15, 0, DEEP),
-	PAD_CFG_GPO(GPP_B16, 0, DEEP),
-	PAD_CFG_GPO(GPP_B17, 1, PWROK),
-	PAD_CFG_NF(GPP_B18, NONE, PWROK, NF1),
-	PAD_CFG_GPO(GPP_B19, 1, DEEP),
-	PAD_CFG_GPO(GPP_B20, 0, DEEP),
-	PAD_CFG_GPO(GPP_B21, 0, DEEP),
-	PAD_CFG_GPO(GPP_B22, 1, DEEP),
-	PAD_CFG_GPI(GPP_B23, NONE, DEEP),
-	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_C2, NONE, PLTRST),
-	PAD_CFG_GPO(GPP_C3, 0, DEEP),
-	PAD_CFG_GPO(GPP_C4, 0, DEEP),
-	PAD_CFG_NF(GPP_C5, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_C6, 0, DEEP),
-	PAD_CFG_GPO(GPP_C7, 0, DEEP),
-	PAD_CFG_GPI(GPP_C8, NONE, DEEP),
-	PAD_CFG_GPO(GPP_C9, 0, DEEP),
-	PAD_CFG_GPO(GPP_C10, 0, DEEP),
-	PAD_CFG_GPO(GPP_C11, 0, DEEP),
-	PAD_CFG_GPO(GPP_C12, 0, DEEP),
-	PAD_CFG_GPO(GPP_C13, 0, DEEP),
-	PAD_CFG_GPO(GPP_C14, 0, DEEP),
-	PAD_CFG_GPO(GPP_C15, 0, DEEP),
-	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_C20, NONE, DEEP),
-	PAD_CFG_GPI(GPP_C21, NONE, DEEP),
-	PAD_CFG_GPO(GPP_C22, 0, DEEP),
-	PAD_CFG_GPO(GPP_C23, 0, DEEP),
-	PAD_CFG_GPO(GPP_D0, 0, DEEP),
-	PAD_CFG_GPO(GPP_D1, 0, DEEP),
-	PAD_CFG_GPO(GPP_D2, 0, DEEP),
-	PAD_CFG_GPO(GPP_D3, 0, DEEP),
-	PAD_CFG_GPO(GPP_D4, 0, DEEP),
-	PAD_CFG_GPO(GPP_D5, 0, DEEP),
-	PAD_CFG_GPO(GPP_D6, 0, DEEP),
-	PAD_CFG_GPO(GPP_D7, 0, DEEP),
-	PAD_NC(GPP_D8, NONE),
-	PAD_CFG_NF(GPP_D9, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D14, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D15, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D16, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D18, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D19, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_E0, 0, DEEP),
-	PAD_CFG_GPO(GPP_E1, 0, DEEP),
-	PAD_CFG_GPO(GPP_E2, 0, DEEP),
-	PAD_CFG_GPO(GPP_E3, 0, DEEP),
-	PAD_CFG_GPO(GPP_E4, 0, DEEP),
-	PAD_CFG_GPO(GPP_E5, 0, DEEP),
-	PAD_CFG_GPO(GPP_E6, 0, DEEP),
-	_PAD_CFG_STRUCT(GPP_E7, 0x80100100, 0x0000),
-	PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
-	PAD_NC(GPP_E9, NONE),
-	PAD_NC(GPP_E10, NONE),
-	PAD_NC(GPP_E11, NONE),
-	PAD_NC(GPP_E12, NONE),
-	PAD_CFG_GPO(GPP_E13, 0, DEEP),
-	PAD_CFG_GPO(GPP_E14, 0, DEEP),
-	PAD_CFG_GPO(GPP_E15, 0, DEEP),
-	PAD_CFG_GPO(GPP_E16, 0, DEEP),
-	PAD_CFG_GPO(GPP_E17, 0, DEEP),
-	PAD_CFG_GPO(GPP_E18, 1, DEEP),
-	PAD_CFG_GPO(GPP_E19, 0, DEEP),
-	PAD_CFG_GPO(GPP_E20, 0, DEEP),
-	PAD_CFG_GPO(GPP_E21, 0, DEEP),
-	PAD_CFG_GPO(GPP_F0, 0, DEEP),
-	PAD_CFG_GPO(GPP_F1, 0, DEEP),
-	PAD_CFG_GPO(GPP_F2, 0, DEEP),
-	PAD_CFG_GPO(GPP_F3, 0, DEEP),
-	PAD_CFG_GPO(GPP_F4, 0, DEEP),
-	PAD_CFG_GPO(GPP_F5, 0, PLTRST),
-	PAD_CFG_GPO(GPP_F6, 0, DEEP),
-	PAD_CFG_GPO(GPP_F7, 0, DEEP),
-	PAD_CFG_GPI(GPP_F8, NONE, DEEP),
-	_PAD_CFG_STRUCT(GPP_F9, 0x42880100, 0x0000),
-	PAD_CFG_GPO(GPP_F10, 0, DEEP),
-	PAD_CFG_GPO(GPP_F11, 0, DEEP),
-	PAD_CFG_GPO(GPP_F12, 0, DEEP),
-	PAD_CFG_GPO(GPP_F13, 0, DEEP),
-	PAD_CFG_GPO(GPP_F14, 0, DEEP),
-	PAD_CFG_GPI(GPP_F15, NONE, DEEP),
-	PAD_CFG_GPO(GPP_F16, 0, DEEP),
-	PAD_CFG_GPO(GPP_F17, 0, DEEP),
-	PAD_CFG_GPO(GPP_F18, 0, DEEP),
-	PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_F22, 1, DEEP),
-	PAD_CFG_GPO(GPP_F23, 0, DEEP),
-	PAD_CFG_GPO(GPP_G0, 0, PWROK),
-	PAD_CFG_GPI(GPP_G1, NONE, DEEP),
-	PAD_CFG_GPI(GPP_G2, DN_20K, DEEP),
-	PAD_CFG_GPI(GPP_G3, NONE, DEEP),
-	PAD_CFG_GPI(GPP_G4, NONE, DEEP),
-	PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_G6, NONE, DEEP),
-	_PAD_CFG_STRUCT(GPP_G7, 0x42800100, 0x0000),
-	PAD_CFG_GPI(GPP_H0, NONE, DEEP),
-	PAD_CFG_GPO(GPP_H1, 0, DEEP),
-	PAD_CFG_GPI(GPP_H2, NONE, DEEP),
-	PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
-	PAD_NC(GPP_H6, NONE),
-	PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_H12, NONE, DEEP),
-	PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H14, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_H15, NONE, DEEP),
-	PAD_CFG_GPI(GPP_H16, NONE, DEEP),
-	PAD_CFG_GPO(GPP_H17, 1, DEEP),
-	PAD_CFG_GPI(GPP_H18, NONE, DEEP),
-	PAD_CFG_GPO(GPP_H19, 0, DEEP),
-	PAD_CFG_GPO(GPP_H20, 0, DEEP),
-	PAD_CFG_GPO(GPP_H21, 1, DEEP),
-	PAD_CFG_GPO(GPP_H22, 0, DEEP),
-	PAD_CFG_GPI(GPP_H23, NONE, DEEP),
-	PAD_CFG_GPO(GPP_I0, 0, DEEP),
-	_PAD_CFG_STRUCT(GPP_I1, 0x86880100, 0x0000),
-	_PAD_CFG_STRUCT(GPP_I2, 0x86880100, 0x0000),
-	_PAD_CFG_STRUCT(GPP_I3, 0x86880100, 0x0000),
-	_PAD_CFG_STRUCT(GPP_I4, 0x86880100, 0x0000),
-	PAD_CFG_GPO(GPP_I5, 0, DEEP),
-	PAD_CFG_GPO(GPP_I6, 0, DEEP),
-	PAD_CFG_GPO(GPP_I7, 0, DEEP),
-	PAD_CFG_GPO(GPP_I8, 0, DEEP),
-	PAD_CFG_GPO(GPP_I9, 0, DEEP),
-	PAD_CFG_GPO(GPP_I10, 0, DEEP),
-	PAD_NC(GPP_I11, NONE),
-	PAD_NC(GPP_I12, NONE),
-	PAD_NC(GPP_I13, NONE),
-	PAD_NC(GPP_I14, NONE),
-	PAD_CFG_GPO(GPP_I15, 0, DEEP),
-	PAD_CFG_GPO(GPP_I16, 0, DEEP),
-	PAD_CFG_GPO(GPP_I17, 0, DEEP),
-	PAD_CFG_GPI(GPP_I18, NONE, DEEP),
-	PAD_CFG_GPO(GPP_I19, 0, DEEP),
-	PAD_CFG_GPO(GPP_I20, 0, DEEP),
-	PAD_CFG_GPO(GPP_I21, 0, DEEP),
-	PAD_CFG_GPI(GPP_I22, NONE, DEEP),
-	PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J1, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_J8, NONE, DEEP),
-	PAD_CFG_GPO(GPP_J9, 0, DEEP),
-	PAD_CFG_GPO(GPP_J10, 0, DEEP),
-	PAD_CFG_GPO(GPP_J11, 0, DEEP),
-	PAD_CFG_GPO(GPP_K0, 0, DEEP),
-	PAD_CFG_GPO(GPP_K1, 0, DEEP),
-	PAD_CFG_GPO(GPP_K2, 0, DEEP),
-	PAD_CFG_GPO(GPP_K3, 0, DEEP),
-	PAD_CFG_GPO(GPP_K4, 0, DEEP),
-	PAD_CFG_GPO(GPP_K5, 0, DEEP),
-	PAD_CFG_NF(GPP_K6, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_K7, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_K10, NONE, DEEP, NF2),
-	PAD_CFG_GPO(GPP_K11, 0, DEEP),
-	PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_R5, 0, DEEP),
-	PAD_CFG_GPO(GPP_R6, 0, DEEP),
-	PAD_CFG_GPO(GPP_R7, 0, DEEP),
-	PAD_CFG_GPI(GPP_R8, NONE, DEEP),
-	PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_R10, 0, DEEP),
-	PAD_CFG_GPO(GPP_R11, 0, DEEP),
-	PAD_CFG_GPO(GPP_R12, 0, DEEP),
-	PAD_CFG_GPO(GPP_R13, 0, DEEP),
-	PAD_CFG_GPO(GPP_R14, 0, DEEP),
-	PAD_CFG_GPO(GPP_R15, 0, DEEP),
-	PAD_CFG_GPO(GPP_R16, 1, DEEP),
-	PAD_CFG_GPO(GPP_R17, 0, DEEP),
-	PAD_CFG_GPO(GPP_R18, 0, DEEP),
-	PAD_CFG_GPO(GPP_R19, 0, DEEP),
-	PAD_CFG_GPO(GPP_R20, 0, DEEP),
-	PAD_CFG_GPO(GPP_R21, 0, DEEP),
-	PAD_CFG_GPO(GPP_S0, 0, DEEP),
-	PAD_CFG_GPO(GPP_S1, 0, DEEP),
-	PAD_CFG_GPO(GPP_S2, 0, DEEP),
-	PAD_CFG_GPO(GPP_S3, 0, DEEP),
-	PAD_CFG_GPO(GPP_S4, 0, DEEP),
-	PAD_CFG_GPO(GPP_S5, 0, DEEP),
-	PAD_CFG_GPO(GPP_S6, 0, DEEP),
-	PAD_CFG_GPO(GPP_S7, 0, DEEP),
-};
-
-#endif
-
-#endif

models/bonw15/hda_verb.c

@@ -1,49 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-	/* Realtek, ALC1220 */
-	0x10ec1220, /* Vendor ID */
-	0x15583702, /* Subsystem ID */
-	12, /* Number of entries */
-	AZALIA_SUBVENDOR(0, 0x15583702),
-	AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
-	AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
-	AZALIA_PIN_CFG(0, 0x15, 0x40000000),
-	AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
-	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
-	AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
-	AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
-	/* Intel, RaptorlakeHDMI */
-	0x80862818, /* Vendor ID */
-	0x80860101, /* Subsystem ID */
-	10, /* Number of entries */
-	AZALIA_SUBVENDOR(2, 0x80860101),
-	AZALIA_PIN_CFG(2, 0x04, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x06, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x08, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
-	/* Nvidia, GenericHDMI */
-	0x10de00a5, /* Vendor ID */
-	0x10de0000, /* Subsystem ID */
-	5, /* Number of entries */
-	AZALIA_SUBVENDOR(0, 0x10de0000),
-	AZALIA_PIN_CFG(0, 0x04, 0x585600f0),
-	AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
-	AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
-	AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
-};
-
-const u32 pc_beep_verbs[] = {};
-
-AZALIA_ARRAY_SIZES;

models/darp5/coreboot.config

@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
 CONFIG_USE_OPTION_TABLE=y

models/darp5/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=6b4f28e4-5042-4800-b8ed-c7eabca4cca0
-EC_FMP_UUID=9fd9e876-faa4-4967-9bc4-1b2e4e9e82eb

models/darp6/coreboot.config

@@ -12,6 +12,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
 CONFIG_USE_OPTION_TABLE=y

models/darp6/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=66291ad4-79c0-4729-b500-fe86a622a171
-EC_FMP_UUID=1b94f5e0-4e3e-4575-adec-dedab7ab9691

models/darp7/README.md

@@ -9,4 +9,4 @@
   - HAP: false
 - [ME](./me.rom)
   - Size: 5116 KB
-  - Version: 15.0.41.2158
+  - Version: 15.0.35.2039

models/darp7/coreboot.config

@@ -2,7 +2,8 @@ CONFIG_VENDOR_SYSTEM76=y
 CONFIG_BOARD_SYSTEM76_DARP7=y
 CONFIG_CCACHE=y
 CONFIG_CONSOLE_SERIAL=n
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_HAVE_ME_BIN=y
 CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
@@ -12,6 +13,7 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
 CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
 CONFIG_USE_OPTION_TABLE=y

models/darp7/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=519360a8-111a-4279-b55c-fd7d62e24f1c
-EC_FMP_UUID=d16d934a-68ac-4381-99ab-eb1dfdb97ada

models/darp8/FSP

@@ -0,0 +1 @@
+../gaze17-3050/FSP

models/darp8/README.md

@@ -9,4 +9,4 @@
   - HAP: false
 - [ME](./me.rom)
   - Size: 4824 KB
-  - Version: 16.1.25.2124
+  - Version: 16.0.15.1810

models/darp8/coreboot.config

@@ -1,8 +1,13 @@
 CONFIG_VENDOR_SYSTEM76=y
 CONFIG_BOARD_SYSTEM76_DARP8=y
+CONFIG_ADD_FSP_BINARIES=y
 CONFIG_CCACHE=y
 CONFIG_CONSOLE_SERIAL=n
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
+CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include"
+CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp.fd"
+CONFIG_FSP_FULL_FD=y
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_HAVE_ME_BIN=y
 CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
@@ -10,6 +15,7 @@ CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
 CONFIG_PAYLOAD_ELF=y
 CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
 CONFIG_POST_IO=n
+CONFIG_RUN_FSP_GOP=y
 CONFIG_SMMSTORE=y
 CONFIG_SMMSTORE_V2=y
 CONFIG_USE_OPTION_TABLE=y

models/darp8/edk2.config

@@ -2,12 +2,8 @@ BOOTLOADER=COREBOOT
 DISABLE_SERIAL_TERMINAL=TRUE
 PLATFORM_BOOT_TIMEOUT=2
 PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
+#SECURE_BOOT_ENABLE=TRUE
 SERIAL_DRIVER_ENABLE=FALSE
 SHELL_TYPE=NONE
 TPM_ENABLE=TRUE
 #SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=8e9eebcd-21c7-4187-b0c8-b4aa11ab8152
-EC_FMP_UUID=caa0f156-d2ef-4ed6-949e-322eff2f2c74

models/darp9/AlderLakeFspBinPkg

@@ -1 +0,0 @@
-../oryp11/AlderLakeFspBinPkg

models/darp9/IntelGopDriver.inf

@@ -1,9 +0,0 @@
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = IntelGopDriver
-  FILE_GUID                      = 767222f4-a9f4-41ba-9faa-edaa1405a486
-  MODULE_TYPE                    = UEFI_DRIVER
-  VERSION_STRING                 = 1.0
-
-[Binaries.X64]
-  PE32|IntelGopDriver.efi|*

models/darp9/README.md

@@ -1,12 +0,0 @@
-# System76 Darter Pro (darp9)
-
-## Contents
-
-- [EC](./ec.rom)
-  - *Read Error: No such file or directory (os error 2)*
-- [FD](./fd.rom)
-  - Size: 4 KB
-  - HAP: false
-- [ME](./me.rom)
-  - Size: 4824 KB
-  - Version: 16.1.25.2166

models/darp9/README.md.in

@@ -1 +0,0 @@
-# System76 Darter Pro (darp9)

models/darp9/chip.txt

@@ -1 +0,0 @@
-GD25Q256D

models/darp9/coreboot-collector.txt

@@ -1,257 +0,0 @@
-## PCI ##
-PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA707, Revision 0x00
-PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA7A0, Revision 0x04
-PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x00
-PCI Device: 0000:00:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
-PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0xA76E, Revision 0x00
-PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x00
-PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
-PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0xA71E, Revision 0x00
-PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0xA73E, Revision 0x00
-PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
-PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x51ED, Revision 0x01
-PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x51EF, Revision 0x01
-PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x51F1, Revision 0x01
-PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x51E8, Revision 0x01
-PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x51E9, Revision 0x01
-PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x51E0, Revision 0x01
-PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x51BD, Revision 0x01
-PCI Device: 0000:00:1c.7: Class 0x00060400, Vendor 0x8086, Device 0x51BF, Revision 0x01
-PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x519D, Revision 0x01
-PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x51CA, Revision 0x01
-PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x51A3, Revision 0x01
-PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x51A4, Revision 0x01
-PCI Device: 0000:2b:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
-PCI Device: 0000:2c:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
-PCI Device: 10000:e0:06.0: Class 0x00060400, Vendor 0x8086, Device 0xA74D, Revision 0x00
-PCI Device: 10000:e0:06.2: Class 0x00060400, Vendor 0x8086, Device 0xA73D, Revision 0x00
-PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x15B7, Device 0x501A, Revision 0x00
-PCI Device: 10000:e2:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
-## GPIO ##
-600 Series PCH-LP
-GPP_B0 (0x6E,0x00) 0x44000700 0x0003c018 0x00000100 0x00000000
-GPP_B1 (0x6E,0x02) 0x44000700 0x0003c019 0x00000100 0x00000000
-GPP_B2 (0x6E,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
-GPP_B3 (0x6E,0x06) 0x44000200 0x0000001b 0x00000000 0x00000000
-GPP_B4 (0x6E,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
-GPP_B5 (0x6E,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
-GPP_B6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
-GPP_B7 (0x6E,0x0E) 0x44000200 0x0000001f 0x00000000 0x00000000
-GPP_B8 (0x6E,0x10) 0x44000200 0x00000020 0x00000000 0x00000000
-GPP_B9 (0x6E,0x12) 0x44000200 0x00000021 0x00000000 0x00000000
-GPP_B10 (0x6E,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
-GPP_B11 (0x6E,0x16) 0x04000702 0x00000023 0x00000000 0x00000000
-GPP_B12 (0x6E,0x18) 0x44000700 0x0003c024 0x00000000 0x00000000
-GPP_B13 (0x6E,0x1A) 0x44000700 0x0003c025 0x00000000 0x00000000
-GPP_B14 (0x6E,0x1C) 0x44000500 0x00000026 0x00000000 0x00000000
-GPP_B15 (0x6E,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
-GPP_B16 (0x6E,0x20) 0x84000201 0x00000028 0x00000000 0x00000000
-GPP_B17 (0x6E,0x22) 0x84000201 0x00000029 0x00000000 0x00000000
-GPP_B18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000100 0x00000000
-GPP_B19 (0x6E,0x26) 0x44000200 0x0000002b 0x00000000 0x00000000
-GPP_B20 (0x6E,0x28) 0x44000200 0x0000002c 0x00000000 0x00000000
-GPP_B21 (0x6E,0x2A) 0x44000200 0x0000002d 0x00000000 0x00000000
-GPP_B22 (0x6E,0x2C) 0x44000200 0x0000002e 0x00000000 0x00000000
-GPP_B23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
-GPP_T2 (0x6E,0x38) 0x44000200 0x00000032 0x00000000 0x00000000
-GPP_T3 (0x6E,0x3A) 0x44000200 0x00000033 0x00000000 0x00000000
-GPP_A0 (0x6E,0x54) 0x44000700 0x0003f040 0x00000100 0x00000000
-GPP_A1 (0x6E,0x56) 0x44000702 0x0003f041 0x00000100 0x00000000
-GPP_A2 (0x6E,0x58) 0x44000700 0x0003f042 0x00000100 0x00000000
-GPP_A3 (0x6E,0x5A) 0x44000700 0x0003f043 0x00000100 0x00000000
-GPP_A4 (0x6E,0x5C) 0x44000700 0x0003f044 0x00000100 0x00000000
-GPP_A5 (0x6E,0x5E) 0x44000702 0x00003045 0x00000100 0x00000000
-GPP_A6 (0x6E,0x60) 0x44000200 0x00000046 0x00000100 0x00000000
-GPP_A7 (0x6E,0x62) 0x44000200 0x00000047 0x00000000 0x00000000
-GPP_A8 (0x6E,0x64) 0x84000201 0x00000048 0x00000000 0x00000000
-GPP_A9 (0x6E,0x66) 0x44000700 0x0003d049 0x00000100 0x00000000
-GPP_A10 (0x6E,0x68) 0x44000700 0x0003c04a 0x00000100 0x00000000
-GPP_A11 (0x6E,0x6A) 0x44000200 0x0000004b 0x00000000 0x00000000
-GPP_A12 (0x6E,0x6C) 0x44000200 0x0000004c 0x00000000 0x00000000
-GPP_A13 (0x6E,0x6E) 0x84000201 0x0000004d 0x00000000 0x00000000
-GPP_A14 (0x6E,0x70) 0x44000200 0x0000004e 0x00000000 0x00000000
-GPP_A15 (0x6E,0x72) 0x44000200 0x0000004f 0x00000000 0x00000000
-GPP_A16 (0x6E,0x74) 0x44000702 0x00000050 0x00000000 0x00000000
-GPP_A17 (0x6E,0x76) 0x44000200 0x00000051 0x00000000 0x00000000
-GPP_A18 (0x6E,0x78) 0x44000500 0x00024052 0x00000000 0x00000000
-GPP_A19 (0x6E,0x7A) 0x44000200 0x00000053 0x00000000 0x00000000
-GPP_A20 (0x6E,0x7C) 0x44000200 0x00000054 0x00000000 0x00000000
-GPP_A21 (0x6E,0x7E) 0x44000200 0x00000055 0x00000000 0x00000000
-GPP_A22 (0x6E,0x80) 0x44000200 0x00000056 0x00000000 0x00000000
-GPP_A23 (0x6E,0x82) 0x44000700 0x00003057 0x00000100 0x00000000
-GPP_S0 (0x6D,0x00) 0x44000200 0x0180006c 0x00000000 0x00000000
-GPP_S1 (0x6D,0x02) 0x44000200 0x0180006d 0x00000000 0x00000000
-GPP_S2 (0x6D,0x04) 0x44000200 0x0180006e 0x00000000 0x00000000
-GPP_S3 (0x6D,0x06) 0x44000200 0x0180006f 0x00000000 0x00000000
-GPP_S4 (0x6D,0x08) 0x44000200 0x01800070 0x00000000 0x00000000
-GPP_S5 (0x6D,0x0A) 0x44000200 0x01800071 0x00000000 0x00000000
-GPP_S6 (0x6D,0x0C) 0x44000200 0x01800072 0x00000000 0x00000000
-GPP_S7 (0x6D,0x0E) 0x44000200 0x01800073 0x00000000 0x00000000
-GPP_H0 (0x6D,0x10) 0x84000201 0x00000074 0x00000000 0x00000000
-GPP_H1 (0x6D,0x12) 0x84000201 0x00000075 0x00000000 0x00000000
-GPP_H2 (0x6D,0x14) 0x84000201 0x00000076 0x00000000 0x00000000
-GPP_H3 (0x6D,0x16) 0x44000102 0x00000077 0x00000000 0x00000000
-GPP_H4 (0x6D,0x18) 0x44000502 0x00000018 0x00000000 0x00000000
-GPP_H5 (0x6D,0x1A) 0x44000502 0x00000019 0x00000000 0x00000000
-GPP_H6 (0x6D,0x1C) 0x44000502 0x0000001a 0x00000000 0x00000000
-GPP_H7 (0x6D,0x1E) 0x44000502 0x0000001b 0x00000000 0x00000000
-GPP_H8 (0x6D,0x20) 0x44000902 0x0000001c 0x00000100 0x00000000
-GPP_H9 (0x6D,0x22) 0x44000900 0x0000001d 0x00000100 0x00000000
-GPP_H10 (0x6D,0x24) 0x44000102 0x0000001e 0x00000000 0x00000000
-GPP_H11 (0x6D,0x26) 0x44000102 0x0000001f 0x00000000 0x00000000
-GPP_H12 (0x6D,0x28) 0x44001500 0x00000020 0x00000000 0x00000000
-GPP_H13 (0x6D,0x2A) 0x44000200 0x00000021 0x00000000 0x00000000
-GPP_H14 (0x6D,0x2C) 0x44000200 0x00000022 0x00000000 0x00000000
-GPP_H15 (0x6D,0x2E) 0x44000500 0x0003c023 0x00000000 0x00000000
-GPP_H16 (0x6D,0x30) 0x44000200 0x00000024 0x00000000 0x00000000
-GPP_H17 (0x6D,0x32) 0x44000502 0x0003c025 0x00000000 0x00000000
-GPP_H18 (0x6D,0x34) 0x44000700 0x0003c026 0x00000000 0x00000000
-GPP_H19 (0x6D,0x36) 0x44000700 0x00000027 0x00000000 0x00000000
-GPP_H20 (0x6D,0x38) 0x44000102 0x00000028 0x00000000 0x00000000
-GPP_H21 (0x6D,0x3A) 0x44000102 0x00000029 0x00000000 0x00000000
-GPP_H22 (0x6D,0x3C) 0x44000102 0x0000002a 0x00000000 0x00000000
-GPP_H23 (0x6D,0x3E) 0x44000b02 0x0000002b 0x00000000 0x00000000
-GPP_D0 (0x6D,0x40) 0x44000201 0x0000002c 0x00000000 0x00000000
-GPP_D1 (0x6D,0x42) 0x44000102 0x0000002d 0x00000000 0x00000000
-GPP_D2 (0x6D,0x44) 0x44000200 0x0000002e 0x00000000 0x00000000
-GPP_D3 (0x6D,0x46) 0x44000102 0x0000002f 0x00000000 0x00000000
-GPP_D4 (0x6D,0x48) 0x44000201 0x00000030 0x00000000 0x00000000
-GPP_D5 (0x6D,0x4A) 0x44000700 0x00000031 0x00000000 0x00000000
-GPP_D6 (0x6D,0x4C) 0x44000201 0x00000032 0x00000000 0x00000000
-GPP_D7 (0x6D,0x4E) 0x44000702 0x00000033 0x00000000 0x00000000
-GPP_D8 (0x6D,0x50) 0x44000200 0x00000034 0x00000000 0x00000000
-GPP_D9 (0x6D,0x52) 0x44000200 0x00000035 0x00000100 0x00000000
-GPP_D10 (0x6D,0x54) 0x44000200 0x00000036 0x00000100 0x00000000
-GPP_D11 (0x6D,0x56) 0x44000100 0x00003c37 0x00000100 0x00000000
-GPP_D12 (0x6D,0x58) 0x44000200 0x00000038 0x00000100 0x00000000
-GPP_D13 (0x6D,0x5A) 0x44000102 0x00000039 0x00000000 0x00000000
-GPP_D14 (0x6D,0x5C) 0x84000201 0x0000003a 0x00000000 0x00000000
-GPP_D15 (0x6D,0x5E) 0x44000200 0x0000003b 0x00000000 0x00000000
-GPP_D16 (0x6D,0x60) 0x44000201 0x0000003c 0x00000000 0x00000000
-GPP_D17 (0x6D,0x62) 0x44000200 0x0000003d 0x00000000 0x00000000
-GPP_D18 (0x6D,0x64) 0x44000200 0x0000003e 0x00000000 0x00000000
-GPP_D19 (0x6D,0x66) 0x44000102 0x0000003f 0x00000000 0x00000000
-GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
-GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
-GPD2 (0x6C,0x04) 0x04000702 0x00003c62 0x00000000 0x00000000
-GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
-GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
-GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
-GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
-GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000000 0x00000000
-GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
-GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
-GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
-GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
-GPP_C0 (0x6A,0x00) 0x44000502 0x0003c06e 0x00000000 0x00000000
-GPP_C1 (0x6A,0x02) 0x44000502 0x0003c06f 0x00000000 0x00000000
-GPP_C2 (0x6A,0x04) 0x84000201 0x00000070 0x00000800 0x00000000
-GPP_C3 (0x6A,0x06) 0x44000502 0x00000071 0x00000000 0x00000000
-GPP_C4 (0x6A,0x08) 0x44000502 0x00000072 0x00000000 0x00000000
-GPP_C5 (0x6A,0x0A) 0x44000200 0x00000073 0x00000000 0x00000000
-GPP_C6 (0x6A,0x0C) 0x44000502 0x00000074 0x00000000 0x00000000
-GPP_C7 (0x6A,0x0E) 0x44000502 0x00000075 0x00000000 0x00000000
-GPP_C8 (0x6A,0x10) 0x44000300 0x00000076 0x00000100 0x00000000
-GPP_C9 (0x6A,0x12) 0x44000300 0x00000077 0x00000000 0x00000000
-GPP_C10 (0x6A,0x14) 0x44000300 0x00000018 0x00000000 0x00000000
-GPP_C11 (0x6A,0x16) 0x44000300 0x00000019 0x00000000 0x00000000
-GPP_C12 (0x6A,0x18) 0x44000300 0x0000001a 0x00000000 0x00000000
-GPP_C13 (0x6A,0x1A) 0x44000300 0x0000001b 0x00000000 0x00000000
-GPP_C14 (0x6A,0x1C) 0x44000300 0x0000001c 0x00000000 0x00000000
-GPP_C15 (0x6A,0x1E) 0x44000300 0x0000001d 0x00000000 0x00000000
-GPP_C16 (0x6A,0x20) 0x44000300 0x0000001e 0x00000000 0x00000000
-GPP_C17 (0x6A,0x22) 0x44000300 0x0000001f 0x00000000 0x00000000
-GPP_C18 (0x6A,0x24) 0x44000300 0x00000020 0x00000000 0x00000000
-GPP_C19 (0x6A,0x26) 0x44000300 0x00000021 0x00000000 0x00000000
-GPP_C20 (0x6A,0x28) 0x44000300 0x00000022 0x00000000 0x00000000
-GPP_C21 (0x6A,0x2A) 0x44000300 0x00000023 0x00000000 0x00000000
-GPP_C22 (0x6A,0x2C) 0x44000300 0x00000024 0x00000000 0x00000000
-GPP_C23 (0x6A,0x2E) 0x44000300 0x00000025 0x00000000 0x00000000
-GPP_F0 (0x6A,0x30) 0x44000500 0x0003c056 0x00000100 0x00000000
-GPP_F1 (0x6A,0x32) 0x44000502 0x0003f057 0x00000100 0x00000000
-GPP_F2 (0x6A,0x34) 0x44000500 0x0003c058 0x00000100 0x00000000
-GPP_F3 (0x6A,0x36) 0x44000500 0x0003f059 0x00000100 0x00000000
-GPP_F4 (0x6A,0x38) 0x44000500 0x0003c05a 0x00000100 0x00000000
-GPP_F5 (0x6A,0x3A) 0x44000900 0x0003c05b 0x00000100 0x00000000
-GPP_F6 (0x6A,0x3C) 0x44000502 0x0000005c 0x00000100 0x00000000
-GPP_F7 (0x6A,0x3E) 0x44000102 0x0000005d 0x00000000 0x00000000
-GPP_F8 (0x6A,0x40) 0x44000200 0x0000005e 0x00000000 0x00000000
-GPP_F9 (0x6A,0x42) 0x44000200 0x0000005f 0x00000000 0x00000000
-GPP_F10 (0x6A,0x44) 0x44000102 0x00000060 0x00000000 0x00000000
-GPP_F11 (0x6A,0x46) 0x44000102 0x00000061 0x00000000 0x00000000
-GPP_F12 (0x6A,0x48) 0x44000200 0x00000062 0x00000100 0x00000000
-GPP_F13 (0x6A,0x4A) 0x44000200 0x00000063 0x00000000 0x00000000
-GPP_F14 (0x6A,0x4C) 0x44000100 0x00000064 0x00000000 0x00000000
-GPP_F15 (0x6A,0x4E) 0x44000102 0x00000065 0x00000000 0x00000000
-GPP_F16 (0x6A,0x50) 0x44000200 0x00000066 0x00000100 0x00000000
-GPP_F17 (0x6A,0x52) 0x84000201 0x00000067 0x00000000 0x00000000
-GPP_F18 (0x6A,0x54) 0x44000200 0x00000068 0x00000000 0x00000000
-GPP_F19 (0x6A,0x56) 0x44000702 0x00000069 0x00000000 0x00000000
-GPP_F20 (0x6A,0x58) 0x84000201 0x0003c06a 0x00000000 0x00000000
-GPP_F21 (0x6A,0x5A) 0x44000200 0x0003c06b 0x00000000 0x00000000
-GPP_F22 (0x6A,0x5C) 0x44000500 0x0003c06c 0x00000000 0x00000000
-GPP_F23 (0x6A,0x5E) 0x44000500 0x0003c06d 0x00000000 0x00000000
-GPP_E0 (0x6A,0x6E) 0x44000102 0x00000026 0x00000000 0x00000000
-GPP_E1 (0x6A,0x70) 0x40100102 0x00003027 0x00000000 0x00000000
-GPP_E2 (0x6A,0x72) 0x44000200 0x00000028 0x00000000 0x00000000
-GPP_E3 (0x6A,0x74) 0x84000201 0x00000029 0x00000000 0x00000000
-GPP_E4 (0x6A,0x76) 0x84000200 0x00000030 0x00000000 0x00000000
-GPP_E5 (0x6A,0x78) 0x44000102 0x00000031 0x00000000 0x00000000
-GPP_E6 (0x6A,0x7A) 0x44000102 0x00000032 0x00000900 0x00000000
-GPP_E7 (0x6A,0x7C) 0x44000200 0x00000033 0x00000000 0x00000000
-GPP_E8 (0x6A,0x7E) 0x44000100 0x00000034 0x00000000 0x00000000
-GPP_E9 (0x6A,0x80) 0x44000502 0x00000035 0x00000800 0x00000000
-GPP_E10 (0x6A,0x82) 0x44000102 0x00000036 0x00000800 0x00000000
-GPP_E11 (0x6A,0x84) 0x44000102 0x00000037 0x00000800 0x00000000
-GPP_E12 (0x6A,0x86) 0x40100102 0x00000038 0x00000000 0x00000000
-GPP_E13 (0x6A,0x88) 0x44000200 0x00000039 0x00000000 0x00000000
-GPP_E14 (0x6A,0x8A) 0x44000700 0x0002403a 0x00000000 0x00000000
-GPP_E15 (0x6A,0x8C) 0x44000200 0x0000003b 0x00000000 0x00000000
-GPP_E16 (0x6A,0x8E) 0x44000102 0x0000003c 0x00000000 0x00000000
-GPP_E17 (0x6A,0x90) 0x44000200 0x0000003d 0x00000000 0x00000000
-GPP_E18 (0x6A,0x92) 0x44001700 0x00003c3e 0x00000100 0x00000000
-GPP_E19 (0x6A,0x94) 0x44001600 0x00003c3f 0x00000100 0x00000000
-GPP_E20 (0x6A,0x96) 0x44000200 0x00000040 0x00000100 0x00000000
-GPP_E21 (0x6A,0x98) 0x44000200 0x00000041 0x00000100 0x00000000
-GPP_E22 (0x6A,0x9A) 0x44000200 0x00000042 0x00000000 0x00000000
-GPP_E23 (0x6A,0x9C) 0x44000200 0x00000043 0x00000000 0x00000000
-GPP_R0 (0x69,0x00) 0x44000500 0x0003c058 0x00000000 0x00000000
-GPP_R1 (0x69,0x02) 0x44000500 0x0003fc59 0x00000000 0x00000000
-GPP_R2 (0x69,0x04) 0x44000500 0x0003fc5a 0x00000000 0x00000000
-GPP_R3 (0x69,0x06) 0x44000500 0x0003fc5b 0x00000000 0x00000000
-GPP_R4 (0x69,0x08) 0x44000500 0x0003c05c 0x00000000 0x00000000
-GPP_R5 (0x69,0x0A) 0x44000102 0x0000005d 0x00000000 0x00000000
-GPP_R6 (0x69,0x0C) 0x44000d00 0x0000005e 0x00000000 0x00000000
-GPP_R7 (0x69,0x0E) 0x44000d02 0x0000005f 0x00000000 0x00000000
-## HDAUDIO ##
-hdaudioC0D0
-  vendor_name: Realtek
-  chip_name: ALC256
-  vendor_id: 0x10ec0256
-  subsystem_id: 0x155851b1
-  revision_id: 0x100002
-  0x12: 0x90a60130
-  0x13: 0x40000000
-  0x14: 0x90170110
-  0x18: 0x411111f0
-  0x19: 0x411111f0
-  0x1a: 0x411111f0
-  0x1b: 0x411111f0
-  0x1d: 0x41700001
-  0x1e: 0x411111f0
-  0x21: 0x02211020
-hdaudioC0D2
-  vendor_name: Intel
-  chip_name: Raptorlake-P HDMI
-  vendor_id: 0x8086281f
-  subsystem_id: 0x80860101
-  revision_id: 0x100000
-  0x04: 0x18560010
-  0x06: 0x18560010
-  0x08: 0x18560010
-  0x0a: 0x18560010
-  0x0b: 0x18560010
-  0x0c: 0x18560010
-  0x0d: 0x18560010
-  0x0e: 0x18560010
-  0x0f: 0x18560010

models/darp9/coreboot.config

@@ -1,24 +0,0 @@
-CONFIG_VENDOR_SYSTEM76=y
-CONFIG_BOARD_SYSTEM76_DARP9=y
-CONFIG_CCACHE=y
-CONFIG_CONSOLE_SERIAL=n
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_HAVE_ME_BIN=y
-CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
-CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
-CONFIG_PAYLOAD_ELF=y
-CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
-CONFIG_POST_IO=n
-CONFIG_SMMSTORE=y
-CONFIG_SMMSTORE_V2=y
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
-#CONFIG_CONSOLE_SYSTEM76_EC=y
-
-# Custom FSP
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Fsp.fd"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/AlderLakeFspBinPkg/Include"
-CONFIG_FSP_USE_REPO=n

models/darp9/ec.config

@@ -1 +0,0 @@
-BOARD=system76/darp9

models/darp9/ecspy.txt

@@ -1,89 +0,0 @@
-id 5570 rev 2
-A0: data 1 mirror 1 pot 0 control 40
-A1: data 0 mirror 0 pot 0 control 00
-A2: data 0 mirror 0 pot 0 control 00
-A3: data 0 mirror 0 pot 0 control 80
-A4: data 1 mirror 1 pot 0 control 44
-A5: data 0 mirror 0 pot 0 control 00
-A6: data 0 mirror 0 pot 0 control 00
-A7: data 0 mirror 0 pot 0 control 00
-B0: data 0 mirror 0 pot 0 control 84
-B1: data 1 mirror 1 pot 0 control 84
-B2: data 1 mirror 1 pot 0 control 44
-B3: data 1 mirror 1 pot 0 control 80
-B4: data 1 mirror 1 pot 0 control 40
-B5: data 0 mirror 0 pot 0 control 44
-B6: data 1 mirror 1 pot 0 control 44
-B7: data 1 mirror 1 pot 0 control 82
-C0: data 1 mirror 1 pot 0 control 80
-C1: data 1 mirror 1 pot 0 control 04
-C2: data 1 mirror 1 pot 0 control 04
-C3: data 0 mirror 0 pot 0 control 04
-C4: data 0 mirror 0 pot 0 control 84
-C5: data 0 mirror 0 pot 0 control 04
-C6: data 0 mirror 0 pot 0 control 82
-C7: data 0 mirror 0 pot 0 control 44
-D0: data 1 mirror 1 pot 0 control 44
-D1: data 1 mirror 1 pot 0 control 44
-D2: data 1 mirror 1 pot 0 control 00
-D3: data 1 mirror 1 pot 0 control 82
-D4: data 0 mirror 0 pot 0 control 80
-D5: data 1 mirror 1 pot 0 control 44
-D6: data 1 mirror 1 pot 0 control 02
-D7: data 0 mirror 0 pot 0 control 80
-E0: data 1 mirror 1 pot 0 control 04
-E1: data 1 mirror 1 pot 0 control 44
-E2: data 1 mirror 1 pot 0 control 80
-E3: data 1 mirror 1 pot 0 control 40
-E4: data 1 mirror 1 pot 0 control 42
-E5: data 1 mirror 1 pot 0 control 40
-E6: data 1 mirror 1 pot 0 control 80
-E7: data 1 mirror 1 pot 0 control 04
-F0: data 0 mirror 0 pot 0 control 44
-F1: data 1 mirror 1 pot 0 control 44
-F2: data 1 mirror 1 pot 0 control 44
-F3: data 0 mirror 0 pot 0 control 82
-F4: data 1 mirror 1 pot 0 control 04
-F5: data 1 mirror 1 pot 0 control 04
-F6: data 0 mirror 0 pot 0 control 00
-F7: data 0 mirror 0 pot 0 control 44
-G0: data 1 mirror 1 pot 0 control 80
-G1: data 1 mirror 1 pot 0 control 44
-G2: data 1 mirror 1 pot 0 control 80
-G3: data 0 mirror 0 pot 0 control 00
-G4: data 0 mirror 0 pot 0 control 00
-G5: data 0 mirror 0 pot 0 control 00
-G6: data 0 mirror 0 pot 0 control 44
-G7: data 0 mirror 0 pot 0 control 00
-H0: data 0 mirror 0 pot 0 control 44
-H1: data 1 mirror 1 pot 0 control 80
-H2: data 1 mirror 1 pot 0 control 44
-H3: data 1 mirror 1 pot 0 control 80
-H4: data 1 mirror 1 pot 0 control 84
-H5: data 0 mirror 0 pot 0 control 40
-H6: data 1 mirror 1 pot 0 control 80
-H7: data 1 mirror 1 pot 0 control 40
-I0: data 0 mirror 0 pot 0 control 00
-I1: data 0 mirror 0 pot 0 control 00
-I2: data 1 mirror 1 pot 0 control 84
-I3: data 0 mirror 0 pot 0 control 00
-I4: data 0 mirror 0 pot 0 control 00
-I5: data 1 mirror 1 pot 0 control 84
-I6: data 1 mirror 1 pot 0 control 84
-I7: data 0 mirror 0 pot 0 control 00
-J0: data 1 mirror 1 pot 0 control 44
-J1: data 1 mirror 1 pot 0 control 40
-J2: data 0 mirror 0 pot 0 control 82
-J3: data 1 mirror 1 pot 0 control 80
-J4: data 1 mirror 1 pot 0 control 40
-J5: data 1 mirror 1 pot 0 control 80
-J6: data 0 mirror 0 pot 0 control 80
-J7: data 1 mirror 1 pot 0 control 80
-M0: data 0 mirror 0 control 06
-M1: data 1 mirror 0 control 06
-M2: data 1 mirror 1 control 06
-M3: data 1 mirror 1 control 06
-M4: data 1 mirror 0 control 06
-M5: data 0 mirror 0 control 00
-M6: data 1 mirror 1 control 86
-M7: data 0 mirror 0 control 00

models/darp9/edk2.config

@@ -1,13 +0,0 @@
-BOOTLOADER=COREBOOT
-DISABLE_SERIAL_TERMINAL=TRUE
-PLATFORM_BOOT_TIMEOUT=2
-PS2_KEYBOARD_ENABLE=TRUE
-SECURE_BOOT_ENABLE=TRUE
-SERIAL_DRIVER_ENABLE=FALSE
-SHELL_TYPE=NONE
-TPM_ENABLE=TRUE
-#SYSTEM76_EC_LOGGING=TRUE
-
-# FMP UUIDs for ESRT
-SYSTEM_FMP_UUID=7119893e-9d2e-4664-8c6a-a0cba1943a11
-EC_FMP_UUID=08a7e5c7-e04e-4968-a2db-cbc3d2392f0d

models/darp9/gpio.h

@@ -1,211 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_GPIO_H
-#define MAINBOARD_GPIO_H
-
-#include <soc/gpe.h>
-#include <soc/gpio.h>
-
-#ifndef __ACPI__
-
-/* Pad configuration in ramstage. */
-static const struct pad_config gpio_table[] = {
-	PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
-	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
-	PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
-	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
-	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
-	PAD_CFG_GPI(GPD7, NONE, PWROK),
-	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
-	PAD_CFG_GPO(GPD9, 0, PWROK),
-	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1),
-	PAD_CFG_GPO(GPP_A6, 0, DEEP),
-	PAD_CFG_GPO(GPP_A7, 0, DEEP),
-	PAD_CFG_GPO(GPP_A8, 1, PLTRST),
-	PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_A11, 0, DEEP),
-	PAD_CFG_GPO(GPP_A12, 0, DEEP),
-	PAD_CFG_GPO(GPP_A13, 1, PLTRST),
-	PAD_CFG_GPO(GPP_A14, 0, DEEP),
-	PAD_CFG_GPO(GPP_A15, 0, DEEP),
-	PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_A17, 0, DEEP),
-	PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_A19, 0, DEEP),
-	PAD_CFG_GPO(GPP_A20, 0, DEEP),
-	PAD_CFG_GPO(GPP_A21, 0, DEEP),
-	PAD_CFG_GPO(GPP_A22, 0, DEEP),
-	PAD_CFG_NF(GPP_A23, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_B2, 0, DEEP),
-	PAD_CFG_GPO(GPP_B3, 0, DEEP),
-	PAD_CFG_GPO(GPP_B4, 0, DEEP),
-	PAD_CFG_GPO(GPP_B5, 0, DEEP),
-	PAD_CFG_GPO(GPP_B6, 0, DEEP),
-	PAD_CFG_GPO(GPP_B7, 0, DEEP),
-	PAD_CFG_GPO(GPP_B8, 0, DEEP),
-	PAD_CFG_GPO(GPP_B9, 0, DEEP),
-	PAD_CFG_GPO(GPP_B10, 0, DEEP),
-	PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
-	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_B15, 0, DEEP),
-	PAD_CFG_GPO(GPP_B16, 1, PLTRST),
-	PAD_CFG_GPO(GPP_B17, 1, PLTRST),
-	PAD_CFG_GPI(GPP_B18, NONE, DEEP),
-	PAD_CFG_GPO(GPP_B19, 0, DEEP),
-	PAD_CFG_GPO(GPP_B20, 0, DEEP),
-	PAD_CFG_GPO(GPP_B21, 0, DEEP),
-	PAD_CFG_GPO(GPP_B22, 0, DEEP),
-	PAD_CFG_GPI(GPP_B23, NONE, DEEP),
-	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_C2, 1, PLTRST),
-	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_C5, 0, DEEP),
-	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
-	PAD_NC(GPP_C8, NONE),
-	PAD_NC(GPP_C9, NONE),
-	PAD_NC(GPP_C10, NONE),
-	PAD_NC(GPP_C11, NONE),
-	PAD_NC(GPP_C12, NONE),
-	PAD_NC(GPP_C13, NONE),
-	PAD_NC(GPP_C14, NONE),
-	PAD_NC(GPP_C15, NONE),
-	PAD_NC(GPP_C16, NONE),
-	PAD_NC(GPP_C17, NONE),
-	PAD_NC(GPP_C18, NONE),
-	PAD_NC(GPP_C19, NONE),
-	PAD_NC(GPP_C20, NONE),
-	PAD_NC(GPP_C21, NONE),
-	PAD_NC(GPP_C22, NONE),
-	PAD_NC(GPP_C23, NONE),
-	PAD_CFG_GPO(GPP_D0, 1, DEEP),
-	PAD_CFG_GPI(GPP_D1, NONE, DEEP),
-	PAD_CFG_GPO(GPP_D2, 0, DEEP),
-	PAD_CFG_GPI(GPP_D3, NONE, DEEP),
-	PAD_CFG_GPO(GPP_D4, 1, DEEP),
-	PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_D6, 1, DEEP),
-	PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_D8, 0, DEEP),
-	PAD_CFG_GPO(GPP_D9, 0, DEEP),
-	PAD_CFG_GPO(GPP_D10, 0, DEEP),
-	PAD_CFG_GPI(GPP_D11, NATIVE, DEEP),
-	PAD_CFG_GPO(GPP_D12, 0, DEEP),
-	PAD_CFG_GPI(GPP_D13, NONE, DEEP),
-	PAD_CFG_GPO(GPP_D14, 1, PLTRST),
-	PAD_CFG_GPO(GPP_D15, 0, DEEP),
-	PAD_CFG_GPO(GPP_D16, 1, DEEP),
-	PAD_CFG_GPO(GPP_D17, 0, DEEP),
-	PAD_CFG_GPO(GPP_D18, 0, DEEP),
-	PAD_CFG_GPI(GPP_D19, NONE, DEEP),
-	PAD_CFG_GPI(GPP_E0, NONE, DEEP),
-	_PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000),
-	PAD_CFG_GPO(GPP_E2, 0, DEEP),
-	PAD_CFG_GPO(GPP_E3, 1, PLTRST),
-	PAD_CFG_GPO(GPP_E4, 0, PLTRST),
-	PAD_CFG_GPI(GPP_E5, NONE, DEEP),
-	PAD_CFG_GPI(GPP_E6, NONE, DEEP),
-	PAD_CFG_GPO(GPP_E7, 0, DEEP),
-	PAD_CFG_GPI(GPP_E8, NONE, DEEP),
-	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_E10, NONE, DEEP),
-	PAD_CFG_GPI(GPP_E11, NONE, DEEP),
-	_PAD_CFG_STRUCT(GPP_E12, 0x40100100, 0x0000),
-	PAD_CFG_GPO(GPP_E13, 0, DEEP),
-	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_E15, 0, DEEP),
-	PAD_CFG_GPI(GPP_E16, NONE, DEEP),
-	PAD_CFG_GPO(GPP_E17, 0, DEEP),
-	_PAD_CFG_STRUCT(GPP_E18, 0x44001700, 0x3c00),
-	_PAD_CFG_STRUCT(GPP_E19, 0x44001600, 0x3c00),
-	PAD_CFG_GPO(GPP_E20, 0, DEEP),
-	PAD_CFG_GPO(GPP_E21, 0, DEEP),
-	PAD_CFG_GPO(GPP_E22, 0, DEEP),
-	PAD_CFG_GPO(GPP_E23, 0, DEEP),
-	PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
-	PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_F7, NONE, DEEP),
-	PAD_CFG_GPO(GPP_F8, 0, DEEP),
-	PAD_CFG_GPO(GPP_F9, 0, DEEP),
-	PAD_CFG_GPI(GPP_F10, NONE, DEEP),
-	PAD_CFG_GPI(GPP_F11, NONE, DEEP),
-	PAD_CFG_GPO(GPP_F12, 0, DEEP),
-	PAD_CFG_GPO(GPP_F13, 0, DEEP),
-	PAD_CFG_GPI(GPP_F14, NONE, DEEP),
-	PAD_CFG_GPI(GPP_F15, NONE, DEEP),
-	PAD_CFG_GPO(GPP_F16, 0, DEEP),
-	PAD_CFG_GPO(GPP_F17, 1, PLTRST),
-	PAD_CFG_GPO(GPP_F18, 0, DEEP),
-	PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_F20, 1, PLTRST),
-	PAD_CFG_GPO(GPP_F21, 0, DEEP),
-	PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_F23, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_H0, 1, PLTRST),
-	PAD_CFG_GPO(GPP_H1, 1, PLTRST),
-	PAD_CFG_GPO(GPP_H2, 1, PLTRST),
-	PAD_CFG_GPI(GPP_H3, NONE, DEEP),
-	PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_H9, NONE, DEEP, NF2),
-	PAD_CFG_GPI(GPP_H10, NONE, DEEP),
-	PAD_CFG_GPI(GPP_H11, NONE, DEEP),
-	_PAD_CFG_STRUCT(GPP_H12, 0x44001500, 0x0000),
-	PAD_CFG_GPO(GPP_H13, 0, DEEP),
-	PAD_CFG_GPO(GPP_H14, 0, DEEP),
-	PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
-	PAD_CFG_GPO(GPP_H16, 0, DEEP),
-	PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_H20, NONE, DEEP),
-	PAD_CFG_GPI(GPP_H21, NONE, DEEP),
-	PAD_CFG_GPI(GPP_H22, NONE, DEEP),
-	PAD_CFG_NF(GPP_H23, NONE, DEEP, NF2),
-	PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
-	PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
-	PAD_CFG_GPI(GPP_R5, NONE, DEEP),
-	PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3),
-	PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3),
-	PAD_CFG_GPO(GPP_S0, 0, DEEP),
-	PAD_CFG_GPO(GPP_S1, 0, DEEP),
-	PAD_CFG_GPO(GPP_S2, 0, DEEP),
-	PAD_CFG_GPO(GPP_S3, 0, DEEP),
-	PAD_CFG_GPO(GPP_S4, 0, DEEP),
-	PAD_CFG_GPO(GPP_S5, 0, DEEP),
-	PAD_CFG_GPO(GPP_S6, 0, DEEP),
-	PAD_CFG_GPO(GPP_S7, 0, DEEP),
-	PAD_CFG_GPO(GPP_T2, 0, DEEP),
-	PAD_CFG_GPO(GPP_T3, 0, DEEP),
-};
-
-#endif
-
-#endif

models/darp9/hda_verb.c

@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-	/* Realtek, ALC256 */
-	0x10ec0256, /* Vendor ID */
-	0x155851b1, /* Subsystem ID */
-	11, /* Number of entries */
-	AZALIA_SUBVENDOR(0, 0x155851b1),
-	AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
-	AZALIA_PIN_CFG(0, 0x13, 0x40000000),
-	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1d, 0x41700001),
-	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x21, 0x02211020),
-	/* Intel, Raptorlake-PHDMI */
-	0x8086281f, /* Vendor ID */
-	0x80860101, /* Subsystem ID */
-	10, /* Number of entries */
-	AZALIA_SUBVENDOR(2, 0x80860101),
-	AZALIA_PIN_CFG(2, 0x04, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x06, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x08, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
-	AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
-};
-
-const u32 pc_beep_verbs[] = {};
-
-AZALIA_ARRAY_SIZES;