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system76-firmware-open/fsp/mtl/4122.12/MeteorLakeFspBinPkg/Fsp.bsf
Tim Crawford 7eeff75a5f Update MTL FSP to 4122.12 
Upgrade FSP from D.0.97.10 to D.0.A8.20.

- Meteor Lake RVP Binaries and FSP
  - Kit: 646966
  - ID: 790907

This is the version Google validated for coreboot integration.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-06-10 10:01:54 -06:00

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/** @file
Boot Setting File for Platform Configuration.
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
This file is automatically generated. Please do NOT modify !!!
**/
GlobalDataDef
SKUID = 0, "DEFAULT"
EndGlobalData
StructDef
Find "MTLUPD_T"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 87 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartPowerGating 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_PcdPciExpressBaseAddress 8 bytes $_DEFAULT_ = 0xC0000000
$gPlatformFspPkgTokenSpaceGuid_PcdPciExpressRegionLength 4 bytes $_DEFAULT_ = 0x10000000
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDataBits 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugMmioBase 4 bytes $_DEFAULT_ = 0xFE036000
$gSiPkgTokenSpaceGuid_PcdSerialIoUartDebugPciCfgBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags 1 bytes $_DEFAULT_ = 0x012
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartDataBits 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMmioBase 4 bytes $_DEFAULT_ = 0xFE034000
$gSiPkgTokenSpaceGuid_PcdSerialIo2ndUartPciCfgBase 4 bytes $_DEFAULT_ = 0x0
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_FspDebugHandler 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsPolarity 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsEnable 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiDefaultCsOutput 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsState 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiNumber 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMmioBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiClkPinMux 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMisoPinMux 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMosiPinMux 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoI2cMmioBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoI2cSdaPin 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoI2cSclPin 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoI2cPadsTerm 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoI2cNumber 1 bytes $_DEFAULT_ = 0xFF
Find "MTLUPD_M"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 55 bytes
$gPlatformFspPkgTokenSpaceGuid_PlatformMemorySize 8 bytes $_DEFAULT_ = 0x400000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen 2 bytes $_DEFAULT_ = 0x200
$gPlatformFspPkgTokenSpaceGuid_EnableAbove4GBMmio 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr000 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr001 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr010 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr011 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr020 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr021 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr030 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr031 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr100 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr101 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr110 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr111 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr120 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr121 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr130 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr131 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_RcompResistor 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_RcompTarget 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch0 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch1 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch2 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch3 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch0 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch1 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch2 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch3 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch0 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch1 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch2 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch3 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch0 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch1 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch2 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch3 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqPinsInterleaved 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SmramMask 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MrcFastBoot 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_RmtPerTask 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TrainTrace 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RxVrefTempCoeff 1 bytes $_DEFAULT_ = 0x6
$gPlatformFspPkgTokenSpaceGuid_CaParityPatternRotation 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WckOffsetWa 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TsegSize 4 bytes $_DEFAULT_ = 0x0400000
$gPlatformFspPkgTokenSpaceGuid_MmioSize 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ProbelessTrace 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SpdAddressTable 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PlatformDebugOption 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciClkEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DciDbcMode 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SocTraceHubMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg0Size 2 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg1Size 2 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_KeepEarlyTrace 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size 2 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size 2 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_IoeDebugEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmodeClkEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AetTraceHubMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_BiosTraceSinkMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_X2ApicOptOut 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmaControlGuarantee 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdBaseAddress 36 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VtdDisable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VtdIgdEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdIopEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_InternalGfx 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_OemT12DelayOverride 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_UserBd 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SaGv 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SaGvWpMask 1 bytes $_DEFAULT_ = 0x0F
$gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch3 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch3 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ScramblerSupport 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DynamicMemoryBoost 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryFrequency 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_OCSafeMode 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_tRRSG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRDG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRDR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRDD 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWRSG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWRDG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWRDR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWRDD 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWWSG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWWDG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWWDR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWWDD 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRWSG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRWDG 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRWDR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRWDD 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_tREFI32 4 bytes $_DEFAULT_ = 0x0000
Skip 76 bytes
$gPlatformFspPkgTokenSpaceGuid_Vdd2Mv 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_RefClk 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SafeLoadingBiosEnableState 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRecoveryStatusEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TsegMemoryTestStatus 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_MrcPprStatus 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_RetryCount 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_VddVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_VddqVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_VppVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_Ratio 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCL 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCWL 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tFAW 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRAS 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRCDtRP 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_tREFI 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRFC 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRRD 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRTP 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFCpb 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFC2 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFC4 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRD_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRD_S 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCCD_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCCD_L_WR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR_S 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NModeSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchIshEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DFETap1StepSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DFETap2StepSize 1 bytes $_DEFAULT_ = 0x00
Skip 5 bytes
$gPlatformFspPkgTokenSpaceGuid_SaGvGear 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SaGvFreq 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_GearRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpddrRttWr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpddrRttCa 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DimmOdt 44 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_DFETap1 8 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_DFETap2 8 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_CsVrefLow 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CsVrefHigh 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CaVrefLow 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CaVrefHigh 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_RxVrefOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MmioSizeAdjustment 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay 1 bytes $_DEFAULT_ = 0x3
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_GmAdr 4 bytes $_DEFAULT_ = 0xB0000000
$gPlatformFspPkgTokenSpaceGuid_GttMmAdr 4 bytes $_DEFAULT_ = 0xAF000000
$gPlatformFspPkgTokenSpaceGuid_TxtImplemented 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SaOcSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtMaxOcRatio 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageOffset 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageOverride 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtAdaptiveVoltage 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SaVoltageOffset 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_RootPortIndex 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaIpuEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_ImguClkOutEn 6 bytes $_DEFAULT_ = 0x1, 0x1, 0x1, 0x1, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortAHpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortBHpd 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortCHpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort1Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort2Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort3Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort4Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortADdc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortBDdc 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortCDdc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort1Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort2Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort3Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort4Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisplayGpioPinMux 1 bytes $_DEFAULT_ = 0x00
Skip 9 bytes
$gPlatformFspPkgTokenSpaceGuid_LMemBar 8 bytes $_DEFAULT_ = 0xB0000000
$gPlatformFspPkgTokenSpaceGuid_PerCoreHtDisable 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SaVoltageMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaAdaptiveVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcieResizableBarSupport 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen4RootPortPreset 8 bytes $_DEFAULT_ = 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
$gPlatformFspPkgTokenSpaceGuid_SaPreMemProductionRsvd 36 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh2Enable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh3Method 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3RootPortPreset 8 bytes $_DEFAULT_ = 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EndPointPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EndPointHint 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiAspm 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_PchDmiAspm 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_DmiHweq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase23Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase3Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpre 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpo 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3Ltcpre 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen3Ltcpo 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen3CoeffListCm 8 bytes $_DEFAULT_ = 0x04, 0x06, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen3CoeffListCp 8 bytes $_DEFAULT_ = 0x05, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortRxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortRxPreset 8 bytes $_DEFAULT_ = 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortTxPreset 8 bytes $_DEFAULT_ = 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
$gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen4CoeffListCm 8 bytes $_DEFAULT_ = 0x04, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen4CoeffListCp 8 bytes $_DEFAULT_ = 0x05, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase23Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase3Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_Gen4RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen4LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpre 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpo 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPortTxPreset 8 bytes $_DEFAULT_ = 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01
$gPlatformFspPkgTokenSpaceGuid_DmiAspmL1ExitLatency 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen4RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen4LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen4Ltcpo 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiAspmL1ExitLatency 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_PchDmiGen4Ltcpre 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DmiL1ssEnable 1 bytes $_DEFAULT_ = 0x00
Skip 7 bytes
$gPlatformFspPkgTokenSpaceGuid_NvmeHcPeiMmioBase 4 bytes $_DEFAULT_ = 0xA0000000
$gPlatformFspPkgTokenSpaceGuid_NvmeHcPeiMmioLimit 4 bytes $_DEFAULT_ = 0xA1000000
$gPlatformFspPkgTokenSpaceGuid_AhciPeiMmioBase 4 bytes $_DEFAULT_ = 0x90000000
$gPlatformFspPkgTokenSpaceGuid_AhciPeiMmioLimit 4 bytes $_DEFAULT_ = 0x91000000
$gPlatformFspPkgTokenSpaceGuid_EcExtraIoBase 2 bytes $_DEFAULT_ = 0x6A0
$gPlatformFspPkgTokenSpaceGuid_SioBaseAddress 2 bytes $_DEFAULT_ = 0x0680
$gPlatformFspPkgTokenSpaceGuid_ApicLocalAddress 4 bytes $_DEFAULT_ = 0xFEE00000
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBar 4 bytes $_DEFAULT_ = 0xA0000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Bar 4 bytes $_DEFAULT_ = 0xA2000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Bar 4 bytes $_DEFAULT_ = 0xA4000000
$gPlatformFspPkgTokenSpaceGuid_BistOnReset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SkipStopPbet 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OcSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OcLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CoreMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HyperThreading 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuRatio 1 bytes $_DEFAULT_ = 0x1C
$gPlatformFspPkgTokenSpaceGuid_BootMaxFrequency 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_FClkFrequency 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmxEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Avx2RatioOffset 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_Avx3RatioOffset 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_BclkAdaptiveVoltage 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreAdaptiveVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CorePllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingDownBin 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RingVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TjMaxOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingAdaptiveVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TmeEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DebugInterfaceLockEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DfdEnable 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffset 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffsetPrefix 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageMode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOverride 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterAdaptiveVoltage 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffset 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffsetPrefix 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageMode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOverride 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreAdaptiveVoltage 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreRatio 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_OcTvb 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcoreTvbTempThreshold0 1 bytes $_DEFAULT_ = 0x46
$gPlatformFspPkgTokenSpaceGuid_PcoreTvbTempThreshold1 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_EcoreTvbTempThreshold0 1 bytes $_DEFAULT_ = 0x46
$gPlatformFspPkgTokenSpaceGuid_EcoreTvbTempThreshold1 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_TvbConfigLimitSelect 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerPcoreRatioDownBinAboveT0 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PerPcoreRatioDownBinAboveT1 8 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PerPcoreGrRatioDownBinAboveT0 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PerPcoreGrRatioDownBinAboveT1 8 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PerEcoreCcpRatioDownBinAboveT0 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PerEcoreCcpRatioDownBinAboveT1 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_MarginLimitL2 2 bytes $_DEFAULT_ = 100
$gPlatformFspPkgTokenSpaceGuid_AtomClusterRatio 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreRatioExtensionMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PvdRatioThreshold 2 bytes $_DEFAULT_ = 0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PvdMode 2 bytes $_DEFAULT_ = 0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_FllOverclockMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ActiveSocNorthAtomCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ComputeDieSscEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SocDieSscEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GpioOverride 1 bytes $_DEFAULT_ = 0x00
Skip 10 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuBclkOcFrequency 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SocBclkOcFrequency 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_CrashLogGprs 1 bytes $_DEFAULT_ = 0x00
Skip 11 bytes
$gPlatformFspPkgTokenSpaceGuid_DisablePerCoreMask 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_IaIccMax 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GtIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_GtIccMax 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaIccMax 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VccsaBootVoltageSel 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuD2dRatio 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CpuBandgapRefMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VcciaBootVoltageSel 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GranularRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreGranularityBins 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterGranularityBins 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessVmaxLimit 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcorePowerDensityThrottle 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CoreMinRatio 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPreMem 24 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AcousticNoiseMitigation 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysSlope 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PsysPmax 2 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_TdcCurrentLimit 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_AcLoadline 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DcLoadline 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi1Threshold 12 bytes $_DEFAULT_ = 0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi2Threshold 12 bytes $_DEFAULT_ = 0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi3Threshold 12 bytes $_DEFAULT_ = 0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi3Enable 6 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_Psi4Enable 6 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_ImonSlope 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ImonOffset 24 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VrConfigEnable 6 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_TdcEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_TdcTimeWindow 24 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TdcLock 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DlvrRfiFrequency 2 bytes $_DEFAULT_ = 0x055A
$gPlatformFspPkgTokenSpaceGuid_DlvrSpreadSpectrumPercentage 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_DlvrRfiEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PreWake 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RampUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RampDown 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VrPowerDeliveryDesign 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VrVoltageLimit 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PS1toPS0DynamicCutoffEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PS1toPS0MCoef 12 bytes $_DEFAULT_ = 0x64,0x00,0x64,0x00,0x64,0x00,0x64,0x00,0x64,0x00,0x64,0x00
$gPlatformFspPkgTokenSpaceGuid_PS1toPS0CCoef 12 bytes $_DEFAULT_ = 0xD0,0x07,0xD0,0x07,0xD0,0x07,0xD0,0x07,0xD0,0x07,0xD0,0x07
$gPlatformFspPkgTokenSpaceGuid_PS2toPS1DynamicCutoffEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PS2toPS1MCoef 12 bytes $_DEFAULT_ = 0x64,0x00,0x64,0x00,0x64,0x00,0x64,0x00,0x64,0x00,0x64,0x00
$gPlatformFspPkgTokenSpaceGuid_PS2toPS1CCoef 12 bytes $_DEFAULT_ = 0xF4,0x01,0xF4,0x01,0xF4,0x01,0xF4,0x01,0xF4,0x01,0xF4,0x01
$gPlatformFspPkgTokenSpaceGuid_VccInDemotionEnable 6 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_VccInDemotionQuiescentPowerInMw 6 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_VccInDemotionCapacitanceInUf 24 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PsysOffset 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FastPkgCRampDisable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SlowSlewRate 6 bytes $_DEFAULT_ = 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_IccMax 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_FastVmodeOffset 6 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SvidStabilizationDelay 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_VccDemotionShutdownThreshold 6 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_IccLimit 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_EnableFastVmode 6 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CepEnable 6 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SirpEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Irms 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_UnderVoltProtection 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableVsysCritical 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VsysFullScale 4 bytes $_DEFAULT_ = 0x5DC0
$gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold 4 bytes $_DEFAULT_ = 0x1770
$gPlatformFspPkgTokenSpaceGuid_PsysFullScale 4 bytes $_DEFAULT_ = 0x30D40
$gPlatformFspPkgTokenSpaceGuid_PsysCriticalThreshold 4 bytes $_DEFAULT_ = 0x1FBD0
$gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchMantissa 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchExponent 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchMantissa 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchExponent 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PerCoreMaxRatio 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterMaxRatio 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxVoltageLimit 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CorePllCurrentRefTuningOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingPllCurrentRefTuningOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaAtomPllCurrentRefTuningOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreDisableConfiguration 1 bytes $_DEFAULT_ = 0x00
Skip 76 bytes
$gPlatformFspPkgTokenSpaceGuid_BiosGuard 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_Txt 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PrmrrSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SinitMemorySize 4 bytes $_DEFAULT_ = 0x00000000
Skip 8 bytes
$gPlatformFspPkgTokenSpaceGuid_TxtDprMemoryBase 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_TxtHeapMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtDprMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BiosAcmBase 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BiosAcmSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ApStartupBase 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TgaSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtLcpPdBase 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_TxtLcpPdSize 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_IsTPMPresence 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ReservedSecurityPreMem 32 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtleEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtle 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmphEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmph 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5Enable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0Enable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLpcEnhancePort8xhDecoding 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPort80Route 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusArpEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchNumRsvdSmbusAddresses 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSmbusIoBase 2 bytes $_DEFAULT_ = 0xEFA0
$gPlatformFspPkgTokenSpaceGuid_PchSmbAlertEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieClkSrcUsage 16 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchPcieClkSrcUsage 16 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
$gPlatformFspPkgTokenSpaceGuid_PcieClkSrcClkReq 16 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchPcieClkSrcClkReq 16 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchAdditionalMmioRsvd 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieClkReqGpioMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RsvdSmbusAddressTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchPcieRpEnableMask 4 bytes $_DEFAULT_ = 0xFFFFFF
$gPlatformFspPkgTokenSpaceGuid_PcieRpEnableMask 2 bytes $_DEFAULT_ = 0xFFF
$gPlatformFspPkgTokenSpaceGuid_PchHdaVcType 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaDspUaaCompliance 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkHdaEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHdaSdiEnable 2 bytes $_DEFAULT_ = 0x01, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicEnable 2 bytes $_DEFAULT_ = 0x01, 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchAdditionalIoRsvd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkAPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkBPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaDspEnable 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SocAdditionalMmioRsvd 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicDataPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSspEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSndwEnable 4 bytes $_DEFAULT_ = 0x01, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchHdAudioSndwMultilaneEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispCodecDisconnect 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SocAdditionalIoRsvd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchHdaSubSystemIds 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CnviDdrRfim 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ExtendedBiosDecodeRange 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase 4 bytes $_DEFAULT_ = 0xF8000000
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit 4 bytes $_DEFAULT_ = 0xF9FFFFFF
$gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags 1 bytes $_DEFAULT_ = 0x32
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugAutoFlow 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugDataBits 1 bytes $_DEFAULT_ = 0x8
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMmioBase 4 bytes $_DEFAULT_ = 0xFE036000
$gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuSaPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaAtomPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_McPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie0En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie1En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie2En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie3En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssXhciEn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssXdciEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TcssDma0En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssDma1En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_HobBufferSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ECT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SOT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ERDMPRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDMPRT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RCVET 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_JWRL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EWRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ERDTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UNMATCHEDWRTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRVC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DDR5ODTTIMING 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VIEWPINCAL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDDQSODTT 1 bytes $_DEFAULT_ = 0x01
Skip 6 bytes
$gPlatformFspPkgTokenSpaceGuid_RDDQODTT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDEQT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDCTLET 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PPR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRVC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RXVREFPERBIT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDVC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_LCT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TAT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RMT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LVRAUTOTRIM 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ALIASCHK 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RMC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ROWHAMMER 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMODTT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMRONT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TXTCO 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CLKTCO 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDSR 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDDS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDTXEQ 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMODTCA 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTRETRAIN 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PWRMETER 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DDRPRECOMP 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVREFDC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VDDQT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RMTBIT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DQDQSSWZ 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_REFPI 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RXSALCAL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VCCCLKFF 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DCC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DCCDOWNSTREAM 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DCCQCLK 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DCCRISEFALL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_FUNCDCCCLK 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQ 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DATAPILIN 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DDR5XTALK 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DCCLP5WCKDCA 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RXUNMATCHEDCAL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TXRK2RK 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RXRK2RK 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_OPTIMIZECOMP 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTDIMMDFE 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTDS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTEQ 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EccSupport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Ibecc 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IbeccParity 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionEnable 8 bytes $_DEFAULT_ = 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionBase 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionMask 16 bytes $_DEFAULT_ = 0xFF,0x3F,0xFF,0x3F,0xFF,0x3F,0xFF,0x3F,0xFF,0x3F,0xFF,0x3F,0xFF,0x3F,0xFF,0x3F
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionOverallBase 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RemapEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RankInterleave 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnhancedInterleave 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ChHashEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableExtts 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnablePwrDn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnablePwrDnLpddr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SrefCfgEna 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeatLpddr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeat 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RhSelect 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ExitOnFailure 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DccSingleRankTrack 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IsDdr5MR7WicaSupported 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Write0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DdpSharedClock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedZq 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ChHashMask 2 bytes $_DEFAULT_ = 0x830
$gPlatformFspPkgTokenSpaceGuid_BClkFrequency 4 bytes $_DEFAULT_ = 100000000
$gPlatformFspPkgTokenSpaceGuid_Idd3n 2 bytes $_DEFAULT_ = 0x1A
$gPlatformFspPkgTokenSpaceGuid_Idd3p 2 bytes $_DEFAULT_ = 0x0B
$gPlatformFspPkgTokenSpaceGuid_CMDNORM 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EWRDSEQ 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AllowOppRefBelowWriteThrehold 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_WriteThreshold 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnCmdRate 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_McRefreshRate 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EpgEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Lfsr0Mask 1 bytes $_DEFAULT_ = 0xB
$gPlatformFspPkgTokenSpaceGuid_UserThresholdEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UserBudgetEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OpportunisticSref 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PowerDownMode 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PwdwnIdleCounter 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CmdRanksTerminated 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SafeModeOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MrcSafeMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RetrainToWorkingChannel 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DdrSafeMode 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_McSafeMode 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BoardStackUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CleanMemory 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UsbTcPortEnPreMem 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PwDownMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PostCodeOutputPort 2 bytes $_DEFAULT_ = 0x80
$gPlatformFspPkgTokenSpaceGuid_RMTLoopCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CridEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PwDownIdleTimer 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BclkRfiFreq 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrSize 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrEnabled 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrRpLocation 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieImrRpSelection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_DdrOneDpc 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OverrideDriverType 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Lp5BypassVddqLimits 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VddqVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VccIogVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VccClkVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ExtendedBankHashing 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Lfsr1Mask 1 bytes $_DEFAULT_ = 0xB
$gPlatformFspPkgTokenSpaceGuid_RefreshWm 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Lp5CccConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CmdMirror 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SiSkipOverrideBootModeWhenFwUpdate 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OppSrefIdleTmr 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LowerBasicMemTestSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BoardTopology 1 bytes $_DEFAULT_ = 0x00
Skip 16 bytes
$gPlatformFspPkgTokenSpaceGuid_PprTestType 1 bytes $_DEFAULT_ = 0x3
$gPlatformFspPkgTokenSpaceGuid_ReservedFspmUpd 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SkipExtGfxScan 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_BdatEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LockPTMregs 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PanelPowerEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_BdatTestType 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_DmaBufferSize 4 bytes $_DEFAULT_ = 0x0400000
$gPlatformFspPkgTokenSpaceGuid_PreBootDmaMask 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_HgSubSystemId 2 bytes $_DEFAULT_ = 0x2112
$gPlatformFspPkgTokenSpaceGuid_LidStatus 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VgaInitControl 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VbtPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_VbtSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_VgaMessage 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SaPreMemTestRsvd 75 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PprRunOnce 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PprRunAtFastboot 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairType 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprErrorInjection 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprForceRepair 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairController 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairChannel 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairDimm 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairRank 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairRow 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairPhysicalAddrLow 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairPhysicalAddrHigh 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairBankGroup 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprRepairBank 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DIMMODTCASPLIT 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CMDDSSPLIT 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CMDSRSPLIT 1 bytes $_DEFAULT_ = 0x0
Skip 23 bytes
$gPlatformFspPkgTokenSpaceGuid_TotalFlashSize 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_BiosSize 2 bytes $_DEFAULT_ = 0x2800
$gPlatformFspPkgTokenSpaceGuid_SecurityTestRsvd 12 bytes $_DEFAULT_ = 0x00
Skip 16 bytes
$gPlatformFspPkgTokenSpaceGuid_SmbusDynamicPowerGating 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WdtDisableAndLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SocBclkPllOn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuBclkPllOn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusSpdWriteDisable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiTranCoOverEn 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiTranCoOverPostCur 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiTranCoOverPreCur 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiUpPortTranPreset 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiUpPortTranPresetEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiRtlepceb 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HeciTimeouts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DidInitStat 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisableCpuReplacedPolling 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisableMessageCheck 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SkipMbpHob 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_HeciCommunication2 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_KtDeviceEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SkipCpuReplacementCheck 1 bytes $_DEFAULT_ = 0x00
Skip 100 bytes
$gPlatformFspPkgTokenSpaceGuid_Avx2VoltageScaleFactor 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Avx512VoltageScaleFactor 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode 1 bytes $_DEFAULT_ = 0x02
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugPciCfgBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MemSSVoltageMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_MemSSAdaptiveVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MemSSVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuDlvrMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_NguMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NguVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NguRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NguVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NguAdaptiveVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NguVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NguVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_NguVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_NguVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_NguVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_NguVfPointCount 1 bytes $_DEFAULT_ = 0x00
Skip 11 bytes
$gPlatformFspPkgTokenSpaceGuid_GtVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_GtVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_GtVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_GtVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_GtVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MrcTimeMeasure 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_TmeExcludeBase 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TmeExcludeSize 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GenerateNewTmeKey 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CkdAddressTable 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Find "MTLUPD_S"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 55 bytes
$gPlatformFspPkgTokenSpaceGuid_LogoPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LogoSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BltBufferAddress 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BltBufferSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_GraphicsConfigPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Device4Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ShowSpiController 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionSize 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TurboMode 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SataSalpSupport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataPortsEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SataPortDevSlpPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PortUsb20Enable 16 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PortUsb30Enable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_XdciEnable 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_DevIntConfigPtr 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NumOfDevIntConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PxRcConfig 8 bytes $_DEFAULT_ = 0x0B, 0x0A, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B
$gPlatformFspPkgTokenSpaceGuid_GpioIrqRoute 1 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_SciIrqSelect 1 bytes $_DEFAULT_ = 0x09
$gPlatformFspPkgTokenSpaceGuid_TcoIrqSelect 1 bytes $_DEFAULT_ = 0x09
$gPlatformFspPkgTokenSpaceGuid_TcoIrqEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTableEntryNum 1 bytes $_DEFAULT_ = 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTablePtr 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PchHdaCodecSxWakeCapability 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPolarity 14 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsEnable 14 bytes $_DEFAULT_ = 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiDefaultCsOutput 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsState 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPinMux 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiClkPinMux 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMisoPinMux 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMosiPinMux 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartBaudRate 28 bytes $_DEFAULT_ = 0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartParity 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDataBits 7 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartStopBits 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating 7 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDmaEnable 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartAutoFlow 7 bytes $_DEFAULT_ = 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartRtsPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartCtsPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartRxPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartTxPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDbg2 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI2cMode 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSdaPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSclPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cPadsTermination 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cMode 2 bytes $_DEFAULT_ = 0, 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSdaPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSdaPadTermination 2 bytes $_DEFAULT_ = 0, 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclPadTermination 2 bytes $_DEFAULT_ = 0, 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclFbPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclFbPadTermination 2 bytes $_DEFAULT_ = 0, 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_IshGpGpioPinMuxing 48 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartRxPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartTxPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartRtsPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartCtsPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI2cSclPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI3cSdaPinMuxing 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_IshI3cSclPinMuxing 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiClkPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiCsPinMuxing 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshGpGpioPadTermination 12 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartRxPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartTxPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartRtsPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartCtsPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI3cSdaPadTermination 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_IshI2cSclPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI3cSclPadTermination 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiClkPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiCsPadTermination 4 bytes $_DEFAULT_ = 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiCsEnable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPetxiset 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyTxiset 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPredeemp 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPehalfbit 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmphEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmph 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmpEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmp 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 80 bytes
$gPlatformFspPkgTokenSpaceGuid_PchLanEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchTsnEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed 1 bytes $_DEFAULT_ = 0x02
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressHigh 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressLow 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchTsn1MacAddressHigh 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchTsn1MacAddressLow 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PciePtm 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiPowerGatingDis 1 bytes $_DEFAULT_ = 0x01
Skip 28 bytes
$gPlatformFspPkgTokenSpaceGuid_UsbPdoProgramming 1 bytes $_DEFAULT_ = 0x01
Skip 5 bytes
$gPlatformFspPkgTokenSpaceGuid_PmcPowerButtonDebounce 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchEspiBmeHostDeviceEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailSupportedVoltageStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMax 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSupportedVoltageStates 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMax 1 bytes $_DEFAULT_ = 0xC8
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMax 1 bytes $_DEFAULT_ = 0xC8
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxLowToHighCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x0C
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToHighCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x036
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToLowCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x2B
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxOffToHighCurModeVolTranTime 2 bytes $_DEFAULT_ = 0x0096
$gPlatformFspPkgTokenSpaceGuid_PmcDbgMsgEn 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_NphyBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_NphyBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchFivrDynPm 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchXhciUaolEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable 1 bytes $_DEFAULT_ = 0x1
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PchGpioUnlockDataPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchGpioUnlockDataSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchPostMemRsvd 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CnviMode 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviWifiCore 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviBtCore 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviBtAudioOffload 1 bytes $_DEFAULT_ = 0x01
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_CnviRfResetPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CnviClkreqPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchEspiHostC10ReportEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PmcUsb2PhySusPgEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchUsbOverCurrentEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchEspiLgmrEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailCtrlRampTmr 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailCtrlRampTmr 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlpResetConfig 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHotEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataLedEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmVrAlert 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AmtEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WatchDogEnabled 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_FwProgress 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_AmtSolEnabled 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_WatchDogTimerOs 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WatchDogTimerBios 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotImplemented 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpAcsEnabled 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpEnableCpm 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpDetectTimeoutMs 58 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PmcModPhySusPgEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcV1p05PhyExtFetControlEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcV1p05IsExtFetControlEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PavpEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PeiGraphicsPeimInit 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_D3HotEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GnaEnable 1 bytes $_DEFAULT_ = 0x1
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_IomTypeCPortPadCfg 48 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x06,0x11,0x00,0x04,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuUsb3OverCurrentPin 8 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
$gPlatformFspPkgTokenSpaceGuid_D3ColdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ITbtPcieTunnelingForUsb4 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SkipFspGop 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VpuEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_TcCstateLimit 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_TcNotifyIgd 1 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_VbtSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LidStatus 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SaPostMemRsvd 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VmdGlobalMapping 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPort 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortBus 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortDev 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortFunc 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VmdVariablePtr 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBase 4 bytes $_DEFAULT_ = 0xA0000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Base 4 bytes $_DEFAULT_ = 0xA2000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Base 4 bytes $_DEFAULT_ = 0xA4000000
$gPlatformFspPkgTokenSpaceGuid_TcssCpuUsbPdoProgramming 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcPdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssAuxOri 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_TcssHslOri 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_UsbOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ITbtPcieRootPortEn 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_UsbTcPortEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ITbtForcePowerOnTimeoutInMs 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_ITbtConnectTopologyTimeoutInMs 2 bytes $_DEFAULT_ = 0x1388
$gPlatformFspPkgTokenSpaceGuid_VccSt 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ITbtDmaLtr 4 bytes $_DEFAULT_ = 0xFF,0x97,0xFF,0x97
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PtmEnabled 4 bytes $_DEFAULT_ = 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrEnable 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0xC8,0x00,0xC8,0x00,0xC8,0x00,0xC8,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0xC8,0x00,0xC8,0x00,0xC8,0x00,0xC8,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpForceLtrOverride 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrConfigLock 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_TxtEnable 1 bytes $_DEFAULT_ = 0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuBistData 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CpuMpPpi 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_BootFrequency 1 bytes $_DEFAULT_ = 0x02
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PpinSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceMemSize 1 bytes $_DEFAULT_ = 0xff
$gPlatformFspPkgTokenSpaceGuid_SmbiosType4MaxSpeedOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AesEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_AvxDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_X2ApicEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ProcHotDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemProduction 56 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPwrOptEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchWriteProtectionEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchReadProtectionEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeBase 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaPme 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiCs0Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIoApicEntry24_119 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchIoApicId 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshUartEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshI2cEnable 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshI3cEnable 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PchIshGpEnable 12 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshPdtUnlock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshMsiInterrupt 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLanLtrEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchCrid 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RtcBiosInterfaceLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RtcMemoryLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpHotPlug 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpPmSci 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpTransmitterHalfSwing 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpClkReqDetect 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpAdvancedErrorReporting 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpUnsupportedRequestReport 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpFatalErrorReport 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpNoFatalErrorReport 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpCorrectableErrorReport 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnFatalError 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnNonFatalError 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnCorrectableError 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpMaxPayload 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_ThcAssignment 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcInterruptPinMuxing 8 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcMode 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcWakeOnTouch 2 bytes $_DEFAULT_ = 0x0, 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_ThcActiveLtr 8 bytes $_DEFAULT_ = 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
$gPlatformFspPkgTokenSpaceGuid_ThcIdleLtr 8 bytes $_DEFAULT_ = 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
$gPlatformFspPkgTokenSpaceGuid_ThcResetPad 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcResetPadTrigger 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiConnectionSpeed 8 bytes $_DEFAULT_ = 0x40,0x66,0x03,0x01,0x40,0x66,0x03,0x01
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiLimitPacketSize 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcPerformanceLimitation 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiInputReportHeaderAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiInputReportBodyAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiOutputReportAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiReadOpcode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiWriteOpcode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidSpiFlags 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcResetSequencingDelay 4 bytes $_DEFAULT_ = 0x2C,0x01,0x2C,0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpPcieSpeed 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpPhysicalSlotNumber 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B
$gPlatformFspPkgTokenSpaceGuid_PcieRpCompletionTimeout 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpAspm 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieRpL1Substates 29 bytes $_DEFAULT_ = 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrEnable 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrConfigLock 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqOverrideDefault 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMethod 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMode 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqLocalTxOverrideEn 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3NoOfPresetOrCoeff 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor0List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor0List 29 bytes $_DEFAULT_ = 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor1List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor1List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor2List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor2List 29 bytes $_DEFAULT_ = 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor3List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor3List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor5List 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor5List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor6List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor6List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor7List 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor7List 29 bytes $_DEFAULT_ = 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor8List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor8List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor9List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset0List 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset1List 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset2List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset3List 29 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x08, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset4List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x09, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset5List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset6List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset7List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset8List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset10List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh1DpTxPreset 29 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh1UpTxPreset 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x07, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh2LocalTxOverridePreset 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMethod 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMode 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqLocalTxOverrideEn 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3NoOfPresetOrCoeff 29 bytes $_DEFAULT_ = 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x05, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor0List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor0List 29 bytes $_DEFAULT_ = 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor1List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor1List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor2List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor2List 29 bytes $_DEFAULT_ = 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor3List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor3List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor5List 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor5List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor6List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor6List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor7List 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor7List 29 bytes $_DEFAULT_ = 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor8List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor8List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor9List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset0List 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset1List 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset2List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset3List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset5List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset6List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset7List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset8List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset10List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh1DpTxPreset 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh1UpTxPreset 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x07, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh2LocalTxOverridePreset 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMethod 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMode 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqLocalTxOverrideEn 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3NoOfPresetOrCoeff 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor0List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor0List 29 bytes $_DEFAULT_ = 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor1List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor1List 29 bytes $_DEFAULT_ = 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor2List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor2List 29 bytes $_DEFAULT_ = 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor3List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor3List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor5List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor5List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor6List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor6List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor7List 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor7List 29 bytes $_DEFAULT_ = 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor8List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor8List 29 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset0List 29 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset1List 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset2List 29 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset3List 29 bytes $_DEFAULT_ = 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset4List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset5List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset6List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset7List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset8List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset9List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset10List 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh1DpTxPreset 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh1UpTxPreset 29 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh2LocalTxOverridePreset 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh3Bypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh3Bypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh3Bypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh23Bypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh23Bypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh23Bypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPhBypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPhBypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPhBypass 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen3PcetTimer 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieGen4PcetTimer 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieGen5PcetTimer 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieGen3TsLockTimer 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen4TsLockTimer 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieGen5TsLockTimer 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieSetSecuredRegisterLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DGWait 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieRpTestAspmOc 12 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieCfgDump 12 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEnablePeerMemoryWrite 12 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieComplianceTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpFunctionSwap 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieFiaProgramming 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPmeB0S5Dis 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpImrEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpImrSelection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWolEnableOverride 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanDeepSxEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmLanWakeFromDeepSx 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDeepSxPol 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableDsxAcPresentPulldown 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpS3MinAssert 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpS4MinAssert 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpSusMinAssert 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpAMinAssert 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchEnableDbcObs 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpStrchSusUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpLanLowDc 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPwrBtnOverridePeriod 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableNativePowerButton 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmMeWakeSts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmWolOvrWkSts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPwrCycDur 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmPciePllSsc 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchLegacyIoLowLatency 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPwrOptEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EsataSpeedLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataSpeedLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsHotPlug 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsInterlockSw 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsExternal 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsSpinUp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsSolidStateDrive 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsEnableDitoConfig 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDmVal 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiAspm 1 bytes $_DEFAULT_ = 0x04
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SataPortsDitoVal 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsZpOdd 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstRaidDeviceId 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieEnable 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieStoragePort 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieDeviceResetDelay 3 bytes $_DEFAULT_ = 100, 100, 100
$gPlatformFspPkgTokenSpaceGuid_UfsEnable 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_UfsInlineEncryption 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IehMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SocTTSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SocT0Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SocT1Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SocT2Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SocTTEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SocTTState13Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SocTTLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchT0Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchT1Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchT2Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchTTEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTState13Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IoeTTSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_IoeT0Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_IoeT1Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_IoeT2Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_IoeTTEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IoeTTLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiTsawEn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS0TW 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS1TW 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS2TW 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DmiTS3TW 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP0T1M 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP0T2M 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SataP0T3M 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SataP0TDisp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1T1M 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP1T2M 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SataP1T3M 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SataP1TDisp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0Tinact 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0TDispFinit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1Tinact 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1TDispFinit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataThermalSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchTemperatureHotLevel 2 bytes $_DEFAULT_ = 0x0073
$gPlatformFspPkgTokenSpaceGuid_Usb2OverCurrentPin 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x06, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_Usb3OverCurrentPin 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrOverrideEnable 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrHighIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrMediumIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrLowIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGating 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGatingOnS3 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableTcoTimer 1 bytes $_DEFAULT_ = 0x00
Skip 5 bytes
$gPlatformFspPkgTokenSpaceGuid_BgpdtHash 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_BiosGuardAttr 4 bytes $_DEFAULT_ = 0xFFFFFFFF
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_BiosGuardModulePtr 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_SendEcCmd 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_EcCmdProvisionEav 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_EcCmdLock 1 bytes $_DEFAULT_ = 0xFF
Skip 6 bytes
$gPlatformFspPkgTokenSpaceGuid_EcProvisionEav 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_EcBiosGuardCmdLock 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_SiSkipSsidProgramming 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SiCustomizedSvid 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SiCustomizedSsid 2 bytes $_DEFAULT_ = 0x0000
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SiSsidTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SiNumberOfSsidTableEntry 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PortResetMessageEnable 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsOnEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcCpuC10GatePinEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchDmiCwbEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcOsIdleEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchS0ixAutoDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmLatchEventsC10Exit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrTimerEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrTimer1Val 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrMultiplier1Val 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrHostPartitionReset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcSel 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcWdtTimerEn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieClockGating 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PciePowerGating 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieFomsCp 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_LinkDownGpios 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_SkipPamLock 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RenderStandby 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_ConfigureGT 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_GtFreqMax 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_DisableTurboGt 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RC1pGtFreqEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RC1pMediaFreqEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchTsnMultiVcEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PmcLimitC3AndDeeperWA 1 bytes $_DEFAULT_ = 0x01
Skip 10 bytes
$gPlatformFspPkgTokenSpaceGuid_LogoPixelHeight 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LogoPixelWidth 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ConfigureMedia 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_Usb4CmMode 1 bytes $_DEFAULT_ = 0x01
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_HorizontalResolution 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_VerticalResolution 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MediaStandby 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SaPostMemTestRsvd 32 bytes $_DEFAULT_ = 0x00
Skip 32 bytes
$gPlatformFspPkgTokenSpaceGuid_EnableRsr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem1 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Hwp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PowerLimit1Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit2 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TurboPowerLimitLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3DutyCycle 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3Lock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4Lock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TccActivationOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TccOffsetClamp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TccOffsetLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NumberOfEntries 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom1TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom1ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom2ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom3ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpBios 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MlcStreamerPrefetcher 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MlcSpatialPrefetcher 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MonitorMwaitEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MachineCheckEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ApIdleManner 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Eist 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnergyEfficientPState 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnergyEfficientTurbo 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TStates 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_BiProcHot 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DisableProcHotOut 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ProcHotResponse 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DisableVrThermalAlert 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableAllThermalFunctions 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ThermalMonitor 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Cx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmgCstCfgCtrlLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1e 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PkgCStateDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PkgCStateUnDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CStatePreWake 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TimedMwait 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CstCfgCtrIoMwaitRedirection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PkgCStateLimit 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PpmIrmSetting 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcHotLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_StateRatio 40 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_StateRatioMax16 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit2Power 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4Boost 2 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_TccOffsetTimeWindowForRatl 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Power 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2Power 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CcfAutoGv 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RaceToHalt 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounter 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_HwpInterruptControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem2 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_C1StateAutoDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1StateUnDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MinRingRatioLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxRingRatioLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnablePerCorePState 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoPerCorePstate 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoEppGrouping 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ApplyConfigTdp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_HwpLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DualTauBoost 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_StepDownMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerFloorManagement 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PowerFloorDisplayDisconnect 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableRp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerFloorPcieGenDowngrade 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemTest 13 bytes $_DEFAULT_ = 0x00
Skip 16 bytes
$gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DisableD0I3SettingForHeci 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MctpBroadcastCycle 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CseDataResilience 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MePostMemRsvd 16 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLockDownGlobalSmi 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosInterface 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchUnlockGpioPads 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSbAccessUnlock 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxSnoopLatency 58 bytes $_DEFAULT_ = 0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxNoSnoopLatency 58 bytes $_DEFAULT_ = 0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMode 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMultiplier 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideValue 58 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMode 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMultiplier 29 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideValue 58 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitScale 29 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitValue 58 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEnablePort8xhDecode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPciePort8xhDecodePortIndex 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableEnergyReport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchXhciOcLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcLpmS0ixSubStateEnableMask 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PmcPchLpmS0ixSubStateEnableMask 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmErDebugMode 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CppmFaEn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLanWOLFastSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PlatformAtxTelemetryUnit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrOverrideSpecComplaint 29 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
Skip 71 bytes
$gPlatformFspPkgTokenSpaceGuid_PmcC10DynamicThresholdAdjustment 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitRatio 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitNumCore 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitRatio 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitNumCore 8 bytes $_DEFAULT_ = 0x00
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_FspEventHandler 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EnableTcssCovTypeA 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
EndStruct
List &EN_DIS
Selection 0x1 , "Enabled"
Selection 0x0 , "Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable
Selection 0 , "Disable"
Selection 1 , "Enable and Initialize"
Selection 2 , "Enable without Initializing"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartPowerGating
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow
Selection 0 , " Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel
Selection 0 , "Disable"
Selection 1 , "Error Only"
Selection 2 , "Error and Warnings"
Selection 3 , "Load Error Warnings and Info"
Selection 4 , "Load Error Warnings and Info & Event"
Selection 5 , "Load Error Warnings Info and Verbose"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase
Selection 0 , "0x3F8"
Selection 1 , "0x2F8"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable
Selection 0 , "Disable"
Selection 1 , "Enable and Initialize"
Selection 2 , "Enable without Initializing"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow
Selection 0 , " Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen
Selection 0x100 , "256 Bytes"
Selection 0x200 , "512 Bytes"
Selection 0x400 , "1024 Bytes"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SmramMask
Selection 0 , " Neither"
Selection 1 , "AB-SEG"
Selection 2 , "H-SEG"
Selection 3 , " Both"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TsegSize
Selection 0x0400000 , "4MB"
Selection 0x01000000 , "16MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PlatformDebugOption
Selection 0 , "Disabled"
Selection 2 , "Enabled Trace Active"
Selection 4 , "Enabled Trace Ready"
Selection 6 , "Enable Trace Power-Off"
Selection 7 , "Manual"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DciDbcMode
Selection 0 , "Disabled"
Selection 1 , "USB2 DbC"
Selection 2 , "USB3 DbC"
Selection 3 , "Both"
Selection 4 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg0Size
Selection 0x00 , "1MB"
Selection 0x03 , "8MB"
Selection 0x06 , "64MB"
Selection 0x07 , "128MB"
Selection 0x08 , "256MB"
Selection 0x09 , "512MB"
Selection 0x0A , "1GB"
Selection 0x0B , "2GB"
Selection 0x0C , "4GB"
Selection 0x0D , "8GB"
Selection 0x0E , "0MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg1Size
Selection 0x00 , "1MB"
Selection 0x03 , "8MB"
Selection 0x06 , "64MB"
Selection 0x07 , "128MB"
Selection 0x08 , "256MB"
Selection 0x09 , "512MB"
Selection 0x0A , "1GB"
Selection 0x0B , "2GB"
Selection 0x0C , "4GB"
Selection 0x0D , "8GB"
Selection 0x0E , "0MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size
Selection 0x00 , "1MB"
Selection 0x03 , "8MB"
Selection 0x06 , "64MB"
Selection 0x07 , "128MB"
Selection 0x08 , "256MB"
Selection 0x09 , "512MB"
Selection 0x0A , "1GB"
Selection 0x0B , "2GB"
Selection 0x0C , "4GB"
Selection 0x0D , "8GB"
Selection 0x0E , "0MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size
Selection 0x00 , "1MB"
Selection 0x03 , "8MB"
Selection 0x06 , "64MB"
Selection 0x07 , "128MB"
Selection 0x08 , "256MB"
Selection 0x09 , "512MB"
Selection 0x0A , "1GB"
Selection 0x0B , "2GB"
Selection 0x0C , "4GB"
Selection 0x0D , "8GB"
Selection 0x0E , "0MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_AetTraceHubMode
Selection 0 , "SOC Trace Hub"
Selection 1 , "PCH Trace Hub"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BiosTraceSinkMode
Selection 0 , "SOC Trace Hub"
Selection 1 , "PCH Trace Hub"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect
Selection 0 , " Both"
Selection 1 , " ClkA"
Selection 2 , " ClkB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc
Selection 0x00 , "0MB"
Selection 0x01 , "32MB"
Selection 0x02 , "64MB"
Selection 0x03 , "96MB"
Selection 0x04 , "128MB"
Selection 0xF0 , "4MB"
Selection 0xF1 , "8MB"
Selection 0xF2 , "12MB"
Selection 0xF3 , "16MB"
Selection 0xF4 , "20MB"
Selection 0xF5 , "24MB"
Selection 0xF6 , "28MB"
Selection 0xF7 , "32MB"
Selection 0xF8 , "36MB"
Selection 0xF9 , "40MB"
Selection 0xFA , "44MB"
Selection 0xFB , "48MB"
Selection 0xFC , "52MB"
Selection 0xFD , "56MB"
Selection 0xFE , "60MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_UserBd
Selection 0 , "Mobile/Mobile Halo"
Selection 1 , "Desktop/DT Halo"
Selection 5 , "ULT/ULX/Mobile Halo"
Selection 7 , "UP Server"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss
Selection 0 , "Disabled"
Selection 1 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit
Selection 1067 , "1067"
Selection 1333 , "1333"
Selection 1600 , "1600"
Selection 1867 , "1867"
Selection 2133 , "2133"
Selection 2400 , "2400"
Selection 2667 , "2667"
Selection 2933 , "2933"
Selection 0 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaGv
Selection 0 , "Disabled"
Selection 1 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaGvWpMask
Selection 0x3 , "Points0_1"
Selection 0x7 , "Points0_1_2"
Selection 0xF , "AllPoints0_1_2_3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl
Selection 0 , "Auto"
Selection 1 , "Manual"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected
Selection 0 , "Default SPD Profile"
Selection 1 , "Custom Profile"
Selection 2 , "XMP Profile 1"
Selection 3 , "XMP Profile 2"
Selection 4 , "XMP Profile 3"
Selection 5 , "XMP User Profile 4"
Selection 6 , "XMP User Profile 5"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Vdd2Mv
Selection 0 , "Default"
Selection 1200 , "1.20 Volts"
Selection 1350 , "1.35 Volts ..."
EndList
List &gPlatformFspPkgTokenSpaceGuid_RefClk
Selection 0 , "133MHz"
Selection 1 , "100MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TsegMemoryTestStatus
Selection 0 , " PASS"
Selection 1 , " FAIL(Default)"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MrcPprStatus
Selection 0 , " PASS"
Selection 1 , " FAIL(Default)"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RetryCount
Selection 0 , " Default"
Selection 1 , "3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VddVoltage
Selection 0 , "Default"
Selection 1200 , "1.20 Volts"
Selection 1250 , "1.25 Volts"
Selection 1300 , "1.30 Volts"
Selection 1350 , "1.35 Volts"
Selection 1400 , "1.40 Volts"
Selection 1450 , "1.45 Volts"
Selection 1500 , "1.50 Volts"
Selection 1550 , "1.55 Volts"
Selection 1600 , "1.60 Volts"
Selection 1650 , "1.65 Volts"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Ratio
Selection 0 , "Auto"
Selection 4 , "4"
Selection 5 , "5"
Selection 6 , "6"
Selection 7 , "7"
Selection 8 , "8"
Selection 9 , "9"
Selection 10 , "10"
Selection 11 , "11"
Selection 12 , "12"
Selection 13 , "13"
Selection 14 , "14"
Selection 15 , "15"
EndList
List &gPlatformFspPkgTokenSpaceGuid_tWR
Selection 0 , "Auto"
Selection 5 , "5"
Selection 6 , "6"
Selection 7 , "7"
Selection 8 , "8"
Selection 10 , "10"
Selection 12 , "12"
Selection 14 , "14"
Selection 16 , "16"
Selection 18 , "18"
Selection 20 , "20"
Selection 24 , "24"
Selection 30 , "30"
Selection 34 , "34"
Selection 40 , "40"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay
Selection 0 , "iGFX"
Selection 3 , "AUTO"
Selection 4 , "Hybrid Graphics"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtVoltageMode
Selection 0 , " Adaptive"
Selection 1 , " Override"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig
Selection 0 , "Disabled"
Selection 1 , "eDP"
Selection 2 , "MIPI DSI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig
Selection 0 , "Disabled"
Selection 1 , "eDP"
Selection 2 , "MIPI DSI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed
Selection 0 , "Auto"
Selection 1 , "Gen1"
Selection 2 , "Gen2"
Selection 3 , "Gen3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh2Enable
Selection 0 , "Disable phase2"
Selection 1 , "Enable phase2"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh3Method
Selection 0 , "Auto"
Selection 1 , "HwEq"
Selection 2 , "SwEq"
Selection 3 , "StaticEq"
Selection 4 , "BypassPhase3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiL1ssEnable
Selection 0 , " Auto"
Selection 1 , " L1.2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount
Selection 0 , "Disable all big cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 0xFF , "Active all big cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_FClkFrequency
Selection 0 , "800 MHz"
Selection 1 , " 1 GHz"
Selection 2 , " 400 MHz"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount
Selection 0 , "Disable all small cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 0xFF , "Active all small cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix
Selection 0 , "Positive"
Selection 1 , "Negative"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope
Selection 0 , "All-core"
Selection 1 , "Per-core"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TvbConfigLimitSelect
Selection 0 , "Per CCP Module"
Selection 1 , "Per P-core Group"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck
Selection 0 , "Disable"
Selection 1 , "L1"
Selection 2 , "L2"
Selection 3 , "Both"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveSocNorthAtomCoreCount
Selection 0 , "Disable all Soc-North Atom cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 0xFF , "Active all cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CrashLogGprs
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "Only Smm GPRs Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VccsaBootVoltageSel
Selection 0 , " Nominal"
Selection 1 , " High Voltage(up to 1.2/1.3V)"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuBandgapRefMode
Selection 0 , " Normal"
Selection 1 , " Bandgap Bypassed"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VcciaBootVoltageSel
Selection 0 , " Nominal"
Selection 1 , " High Voltage"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride
Selection 0 , " 2400MHz"
Selection 1 , " 1600MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup
Selection 0 , "Enable"
Selection 1 , "Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ProcessVmaxLimit
Selection 1 , "Enable"
Selection 0 , "Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcorePowerDensityThrottle
Selection 1 , "Enable"
Selection 0 , "Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SlowSlewRate
Selection 0 , " Fast/2"
Selection 1 , " Fast/4"
Selection 2 , " Fast/8"
Selection 3 , " Fast/16"
Selection 0xFF , " Ignore the configuration"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EnableFastVmode
Selection 0 , " Disable"
Selection 1 , " Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaVcType
Selection 0 , " VC0"
Selection 1 , " VC1"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating
Selection 0 , " POR"
Selection 1 , " Force Enable"
Selection 2 , " Force Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency
Selection 4 , " 96MHz"
Selection 3 , " 48MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode
Selection 0 , " 2T"
Selection 2 , " 4T"
Selection 3 , " 8T"
Selection 4 , " 16T"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate
Selection 3 , "9600"
Selection 4 , "19200"
Selection 6 , "56700"
Selection 7 , "115200"
EndList
List &gPlatformFspPkgTokenSpaceGuid_HobBufferSize
Selection 0 , "Default"
Selection 1 , " 1 Byte"
Selection 2 , " 1 KB"
Selection 3 , " Max value"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RXSALCAL
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VCCCLKFF
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQS
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_FUNCDCCCLK
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQ
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode
Selection 0 , "Protect base on address range"
Selection 1 , " Non-protected"
Selection 2 , " All protected"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RhSelect
Selection 0 , "Disable"
Selection 1 , "RFM"
Selection 2 , "pTRR"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IsDdr5MR7WicaSupported
Selection 0 , "False"
Selection 1 , "True"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit
Selection 0 , "BIT6"
Selection 1 , "BIT7"
Selection 2 , "BIT8"
Selection 3 , "BIT9"
Selection 4 , "BIT10"
Selection 5 , "BIT11"
Selection 6 , "BIT12"
Selection 7 , "BIT13"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BClkFrequency
Selection 100000000 , "100Hz"
Selection 125000000 , "125Hz"
Selection 167000000 , "167Hz"
Selection 250000000 , "250Hz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EnCmdRate
Selection 0 , "Disable"
Selection 5 , "2 CMDS"
Selection 7 , "3 CMDS"
Selection 9 , "4 CMDS"
Selection 11 , "5 CMDS"
Selection 13 , "6 CMDS"
Selection 15 , "7 CMDS"
EndList
List &gPlatformFspPkgTokenSpaceGuid_McRefreshRate
Selection 0 , "NORMAL Refresh"
Selection 1 , "1x Refresh"
Selection 2 , "2x Refresh"
Selection 3 , "4x Refresh"
EndList
List &gPlatformFspPkgTokenSpaceGuid_OpportunisticSref
Selection 0 , "Disabled"
Selection 1 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PowerDownMode
Selection 0x0 , "No Power Down"
Selection 0x1 , "APD"
Selection 0x6 , "PPD DLL OFF"
Selection 0xFF , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout
Selection 0 , "Enabled"
Selection 1 , "Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PwDownMode
Selection 0x0 , "Enable"
Selection 0x1 , "Disable"
Selection 0x2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel
Selection 0 , "Disable"
Selection 1 , "Error Only"
Selection 2 , "Error and Warnings"
Selection 3 , "Load Error Warnings and Info"
Selection 4 , "Load Error Warnings and Info & Event"
Selection 5 , "Load Error Warnings Info and Verbose"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrOneDpc
Selection 0 , " Disabled"
Selection 1 , " Enabled on DIMM0 only"
Selection 2 , " Enabled on DIMM1 only"
Selection 3 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RefreshWm
Selection 0 , "Set Refresh Watermarks to Low"
Selection 1 , "Set Refresh Watermarks to High (Default)"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BdatTestType
Selection 0 , "RMT per Rank"
Selection 1 , "RMT per Bit"
Selection 2 , "Margin2D"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay
Selection 0 , " No Delay"
Selection 0xFFFF , " Auto Calulate T12 Delay"
EndList
List &gPlatformFspPkgTokenSpaceGuid_LidStatus
Selection 0 , " LidClosed"
Selection 1 , " LidOpen"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VgaInitControl
Selection 0x0 , " NO VGA Init"
Selection 0x1 , " VGA Init"
Selection 0x3 , " VGA Init and VGA Exit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PprRepairType
Selection 0 , "Do not Repair (Default)"
Selection 1 , "Soft Repair"
Selection 2 , "Hard Repair"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuDlvrMode
Selection 0 , "Regulation Mode"
Selection 1 , "Power Gate Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_NguVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SataMode
Selection 0 , "AHCI"
Selection 1 , "RAID"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed
Selection 0 , " 24Mhz 2.5Gbps"
Selection 1 , " 24Mhz 1Gbps"
Selection 2 , " 38.4Mhz 2.5Gbps"
Selection 3 , " 38.4Mhz 1Gbps"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CnviMode
Selection 0 , "Disable"
Selection 1 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BootFrequency
Selection 0 , "0"
Selection 1 , "1"
Selection 2 , "2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PpinSupport
Selection 0 , " Disable"
Selection 1 , " Enable"
Selection 2 , " Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_AvxDisable
Selection 0 , " Enable"
Selection 1 , " Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ProcHotDemotion
Selection 0 , " Disable"
Selection 1 , " Hardware Default"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency
Selection 0 , " 6MHz"
Selection 1 , " 12MHz"
Selection 2 , " 24MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMethod
Selection 0 , " HardwareEq"
Selection 1 , " FixedEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMode
Selection 0 , " PresetEq"
Selection 1 , " CoefficientEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMethod
Selection 0 , " HardwareEq"
Selection 1 , " FixedEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMode
Selection 0 , " PresetEq"
Selection 1 , " CoefficientEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMethod
Selection 0 , " HardwareEq"
Selection 1 , " FixedEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMode
Selection 0 , " PresetEq"
Selection 1 , " CoefficientEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh3Bypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh3Bypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh3Bypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh23Bypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh23Bypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh23Bypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPhBypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPhBypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPhBypass
Selection 0 , "Disable"
Selection 1 , "Enable"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieCfgDump
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchDmiAspm
Selection 0 , "Disabled"
Selection 1 , "L0s"
Selection 2 , "L1"
Selection 3 , "L0sL1"
Selection 4 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IehMode
Selection 0 , " Bypass"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS0TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS1TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS2TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS3TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt
Selection 0 , "Msix"
Selection 1 , "Msi"
Selection 2 , "Legacy"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl
Selection 0 , "Disabled"
Selection 1 , "L0s"
Selection 2 , "L1"
Selection 3 , "L0sL1"
Selection 4 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieFomsCp
Selection 0 , " Auto"
Selection 1 , " Gen3 Foms"
Selection 2 , " Gen4 Foms"
Selection 3 , " Gen3 and Gen4 Foms"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtFreqMax
Selection 0xFF , " Auto(Default)"
Selection 2 , " 100 Mhz"
Selection 3 , " 150 Mhz"
Selection 4 , " 200 Mhz"
Selection 5 , " 250 Mhz"
Selection 6 , " 300 Mhz"
Selection 7 , " 350 Mhz"
Selection 8 , " 400 Mhz"
Selection 9 , " 450 Mhz"
Selection 0xA , " 500 Mhz"
Selection 0xB , " 550 Mhz"
Selection 0xC , " 600 Mhz"
Selection 0xD , " 650 Mhz"
Selection 0xE , " 700 Mhz"
Selection 0xF , " 750 Mhz"
Selection 0x10 , " 800 Mhz"
Selection 0x11 , " 850 Mhz"
Selection 0x12 , "900 Mhz"
Selection 0x13 , " 950 Mhz"
Selection 0x14 , " 1000 Mhz"
Selection 0x15 , " 1050 Mhz"
Selection 0x16 , " 1100 Mhz"
Selection 0x17 , " 1150 Mhz"
Selection 0x18 , " 1200 Mhz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ApIdleManner
Selection 1 , " HALT loop"
Selection 2 , " MWAIT loop"
Selection 3 , " RUN loop"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme
Selection 0 , " Single Range Output"
Selection 1 , " ToPA Output"
EndList
List &gPlatformFspPkgTokenSpaceGuid_StepDownMode
Selection 0 , " Gradual Power Reduction"
Selection 1 , " Aggressive Power Reduction"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage
Selection 0 , "Disable"
Selection 1 , "Send in PEI"
Selection 2 , "Send in DXE"
Selection 3 , "Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear
Selection 0 , " Disable ME Unconfig On Rtc Clear"
Selection 1 , " Enable ME Unconfig On Rtc Clear"
Selection 2 , " Cmos is clear"
Selection 3 , " Reserved"
EndList
BeginInfoBlock
PPVer "0.1"
Description "Alder Lake Platform"
EndInfoBlock
Page "System Agent(PreMem)"
Combo $gPlatformFspPkgTokenSpaceGuid_X2ApicOptOut, "State of X2APIC_OPT_OUT bit in the DMAR table", &EN_DIS,
Help "0=Disable/Clear, 1=Enable/Set"
Combo $gPlatformFspPkgTokenSpaceGuid_DmaControlGuarantee, "State of DMA_CONTROL_GUARANTEE bit in the DMAR table", &EN_DIS,
Help "0=Disable/Clear, 1=Enable/Set"
EditNum $gPlatformFspPkgTokenSpaceGuid_VtdBaseAddress, "Base addresses for VT-d function MMIO access", HEX,
Help "Base addresses for VT-d MMIO access per VT-d engine"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdDisable, "Disable VT-d", &EN_DIS,
Help "0=Enable/FALSE(VT-d enabled), 1=Disable/TRUE (VT-d disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIgdEnable, "Vtd Programming for Igd", &EN_DIS,
Help "1=Enable/TRUE (Igd VT-d Bar programming enabled), 0=Disable/FLASE (Igd VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIopEnable, "Vtd Programming for Iop", &EN_DIS,
Help "1=Enable/TRUE (Iop VT-d Bar programming enabled), 0=Disable/FLASE (Iop VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory", &gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc,
Help "Size of memory preallocated for internal graphics."
Combo $gPlatformFspPkgTokenSpaceGuid_InternalGfx, "Internal Graphics", &EN_DIS,
Help "Enable/disable internal graphics."
Combo $gPlatformFspPkgTokenSpaceGuid_OemT12DelayOverride, "Oem T12 Dealy Override", &EN_DIS,
Help "Oem T12 Dealy Override. 0(Default)=Disable 1=Enable "
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuSaPllVoltageOffset, "CPU SA PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingPllVoltageOffset, "Ring PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPllVoltageOffset, "System Agent PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IaAtomPllVoltageOffset, "IA Atom PLL voltage offset", HEX,
Help "IA Atom PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_McPllVoltageOffset, "Memory Controller PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie0En, "TCSS Thunderbolt PCIE Root Port 0 Enable", HEX,
Help "Set TCSS Thunderbolt PCIE Root Port 0. 0:Disabled 1:Enabled"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie1En, "TCSS Thunderbolt PCIE Root Port 1 Enable", HEX,
Help "Set TCSS Thunderbolt PCIE Root Port 1. 0:Disabled 1:Enabled"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie2En, "TCSS Thunderbolt PCIE Root Port 2 Enable", HEX,
Help "Set TCSS Thunderbolt PCIE Root Port 2. 0:Disabled 1:Enabled"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie3En, "TCSS Thunderbolt PCIE Root Port 3 Enable", HEX,
Help "Set TCSS Thunderbolt PCIE Root Port 3. 0:Disabled 1:Enabled"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssXhciEn, "TCSS USB HOST (xHCI) Enable", HEX,
Help "Set TCSS XHCI. 0:Disabled 1:Enabled - Must be enabled if xDCI is enabled below"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssXdciEn, "TCSS USB DEVICE (xDCI) Enable", HEX,
Help "Set TCSS XDCI. 0:Disabled 1:Enabled - xHCI must be enabled if xDCI is enabled"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssDma0En, "TCSS DMA0 Enable", HEX,
Help "Set TCSS DMA0. 0:Disabled 1:Enabled"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssDma1En, "TCSS DMA1 Enable", HEX,
Help "Set TCSS DMA1. 0:Disabled 1:Enabled"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate, "PcdSerialDebugBaudRate", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate,
Help "Baud Rate for Serial Debug Messages. 3:9600, 4:19200, 6:56700, 7:115200."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipExtGfxScan, "Skip external display device scanning", &EN_DIS,
Help "Enable: Do not scan for external display device, Disable (Default): Scan external display devices"
Combo $gPlatformFspPkgTokenSpaceGuid_BdatEnable, "Generate BIOS Data ACPI Table", &EN_DIS,
Help "Enable: Generate BDAT for MRC RMT or SA PCIe data. Disable (Default): Do not generate it"
Combo $gPlatformFspPkgTokenSpaceGuid_LockPTMregs, "Lock PCU Thermal Management registers", &EN_DIS,
Help "Lock PCU Thermal Management registers. Enable(Default)=1, Disable=0"
Combo $gPlatformFspPkgTokenSpaceGuid_PanelPowerEnable, "Panel Power Enable", &EN_DIS,
Help "Control for enabling/disabling VDD force bit (Required only for early enabling of eDP panel). 0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_BdatTestType, "BdatTestType", &gPlatformFspPkgTokenSpaceGuid_BdatTestType,
Help "Indicates the type of Memory Training data to populate into the BDAT ACPI table."
EditNum $gPlatformFspPkgTokenSpaceGuid_DmaBufferSize, "PMR Size", HEX,
Help "Size of PMR memory buffer. 0x400000 for normal boot and 0x200000 for S3 boot"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PreBootDmaMask, "The policy for VTd driver behavior", HEX,
Help "BIT0: Enable IOMMU during boot, BIT1: Enable IOMMU when transfer control to OS"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay, "Delta T12 Power Cycle Delay required in ms", &gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay,
Help "Select the value for delay required. 0= No delay, 0xFFFF(Default) = Auto calculate T12 Delay to max 500ms"
EditNum $gPlatformFspPkgTokenSpaceGuid_HgSubSystemId, "HgSubSystemId", HEX,
Help "Hybrid Graphics SubSystemId"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_LidStatus, "Platform LID Status for LFP Displays.", &gPlatformFspPkgTokenSpaceGuid_LidStatus,
Help "LFP Display Lid Status (LID_STATUS enum): 0 (Default): LidClosed, 1: LidOpen."
Combo $gPlatformFspPkgTokenSpaceGuid_VgaInitControl, "Control VGA Initialition sequence", &gPlatformFspPkgTokenSpaceGuid_VgaInitControl,
Help "Initialise VGA Init, Set BIT0 - 0 (No VGA Support), BIT0 = 1 (VGA Supported) BIT1 = 1 (VGA Exit)"
EditNum $gPlatformFspPkgTokenSpaceGuid_VbtPtr, "Graphics Configuration Ptr", HEX,
Help "Points to VBT"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VbtSize, "Intel Graphics VBT (Video BIOS Table) Size", HEX,
Help "Size of Graphics VBT Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VgaMessage, "VGA Training Message Pointer", HEX,
Help "Points to VGA Message Array"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPreMemTestRsvd, "SaPreMemTestRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Test"
Combo $gPlatformFspPkgTokenSpaceGuid_PprRunOnce, "PPR Run Once", &EN_DIS,
Help "When Eanble, PPR will run only once and then is disabled at next training cycle"
Combo $gPlatformFspPkgTokenSpaceGuid_PprRunAtFastboot, "PPR Run During Fastboot", &EN_DIS,
Help "When Eanble, PPR will run during fastboot"
EndPage
Page "Memory Reference Code"
EditNum $gPlatformFspPkgTokenSpaceGuid_PlatformMemorySize, "Platform Reserved Memory Size", HEX,
Help "The minimum platform memory size required to pass control into DXE"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen, "SPD Data Length", &gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen,
Help "Length of SPD Data"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableAbove4GBMmio, "Enable above 4GB MMIO resource support", &EN_DIS,
Help "DEPRECATED. Enable/disable above 4GB MMIO resource support"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr000, "Memory SPD Pointer Controller 0 Channel 0 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr001, "Memory SPD Pointer Controller 0 Channel 0 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr010, "Memory SPD Pointer Controller 0 Channel 1 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr011, "Memory SPD Pointer Controller 0 Channel 1 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr020, "Memory SPD Pointer Controller 0 Channel 2 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr021, "Memory SPD Pointer Controller 0 Channel 2 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr030, "Memory SPD Pointer Controller 0 Channel 3 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr031, "Memory SPD Pointer Controller 0 Channel 3 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr100, "Memory SPD Pointer Controller 1 Channel 0 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr101, "Memory SPD Pointer Controller 1 Channel 0 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr110, "Memory SPD Pointer Controller 1 Channel 1 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr111, "Memory SPD Pointer Controller 1 Channel 1 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr120, "Memory SPD Pointer Controller 1 Channel 2 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr121, "Memory SPD Pointer Controller 1 Channel 2 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr130, "Memory SPD Pointer Controller 1 Channel 3 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr131, "Memory SPD Pointer Controller 1 Channel 3 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RcompResistor, "RcompResistor settings", HEX,
Help "Indicates RcompResistor settings: Board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RcompTarget, "RcompTarget settings", HEX,
Help "RcompTarget settings: board-dependent"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch0, "Dqs Map CPU to DRAM MC 0 CH 0", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch1, "Dqs Map CPU to DRAM MC 0 CH 1", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch2, "Dqs Map CPU to DRAM MC 0 CH 2", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch3, "Dqs Map CPU to DRAM MC 0 CH 3", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch0, "Dqs Map CPU to DRAM MC 1 CH 0", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch1, "Dqs Map CPU to DRAM MC 1 CH 1", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch2, "Dqs Map CPU to DRAM MC 1 CH 2", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch3, "Dqs Map CPU to DRAM MC 1 CH 3", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch0, "Dq Map CPU to DRAM MC 0 CH 0", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch1, "Dq Map CPU to DRAM MC 0 CH 1", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch2, "Dq Map CPU to DRAM MC 0 CH 2", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch3, "Dq Map CPU to DRAM MC 0 CH 3", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch0, "Dq Map CPU to DRAM MC 1 CH 0", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch1, "Dq Map CPU to DRAM MC 1 CH 1", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch2, "Dq Map CPU to DRAM MC 1 CH 2", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch3, "Dq Map CPU to DRAM MC 1 CH 3", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DqPinsInterleaved, "Dqs Pins Interleaved Setting", &EN_DIS,
Help "Indicates DqPinsInterleaved setting: board-dependent"
Combo $gPlatformFspPkgTokenSpaceGuid_SmramMask, "Smram Mask", &gPlatformFspPkgTokenSpaceGuid_SmramMask,
Help "The SMM Regions AB-SEG and/or H-SEG reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_MrcFastBoot, "MRC Fast Boot", &EN_DIS,
Help "Enables/Disable the MRC fast path thru the MRC"
Combo $gPlatformFspPkgTokenSpaceGuid_RmtPerTask, "Rank Margin Tool per Task", &EN_DIS,
Help "This option enables the user to execute Rank Margin Tool per major training step in the MRC."
Combo $gPlatformFspPkgTokenSpaceGuid_TrainTrace, "Training Trace", &EN_DIS,
Help "This option enables the trained state tracing feature in MRC. This feature will print out the key training parameters state across major training steps."
EditNum $gPlatformFspPkgTokenSpaceGuid_RxVrefTempCoeff, "RxVrefTempCoeff", HEX,
Help "Default = 6. Range from 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CaParityPatternRotation, "CaParityPatternRotation", HEX,
Help "Default = 0 (Auto). 1 for High stress pattern rotation, 2 for no rotation."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_WckOffsetWa, "WCK Offset", &EN_DIS,
Help "This option enables the WCK Offset WA for Hynix32 with freq >= 5600."
Combo $gPlatformFspPkgTokenSpaceGuid_TsegSize, "Tseg Size", &gPlatformFspPkgTokenSpaceGuid_TsegSize,
Help "Size of SMRAM memory reserved. 0x400000 for Release build and 0x1000000 for Debug build"
EditNum $gPlatformFspPkgTokenSpaceGuid_MmioSize, "MMIO Size", HEX,
Help "Size of MMIO space reserved for devices. 0(Default)=Auto, non-Zero=size in MB"
"Valid range: 0 ~ 0xC00"
Combo $gPlatformFspPkgTokenSpaceGuid_ProbelessTrace, "Probeless Trace", &EN_DIS,
Help "Probeless Trace: 0=Disabled, 1=Enable. Enabling Probeless Trace will reserve 128MB. This also requires IED to be enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_UserBd, "Board Type", &gPlatformFspPkgTokenSpaceGuid_UserBd,
Help "MrcBoardType, Options are 0=Mobile/Mobile Halo, 1=Desktop/DT Halo, 5=ULT/ULX/Mobile Halo, 7=UP Server"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss, "MRC Retraining on RTC Power Loss", &gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss,
Help "Specifies whether MRC memory training will occur when RTC power loss is detected. Options are 0=Memory will be re-trained if RTC power loss is detected. 1=Memory will not be re-trained when RTC power loss is detected. (Typically used on board designs without a dedicated RTC battery)"
Combo $gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit, "DDR Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit,
Help "Maximum Memory Frequency Selections in Mhz. Options are 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933 and 0 for Auto."
Combo $gPlatformFspPkgTokenSpaceGuid_SaGv, "SAGV", &gPlatformFspPkgTokenSpaceGuid_SaGv,
Help "System Agent dynamic frequency support."
Combo $gPlatformFspPkgTokenSpaceGuid_SaGvWpMask, "SAGV WP Mask", &gPlatformFspPkgTokenSpaceGuid_SaGvWpMask,
Help "System Agent dynamic frequency workpoints that memory will be training at the enabled frequencies."
Combo $gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot, "Memory Test on Warm Boot", &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot,
Help "Run Base Memory Test on Warm Boot"
Combo $gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl, "DDR Speed Control", &gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl,
Help "DDR Frequency and Gear control for all SAGV points."
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch0, "Controller 0 Channel 0 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 0"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch1, "Controller 0 Channel 1 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 1"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch2, "Controller 0 Channel 2 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 2"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch3, "Controller 0 Channel 3 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 3"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch0, "Controller 1 Channel 0 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 0"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch1, "Controller 1 Channel 1 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 1"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch2, "Controller 1 Channel 2 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 2"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch3, "Controller 1 Channel 3 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 3"
Combo $gPlatformFspPkgTokenSpaceGuid_ScramblerSupport, "Scrambler Support", &EN_DIS,
Help "This option enables data scrambling in memory."
Combo $gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected, "SPD Profile Selected", &gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected,
Help "Select DIMM timing profile. Options are 0:Default SPD Profile, 1:Custom Profile, 2:XMP Profile 1, 3:XMP Profile 2, 4:XMP Profile 3, 5:XMP User Profile 4, 6:XMP User Profile 5"
Combo $gPlatformFspPkgTokenSpaceGuid_DynamicMemoryBoost, "Dynamic Memory Boost", &EN_DIS,
Help "0(Default): Disable, 1: Enable. When enabled, MRC will train the Default SPD Profile, and also the profile selected by SpdProfileSelected, to allow automatic switching during runtime. Only valid if SpdProfileSelected is an XMP Profile, otherwise ignored."
Combo $gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryFrequency, "Realtime Memory Frequency", &EN_DIS,
Help "0(Default): Disabled, 1: Enabled. Ignored unless SpdProfileSelected is XMP Profile 1. If enabled, MRC will train the Default SPD Profile, and also XMP Profile 1, to allow manually triggered switching between frequencies at runtime."
Combo $gPlatformFspPkgTokenSpaceGuid_OCSafeMode, "OC Safe Mode", &EN_DIS,
Help "Bitmap: Ignored unless SpdProfileSelected is an XMP Profile. Bit 0: Use safe tCL, Bit 1: Limit tWR, tRTP, tCCD_L, tCCD_L_WR, tCL to of freq 6400 when programming Dimm MR if DIMM doesn't support new spec."
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRSG, "tRRSG Delta", HEX,
Help "Delay between Read-to-Read commands in the same Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRDG, "tRRDG Delta", HEX,
Help "Delay between Read-to-Read commands in different Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRDR, "tRRDR Delta", HEX,
Help "Delay between Read-to-Read commands in different Ranks. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRDD, "tRRDD Delta", HEX,
Help "Delay between Read-to-Read commands in different DIMMs. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWRSG, "tWRSG Delta", HEX,
Help "Delay between Write-to-Read commands in the same Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWRDG, "tWRDG Delta", HEX,
Help "Delay between Write-to-Read commands in different Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWRDR, "tWRDR Delta", HEX,
Help "Delay between Write-to-Read commands in different Ranks. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWRDD, "tWRDD Delta", HEX,
Help "Delay between Write-to-Read commands in different DIMMs. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWWSG, "tWWSG Delta", HEX,
Help "Delay between Write-to-Write commands in the same Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWWDG, "tWWDG Delta", HEX,
Help "Delay between Write-to-Write commands in different Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWWDR, "tWWDR Delta", HEX,
Help "Delay between Write-to-Write commands in different Ranks. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWWDD, "tWWDD Delta", HEX,
Help "Delay between Write-to-Write commands in different DIMMs. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRWSG, "tRWSG Delta", HEX,
Help "Delay between Read-to-Write commands in the same Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRWDG, "tRWDG Delta", HEX,
Help "Delay between Read-to-Write commands in different Bank Group. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRWDR, "tRWDR Delta", HEX,
Help "Delay between Read-to-Write commands in different Ranks. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRWDD, "tRWDD Delta", HEX,
Help "Delay between Read-to-Write commands in different DIMMs. 0 - Auto. Signed TAT delta is (Value - 128). Input value range of [0..255] will give a TAT delta range of [-127..127]"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tREFI32, "tREFI32", HEX,
Help "Refresh Interval, 0: AUTO, max: 131071. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Vdd2Mv, "Vdd2Mv", &gPlatformFspPkgTokenSpaceGuid_Vdd2Mv,
Help "VDD2 in MilliVolts. <b>0=Platform Default (no override), 1200=1.2V, 1350=1.35V etc. "
Combo $gPlatformFspPkgTokenSpaceGuid_RefClk, "Memory Reference Clock", &gPlatformFspPkgTokenSpaceGuid_RefClk,
Help "100MHz, 133MHz."
Combo $gPlatformFspPkgTokenSpaceGuid_SafeLoadingBiosEnableState, "Safe Loading Bios Enable State", &EN_DIS,
Help "0: Disabled(Default), 1: Enabled. If enabled, Memory diagnostic will perform for TSEG Region."
Combo $gPlatformFspPkgTokenSpaceGuid_PprRecoveryStatusEnable, "Ppr Recovery Status Enable", &EN_DIS,
Help "0: Disabled(Default), 1: Enabled. If enabled, PPR Recovery flow will get Trigger."
Combo $gPlatformFspPkgTokenSpaceGuid_TsegMemoryTestStatus, "Tseg Memory Test Status", &gPlatformFspPkgTokenSpaceGuid_TsegMemoryTestStatus,
Help " If enabled, PPR Recovery flow will get Trigger"
Combo $gPlatformFspPkgTokenSpaceGuid_MrcPprStatus, "Mrc Ppr Status", &gPlatformFspPkgTokenSpaceGuid_MrcPprStatus,
Help " Get Mrc PPR Status after PPR Recovery flow will get Trigger"
Combo $gPlatformFspPkgTokenSpaceGuid_RetryCount, "Tseg Retry Count", &gPlatformFspPkgTokenSpaceGuid_RetryCount,
Help "Tseg Retry count will increase based on TSEG Region Fail count"
Combo $gPlatformFspPkgTokenSpaceGuid_VddVoltage, "Memory Vdd Voltage", &gPlatformFspPkgTokenSpaceGuid_VddVoltage,
Help "DRAM voltage (Vdd) (supply voltage for input buffers and core logic of the DRAM chips) in millivolts. <b>0=Platform Default (no override)</b>, 1200=1.2V, 1350=1.35V etc."
EditNum $gPlatformFspPkgTokenSpaceGuid_VddqVoltage, "Memory VDDQ Voltage", DEC,
Help "DRAM voltage (Vddq) (supply voltage for DQ/DQS of the DRAM chips) in millivolts from 0 - default to 1435mv."
"Valid range: 0 ~ 1435"
EditNum $gPlatformFspPkgTokenSpaceGuid_VppVoltage, "Memory VPP Voltage", DEC,
Help "DRAM voltage (Vpp) (supply voltage for VPP of the DRAM chips) in millivolts from 0 - default to 2135mv."
"Valid range: 0 ~ 2135"
Combo $gPlatformFspPkgTokenSpaceGuid_Ratio, "Memory Ratio", &gPlatformFspPkgTokenSpaceGuid_Ratio,
Help "Automatic or the frequency will equal ratio times reference clock. Set to Auto to recalculate memory timings listed below."
EditNum $gPlatformFspPkgTokenSpaceGuid_tCL, "tCL", HEX,
Help "CAS Latency, 0: AUTO, max: 255. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCWL, "tCWL", HEX,
Help "Min CAS Write Latency Delay Time, 0: AUTO, max: 255. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x22"
EditNum $gPlatformFspPkgTokenSpaceGuid_tFAW, "tFAW", HEX,
Help "Min Four Activate Window Delay Time, 0: AUTO, max: 65535. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRAS, "tRAS", HEX,
Help "RAS Active Time, 0: AUTO, max: 65535. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRCDtRP, "tRCD/tRP", HEX,
Help "RAS to CAS delay time and Row Precharge delay time, 0: AUTO, max: 255. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tREFI, "tREFI", HEX,
Help "Obsolete, use tREFI32 instead. Refresh Interval, 0: AUTO, max: 65535. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC, "tRFC", HEX,
Help "Min Refresh Recovery Delay Time, 0: AUTO, max: 65535. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD, "tRRD", HEX,
Help "Min Row Active to Row Active Delay Time, 0: AUTO, max: 255. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRTP, "tRTP", HEX,
Help "Min Internal Read to Precharge Command Delay Time, 0: AUTO, max: 255. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_tWR, "tWR", &gPlatformFspPkgTokenSpaceGuid_tWR,
Help "Min Write Recovery Time, 0: AUTO, legal values: 5, 6, 7, 8, 10, 12, 14, 16, 18, 20, 24, 30, 34, 40. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR, "tWTR", HEX,
Help "Min Internal Write to Read Command Delay Time, 0: AUTO, max: 255. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x1C"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFCpb, "tRFCpb", HEX,
Help "Min Internal per bank refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC2, "tRFC2", HEX,
Help "Min Internal refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC4, "tRFC4", HEX,
Help "Min Internal refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD_L, "tRRD_L", HEX,
Help "Min Internal row active to row active delay time for same bank groups, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD_S, "tRRD_S", HEX,
Help "Min Internal row active to row active delay time for different bank groups, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR_L, "tWTR_L", HEX,
Help "Min Internal write to read command delay time for same bank groups, 0: AUTO, max: 127. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCCD_L, "tCCD_L", HEX,
Help "Min Internal CAS-to-CAS delay for same bank group, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCCD_L_WR, "tCCD_L_WR", HEX,
Help "Min Internal Write-to-Write delay for same bank group, 0: AUTO, max: 150. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR_S, "tWTR_S", HEX,
Help "Min Internal write to read command delay time for different bank groups, 0: AUTO, max: 50. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NModeSupport, "NMode", HEX,
Help "System command rate, range 0-2, 0 means auto, 1 = 1N, 2 = 2N"
"Valid range: 0x00 ~ 0x02"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaGvGear, "SAGV Gear Ratio", HEX,
Help "Gear Selection for SAGV points. 0 - Auto, 2-Gear 2, 4-Gear 4"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaGvFreq, "SAGV Frequency", HEX,
Help "SAGV Frequency per point in Mhz. 0 for Auto and a ratio of 133/100MHz: 1333/1300."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GearRatio, "SAGV Disabled Gear Ratio", HEX,
Help "Gear Selection for SAGV Disabled. 0 - Auto, 2-Gear 2, 2-Gear 4"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LpddrRttWr, "LPDDR ODT RttWr", HEX,
Help "Initial RttWr for LP4/5 in Ohms. 0x0 - Auto"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LpddrRttCa, "LPDDR ODT RttCa", HEX,
Help "Initial RttCa for LP4/5 in Ohms. 0x0 - Auto"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DimmOdt, "Dimm Odt settings", HEX,
Help "Dimm Odt settings of 2 DIMMs of a channel: Memory-dependent, 0: AUTO, max: 0xFFFF meaning disabling"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DFETap1, "Dimm DFE Tap1 settings Deprecated", HEX,
Help "Dimm DFE Tap1 settings: Memory-dependent, positive values will be converted to minus values by *-1 automatically"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DFETap2, "Dimm DFE Tap2 settings Deprecated", HEX,
Help "Dimm DFE Tap2 settings: Memory-dependent, positive values will be converted to minus values by *-1 automatically"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CsVrefLow, "CsVrefLow", HEX,
Help "DDR5 Cs Sweep Low Vref Value, 0: AUTO, max: 125."
"Valid range: 0x00 ~ 0xFD"
EditNum $gPlatformFspPkgTokenSpaceGuid_CsVrefHigh, "CsVrefHigh", HEX,
Help "DDR5 Cs Sweep High Vref Value, 0: AUTO, max: 125."
"Valid range: 0x00 ~ 0xFD"
EditNum $gPlatformFspPkgTokenSpaceGuid_CaVrefLow, "CaVrefLow", HEX,
Help "DDR5 Ca Sweep Low Vref Value, 0: AUTO, max: 125."
"Valid range: 0x00 ~ 0xFD"
EditNum $gPlatformFspPkgTokenSpaceGuid_CaVrefHigh, "CaVrefHigh", HEX,
Help "DDR5 Ca Sweep High Vref Value, 0: AUTO, max: 125."
"Valid range: 0x00 ~ 0xFD"
EditNum $gPlatformFspPkgTokenSpaceGuid_RxVrefOffset, "RxVrefOffset", HEX,
Help "DDR5 RxVref Offset Value, 0: AUTO, max: 1600."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MmioSizeAdjustment, "MMIO size adjustment for AUTO mode", HEX,
Help "Positive number means increasing MMIO size, Negative value means decreasing MMIO size: 0 (Default)=no change to AUTO mode MMIO size"
"Valid range: 0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay, "Selection of the primary display device", &gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay,
Help "0=iGFX, 3(Default)=AUTO, 4=Hybrid Graphics"
EditNum $gPlatformFspPkgTokenSpaceGuid_GmAdr, "Temporary MMIO address for GMADR", HEX,
Help "Obsolete field now and it has been extended to 64 bit address, used LMemBar "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GttMmAdr, "Temporary MMIO address for GTTMMADR", HEX,
Help "The reference code will use this as Temporary MMIO address space to access GTTMMADR Registers.Platform should provide conflict free Temporary MMIO Range: GttMmAdr to (GttMmAdr + 2MB MMIO + 6MB Reserved + GttSize). Default is (GmAdr - (2MB MMIO + 6MB Reserved + GttSize)) to (GmAdr - 0x1) (Where GttSize = 8MB)"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TxtImplemented, "Enable/Disable MRC TXT dependency", &EN_DIS,
Help "When enabled MRC execution will wait for TXT initialization to be done first. Disabled(0x0)(Default): MRC will not wait for TXT initialization, Enabled(0x1): MRC will wait for TXT initialization"
Combo $gPlatformFspPkgTokenSpaceGuid_SaOcSupport, "Enable/Disable SA OcSupport", &EN_DIS,
Help "Enable: Enable SA OcSupport, Disable(Default): Disable SA OcSupport"
Combo $gPlatformFspPkgTokenSpaceGuid_GtVoltageMode, "GT slice Voltage Mode", &gPlatformFspPkgTokenSpaceGuid_GtVoltageMode,
Help "0(Default): Adaptive, 1: Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtMaxOcRatio, "Maximum GTs turbo ratio override", HEX,
Help "0(Default)=Minimal/Auto, 60=Maximum"
"Valid range: 0x00 ~ 0x3C"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVoltageOffset, "The voltage offset applied to GT slice", HEX,
Help "0(Default)=Minimal, 1000=Maximum"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVoltageOverride, "The GT slice voltage override which is applied to the entire range of GT frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtAdaptiveVoltage, "adaptive voltage applied during turbo frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaVoltageOffset, "voltage offset applied to the SA", HEX,
Help "0(Default)=Minimal, 1000=Maximum"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_RootPortIndex, "PCIe root port Function number for Hybrid Graphics dGPU", HEX,
Help "Root port Index number to indicate which PCIe root port has dGPU"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming, "Realtime Memory Timing", &gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming,
Help "0(Default): Disabled, 1: Enabled. When enabled, it will allow the system to perform realtime memory timing changes after MRC_DONE."
Combo $gPlatformFspPkgTokenSpaceGuid_SaIpuEnable, "Enable/Disable SA IPU", &EN_DIS,
Help "Enable(Default): Enable SA IPU, Disable: Disable SA IPU"
Combo $gPlatformFspPkgTokenSpaceGuid_ImguClkOutEn, "IMGU CLKOUT Configuration", &EN_DIS,
Help "The configuration of IMGU CLKOUT, 0: Disable;<b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig, "Program GPIOs for LFP on DDI port-A device", &gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig,
Help "0=Disabled,1(Default)=eDP, 2=MIPI DSI"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig, "Program GPIOs for LFP on DDI port-B device", &gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig,
Help "0(Default)=Disabled,1=eDP, 2=MIPI DSI"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortAHpd, "Enable or disable HPD of DDI port A", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBHpd, "Enable or disable HPD of DDI port B", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortCHpd, "Enable or disable HPD of DDI port C", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort1Hpd, "Enable or disable HPD of DDI port 1", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort2Hpd, "Enable or disable HPD of DDI port 2", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort3Hpd, "Enable or disable HPD of DDI port 3", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort4Hpd, "Enable or disable HPD of DDI port 4", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortADdc, "Enable or disable DDC of DDI port A", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBDdc, "Enable or disable DDC of DDI port B", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortCDdc, "Enable or disable DDC of DDI port C", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort1Ddc, "Enable DDC setting of DDI Port 1", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort2Ddc, "Enable DDC setting of DDI Port 2", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort3Ddc, "Enable DDC setting of DDI Port 3", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort4Ddc, "Enable DDC setting of DDI Port 4", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DisplayGpioPinMux, "GPIO PIN MUX to choose between GPP_SA and GPP_SD Group.", HEX,
Help "Default will be 0 for each Display PIN Mux which is GPP_SA Group. (0 = SA GROUP, 1 = SD GROUP). BIT0 - EDP VDDEN, BIT1 - EDP BKLTEN, BIT2 - EDP BKLTCTRL, BIT3 - DDI-A, BIT4 - DDI-1/HPD1, BIT5 - DDI-2/HPD2, BIT6 - DDI-3/HPD3, BIT7 - DDI-4/HPD4"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LMemBar, "Temporary MMIO address for GMADR", HEX,
Help "The reference code will use this as Temporary MMIO address space to access GMADR Registers.Platform should provide conflict free Temporary MMIO Range: GmAdr to (GmAdr + 256MB). Default is (PciExpressBaseAddress - 256MB) to (PciExpressBaseAddress - 0x1)"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreHtDisable, "Per-core HT Disable", HEX,
Help "Defines the per-core HT disable mask where: 1 - Disable selected logical core HT, 0 - is ignored. Input is in HEX and each bit maps to a logical core. Ex. A value of '1F' would disable HT for cores 4,3,2,1 and 0. Default is 0, all cores have HT enabled. Range is 0 - 0x7F for max 8 cores. You can only disable up to MAX_CORE_COUNT - 1."
"Valid range: 0x00 ~ 0x7F"
Combo $gPlatformFspPkgTokenSpaceGuid_SaVoltageMode, "SA/Uncore voltage mode", &EN_DIS,
Help "SA/Uncore voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_SaVoltageOverride, "SA/Uncore Voltage Override", HEX,
Help "The SA/Uncore voltage override applicable when SA/Uncore voltage mode is in Override mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaAdaptiveVoltage, "SA/Uncore Adaptive voltage", HEX,
Help "Adaptive voltage applicable when SA/Uncore voltage mode is in Adaptive mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping, "Thermal Velocity Boost Ratio clipping", &EN_DIS,
Help "0: Disabled, 1(Default): Enabled. This service controls Core frequency reduction caused by high package temperatures for processors that implement the Intel Thermal Velocity Boost (TVB) feature"
Combo $gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization, "Thermal Velocity Boost voltage optimization", &EN_DIS,
Help "0: Disabled, 1: Enabled(Default). This service controls thermal based voltage optimizations for processors that implement the Intel Thermal Velocity Boost (TVB) feature."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieResizableBarSupport, "PCIE Resizable BAR Support", &EN_DIS,
Help "Enable/Disable PCIE Resizable BAR Support.0: Disable; 1: Enable; 2: Auto(Default)."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen4RootPortPreset, "PCH DMI Gen3 Root port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 4 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPreMemProductionRsvd, "SaPreMemProductionRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Production"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed, "DMI Max Link Speed", &gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed,
Help "Auto (Default)(0x0): Maximum possible link speed, Gen1(0x1): Limit Link to Gen1 Speed, Gen2(0x2): Limit Link to Gen2 Speed, Gen3(0x3):Limit Link to Gen3 Speed"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh2Enable, "PCH DMI Equalization Phase 2", &gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh2Enable,
Help "DMI Equalization Phase 2. (0x0): Disable phase 2, (0x1): Enable phase 2, (0x2)(Default): AUTO - Use the current default method"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh3Method, "PCH DMI Gen3 Equalization Phase3", &gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EqPh3Method,
Help "DMI Gen3 Equalization Phase3. Auto(0x0)(Default): Use the current default method, HwEq(0x1): Use Adaptive Hardware Equalization, SwEq(0x2): Use Adaptive Software Equalization (Implemented in BIOS Reference Code), Static(0x3): Use the Static EQs provided in DmiGen3EndPointPreset array for Phase1 AND Phase3 (Instead of just Phase1), Disabled(0x4): Bypass Equalization Phase 3"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3ProgramStaticEq, "Enable/Disable DMI GEN3 Static EQ Phase1 programming", &EN_DIS,
Help "Program DMI Gen3 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3RootPortPreset, "PCH DMI Gen3 Root port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 4 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EndPointPreset, "PCH DMI Gen3 End port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3EndPointHint, "PCH DMI Gen3 End port Hint values per lane", HEX,
Help "Used for programming DMI Gen3 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspm, "DMI ASPM Configuration:{Combo", HEX,
Help "Set ASPM Configuration"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiAspm, "PCH DMI ASPM Configuration:{Combo", HEX,
Help "Set ASPM Configuration"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiHweq, "Enable/Disable DMI GEN3 Hardware Eq", &EN_DIS,
Help "Enable/Disable DMI GEN3 Hardware Eq. Disabled(0x0): Disable Hardware Eq, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase23Bypass, "Enable/Disable DMI GEN3 Phase 23 Bypass", &EN_DIS,
Help "DMIGEN3 Phase 23 Bypass. Disabled(0x0)(Default): Disable Phase 23 Bypass, Enabled(0x1): Enable Phase 23 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase3Bypass, "Enable/Disable DMI GEN3 Phase 3 Bypass", &EN_DIS,
Help "DMIGEN3 Phase 3 Bypass. Disabled(0x0)(Default): Disable Phase 3 Bypass, Enabled(0x1): Enable Phase 3 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3LtcoEnable, "Enable/Disable DMI Gen3 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0): Disable Local Transmitter Coefficient Override, Enabled(0x1)(Default): Enable Local Transmitter Coefficient Override"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3RtcoRtpoEnable, "Enable/Disable DMI Gen3 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpre, "DMI Gen3 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen3 Transmitter Pre-Cursor Coefficient . Range: 0-10, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpo, "DMI Gen3 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming Transmitter Post-Cursor Coefficient. Range: 0-9, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3LtcoEnable, "Enable/Disable DMI Gen3 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0): Disable Local Transmitter Coefficient Override, Enabled(0x1)(Default): Enable Local Transmitter Coefficient Override"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3RtcoRtpoEnable, "Enable/Disable DMI Gen3 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3Ltcpre, "PCH DMI Gen3 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen3 Transmitter Pre-Cursor Coefficient . Range: 0-10, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen3Ltcpo, "PCH DMI Gen3 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming Transmitter Post-Cursor Coefficient. Range: 0-9, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen3CoeffListCm, "PCIE Hw Eq Gen3 CoeffList Cm", HEX,
Help "DMI_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen3CoeffListCp, "PCIE Hw Eq Gen3 CoeffList Cp", HEX,
Help "DMI_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPresetEnable, "Enable/Disable DMI GEN3 DmiGen3DsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN3 DmiGen3DsPreset. Auto(0x0)(Default): DmiGen3DsPresetEnable, Manual(0x1): Enable DmiGen3DsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortRxPreset, "DMI Gen3 Root port preset Rx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortTxPreset, "DMI Gen3 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPresetEnable, "Enable/Disable DMI GEN3 DmiGen3UsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN3 DmiGen3UsPreset. Auto(0x0)(Default): DmiGen3UsPresetEnable, Manual(0x1): Enable DmiGen3UsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortRxPreset, "DMI Gen3 Root port preset Rx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortTxPreset, "DMI Gen3 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen4CoeffListCm, "DMI Hw Eq Gen4 CoeffList Cm", HEX,
Help "DMI_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiHwEqGen4CoeffListCp, "DMI Hw Eq Gen4 CoeffList Cp", HEX,
Help "DMI_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase23Bypass, "Enable/Disable DMI GEN4 Phase 23 Bypass", &EN_DIS,
Help "DMI GEN4 Phase 23 Bypass. Disabled(0x0)(Default): Disable Phase 23 Bypass, Enabled(0x1): Enable Phase 23 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase3Bypass, "Enable/Disable DMI GEN4 Phase 3 Bypass", &EN_DIS,
Help "DMI GEN3 Phase 4 Bypass. Disabled(0x0)(Default): Disable Phase 3 Bypass, Enabled(0x1): Enable Phase 3 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPresetEnable, "Enable/Disable DMI GEN4 DmiGen4DsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN4 DmiGen4DsPreset. Auto(0x0)(Default): DmiGen4DsPresetEnable, Manual(0x1): Enable DmiGen4DsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPortTxPreset, "DMI Gen4 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen4 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4RtcoRtpoEnable, "Enable/Disable DMI Gen4 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4LtcoEnable, "Enable/Disable DMI Gen4 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0)(Default): Disable Local Transmitter Coefficient Override, Enabled(0x1): Enable Local Transmitter Coefficient Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpre, "DMI Gen4 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen4 Transmitter Pre-Cursor Coefficient . Range: 0-10, 0 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpo, "DMI Gen4 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming DMI Gen4 Transmitter Post-Cursor Coefficient. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPresetEnable, "Enable/Disable DMI GEN4 DmiGen4UsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN4 DmiGen4UsPreset. Auto(0x0)(Default): DmiGen4UsPresetEnable, Manual(0x1): Enable DmiGen4UsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPortTxPreset, "DMI Gen4 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen4 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspmL1ExitLatency, "DMI ASPM L1 exit Latency", HEX,
Help "Range: 0-7, 4 is default L1 exit Latency"
"Valid range: 0x00 ~ 0x07"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiGen4RtcoRtpoEnable, "Enable/Disable PCH DMI Gen4 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiGen4LtcoEnable, "Enable/Disable PCH DMI Gen4 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0)(Default): Disable Local Transmitter Coefficient Override, Enabled(0x1): Enable Local Transmitter Coefficient Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen4Ltcpo, "PCH DMI Gen4 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming DMI Gen4 Transmitter Post-Cursor Coefficient. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiAspmL1ExitLatency, "PCH DMI ASPM L1 exit Latency", HEX,
Help "Range: 0-7, 4 is default L1 exit Latency"
"Valid range: 0x00 ~ 0x07"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiGen4Ltcpre, "PCH DMI Gen4 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen4 Transmitter Pre-Cursor Coefficient . Range: 0-10, 0 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiL1ssEnable, "L1SS State Control Policy", &gPlatformFspPkgTokenSpaceGuid_DmiL1ssEnable,
Help "Choose the L1SS State Control Policy, <b>Default = 0 </b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_NvmeHcPeiMmioBase, "Temporary address for NvmeHcPeiMmioBase", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NvmeHcPeiMmioLimit, "Temporary address for NvmeHcPeiMmioLimit", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AhciPeiMmioBase, "Temporary address for AhciPeiMmioBase", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AhciPeiMmioLimit, "Temporary address for AhciPeiMmioLimit", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcExtraIoBase, "Temporary address for EcExtraIoBase", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SioBaseAddress, "Temporary address for SioBaseAddress", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ApicLocalAddress, "Temporary address for ApicLocalAddress", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBar, "Temporary CfgBar address for VMD", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Bar, "Temporary MemBar1 address for VMD", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Bar, "Temporary MemBar2 address for VMD", HEX,
Help "The reference code will use this as Temporary address space"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck, "Margin Limit Check", &gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck,
Help "Margin Limit Check. Choose level of margin check"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomClusterRatio, "Atom Cluster Max Ratio", HEX,
Help "Array for Atom Cluster Max Ratio, 4 ATOM cores are in the same Cluster and their max core ratio will be aligned."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreRatioExtensionMode, "Core Ratio Extension Mode", &EN_DIS,
Help "Enable or disable Core Ratio above 85 Extension Mode by writing BIOS MB 0x37 to enable FULL_RANGE_MULTIPLIER_UNLOCK_EN. <b>0: Disable</b>, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PvdRatioThreshold, "Pvd Ratio Threshold for SOC/CPU die", HEX,
Help "Array of Pvd Ratio Threshold for SOC/CPU die is the threshold value for input ratio (P0 to Pn) to select the multiplier so that the output is within the DCO frequency range. As per the die selected, this threshold is applied to SA and MC/CMI PLL for SOC die and SA, Ring and Atom PLL for CPU die. Range 0-63. When the threshold is 0, static PVD ratio is selected based on the PVD Mode for SOC. <b>0: Default</b>."
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PvdMode, "Pvd Mode SOC/CPU die", HEX,
Help "Array of PVD Mode. Value from 0 to 3 for SOC/CPU. 0x0 = div-1 (VCO = Output clock), 0x1 = div-2 (VCO = 2x Output clock), 0x2 = div-4 (VCO = 4x Output clock), 0x3 = div-8 (VCO = 8x Output clock)."
"Valid range: 0x0 ~ 0x3"
EditNum $gPlatformFspPkgTokenSpaceGuid_FllOverclockMode, "FLL Overclock Mode", HEX,
Help "Select FLL Mode Value from 0 to 3. 0x0 = no overclocking, 0x1 = ratio overclocking with nominal (0.5-1x) reference clock frequency, 0x2 = BCLK overclocking with elevated (1-3x) reference clock frequency, 0x3 = BCLK overclocking with extreme elevated (3-5x) reference clock frequency and ratio limited to 63."
"Valid range: 0x0 ~ 0x3"
Combo $gPlatformFspPkgTokenSpaceGuid_ActiveSocNorthAtomCoreCount, "Number of Soc-North Atom cores", &gPlatformFspPkgTokenSpaceGuid_ActiveSocNorthAtomCoreCount,
Help "Number of SOC-North E-cores to enable in SOC North. 0: Disable all Soc-North Atom cores; 1: 1; 2: 2; <b>0xFF: Active all Soc-North Atom cores</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode, "Ring VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode,
Help "Selects Ring Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffset, "Ring VF Point Offset", HEX,
Help "Array used to specifies the Ring Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetPrefix, "Ring VF Point Offset Prefix", HEX,
Help "Sets the RingVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointRatio, "Ring VF Point Ratio", HEX,
Help "Array for the each selected Ring VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointCount, "Ring VF Point Count", HEX,
Help "Number of supported Ring Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ComputeDieSscEnable, "Compute Die SSC enable", &EN_DIS,
Help "Enable/Dsiable Compute-Die SSC Configuration. 0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SocDieSscEnable, "Soc Die SSC enable", &EN_DIS,
Help "Enable/Dsiable Soc-Die SSC Configuration. 0(Default)=Disable, 1=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_GpioOverride, "GPIO Override", HEX,
Help "Gpio Override Level - FSP will not configure any GPIOs and rely on GPIO setings before moved to FSP. Available configurations 0: Disable; 1: Level 1 - Skips GPIO configuration in PEI/FSPM/FSPT phase;2: Level 2 - Reserved for use"
"Valid range: 0x00 ~ 0x7"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuBclkOcFrequency, "CPU BCLK OC Frequency", HEX,
Help "CPU BCLK OC Frequency in KHz units. 98000000Hz = 98MHz <b>0 - Auto</b>. Range is 40Mhz-1000Mhz."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SocBclkOcFrequency, "SOC BCLK OC Frequency", HEX,
Help "SOC BCLK OC Frequency in KHz units. 98000000Hz = 98MHz <b>0 - Auto</b>. Range is 40Mhz-1000Mhz."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CrashLogGprs, "Enable CPU CrashLog GPRs dump", &gPlatformFspPkgTokenSpaceGuid_CrashLogGprs,
Help "Enable or Disable CPU CrashLog GPRs dump; <b>0: Disable</b>; 1: Enable; 2: Only disable Smm GPRs dump"
EditNum $gPlatformFspPkgTokenSpaceGuid_DisablePerCoreMask, "Bitmask of disable cores", HEX,
Help "Core mask is a bitwise indication of which core should be disabled. <b>0x00=Default</b>; Bit 0 - core 0, bit 7 - core 7."
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_IaIccUnlimitedMode, "Support IA Unlimited ICCMAX", &EN_DIS,
Help "Support IA Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_IaIccMax, "IA ICCMAX", HEX,
Help "IA ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>0 (HW default)</b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_GtIccUnlimitedMode, "Support GT Unlimited ICCMAX", &EN_DIS,
Help "Support GT Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_GtIccMax, "GT ICCMAX", HEX,
Help "GT ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>0 (HW default)</b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaIccUnlimitedMode, "Support SA Unlimited ICCMAX", &EN_DIS,
Help "Support SA Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_SaIccMax, "SA ICCMAX", HEX,
Help "SA ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>0 (HW default)</b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffset, "Memory Subsystem VF Point Offset", HEX,
Help "Array used to specifies the Memory Subsystem Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffsetPrefix, "Memory Subsystem VF Point Offset Prefix", HEX,
Help "Sets the MemSSVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSVfPointRatio, "Memory Subsystem VF Point Ratio", HEX,
Help "Array for the each selected Memory Subsystem VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSVfPointCount, "Memory Subsystem VF Point Count", HEX,
Help "Number of supported Memory Subsystem Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VccsaBootVoltageSel, "VCCSA Boot Voltage", &gPlatformFspPkgTokenSpaceGuid_VccsaBootVoltageSel,
Help "<b> Default: 0: Nominal </b> 1: High Voltage(up to 1.2/1.3V) to support the voltage needed for VCCSA boot voltage."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuD2dRatio, "CPU D2D ratio setting", HEX,
Help "0(Default)=No setting, 15=Minimal, 40=Maximum"
"Valid range: 0x0F ~ 0x28"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuBandgapRefMode, "CPU Bandgap Reference Mode", &gPlatformFspPkgTokenSpaceGuid_CpuBandgapRefMode,
Help "<b> Default: 0: Normal </b> 1: Bandgap Bypassed) to support CPU Bandgap Reference Mode."
Combo $gPlatformFspPkgTokenSpaceGuid_VcciaBootVoltageSel, "VCCIA Boot Voltage", &gPlatformFspPkgTokenSpaceGuid_VcciaBootVoltageSel,
Help "<b> Default: 0: Nominal </b> 1: High Voltage to support the voltage higher than 1.65v (max 2.01v))"
Combo $gPlatformFspPkgTokenSpaceGuid_GranularRatioOverride, "Granular Ratio Override", &EN_DIS,
Help "Enable or disable OC Granular Ratio Override. <b>0: Disable</b>, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreGranularityBins, "Granularity Bins Override for Core", HEX,
Help "Array used to specifies the selected Core Granularity Bins."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerAtomClusterGranularityBins, "Granularity Bins Override for AtomCluster", HEX,
Help "Array used to specifies the selected AtomCluster Granularity Bins."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride, "Sa PLL Frequency", &gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride,
Help "Configure Sa PLL Frequency. <b>0: 2400MHz </b>, 1: 1600MHz"
Combo $gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup, "TSC HW Fixup disable", &gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup,
Help "TSC HW Fixup disable during TSC copy from PMA to APIC. <b>0: Enable</b>; 1: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessVmaxLimit, "Process Vmax Limit", &gPlatformFspPkgTokenSpaceGuid_ProcessVmaxLimit,
Help "Setting this bit will allow user to set any voltage. Note: Disabling the voltage limit checks may cause permanent damage to processor. <b>1: Enable</b>; 0: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_PcorePowerDensityThrottle, "P-Core Power Density Throttle", &gPlatformFspPkgTokenSpaceGuid_PcorePowerDensityThrottle,
Help "This control allow user to disable P-core Power Density Throttling for overclocking. <b>1: Enable</b>; 0: Disable"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreMinRatio, "Request Core Min Ratio", HEX,
Help "0(Default)=No Request"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPreMem, "ReservedCpuPreMem", &EN_DIS,
Help "Reserved for Cpu Pre-Mem"
Combo $gPlatformFspPkgTokenSpaceGuid_AcousticNoiseMitigation, "Acoustic Noise Mitigation feature", &EN_DIS,
Help "Enabling this option will help mitigate acoustic noise on certain SKUs when the CPU is in deeper C state. <b>0: Disabled</b>; 1: Enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysSlope, "Platform Psys slope correction", HEX,
Help "PSYS Slope defined in 1/100 increments. <b>0 - Auto</b> Specified in 1/100 increment values. Range is 0-200. 125 = 1.25"
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPmax, "Platform Power Pmax", HEX,
Help "PSYS PMax power, defined in 1/8 Watt increments. <b>0 - Auto</b> Specified in 1/8 Watt increments. Range 0-1024 Watts(0-8191). Value of 800 = 100W"
"Valid range: 0x00 ~ 0x400"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcCurrentLimit, "Thermal Design Current current limit", HEX,
Help "TDC Current Limit, defined in 1/8A increments. Range 0-32767. For a TDC Current Limit of 125A, enter 1000. 0 = 0 Amps. <b>0: Auto</b>. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x7FFF7FFF7FFF7FFF7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AcLoadline, "AcLoadline", HEX,
Help "AC Loadline defined in 1/100 mOhms. A value of 100 = 1.00 mOhm, and 1255 = 12.55 mOhm. Range is 0-6249 (0-62.49 mOhms). 0 = AUTO/HW default. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x7FFF7FFF7FFF7FFF7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DcLoadline, "DcLoadline", HEX,
Help "DC Loadline defined in 1/100 mOhms. A value of 100 = 1.00 mOhm, and 1255 = 12.55 mOhm. Range is 0-6249 (0-62.49 mOhms). 0 = AUTO/HW default. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x18691869186918691869"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi1Threshold, "Power State 1 Threshold current", HEX,
Help "PS Current Threshold1, defined in 1/4 A increments. A value of 400 = 100A. Range 0-512, which translates to 0-128A. 0 = AUTO. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x02000200020002000200"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi2Threshold, "Power State 2 Threshold current", HEX,
Help "PS Current Threshold2, defined in 1/4 A increments. A value of 400 = 100A. Range 0-512, which translates to 0-128A. 0 = AUTO. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x02000200020002000200"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi3Threshold, "Power State 3 Threshold current", HEX,
Help "PS Current Threshold3, defined in 1/4 A increments. A value of 400 = 100A. Range 0-512, which translates to 0-128A. 0 = AUTO. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x02000200020002000200"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi3Enable, "Power State 3 enable/disable", HEX,
Help "PS3 Enable/Disable. 0 - Disabled, 1 - Enabled. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi4Enable, "Power State 4 enable/disable", HEX,
Help "PS4 Enable/Disable. 0 - Disabled, 1 - Enabled. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ImonSlope, "Imon slope correction", HEX,
Help "IMON Slope defined in 1/100 increments. Range is 0-200. For a 1.25 slope, enter 125. <b>0: Auto</b>. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x00C800C800C800C800C8"
EditNum $gPlatformFspPkgTokenSpaceGuid_ImonOffset, "Imon offset correction", HEX,
Help "IMON Offset is an 32-bit signed value (2's complement). Units 1/1000, Range is [-128000, 127999]. For an offset of 25.348, enter 25348. <b>0: Auto</b>. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrConfigEnable, "Enable/Disable BIOS configuration of VR", HEX,
Help "VR Config Enable. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved. <b>0: Disable</b>; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcEnable, "Thermal Design Current enable/disable", HEX,
Help "Thermal Design Current enable/disable; <b>0: Disable</b>; 1: Enable. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcTimeWindow, "Thermal Design Current time window", HEX,
Help "TDC Time Window, value in seconds. Range from 1s to 448s, 0 = Auto/HW default. <b>0: Auto</b>. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x0006D6000006D6000006D6000006D6000006D600"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcLock, "Thermal Design Current Lock", HEX,
Help "Thermal Design Current Lock; <b>0: Disable</b>; 1: Enable. For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DlvrRfiFrequency, "DLVR RFI Frequency", HEX,
Help "DLVR RFI Frequency in MHz. <b>0x055A: 1370 MHz</b>."
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DlvrSpreadSpectrumPercentage, "DLVR RFI Spread Spectrum Percentage", HEX,
Help "DLVR SSC in percentage with multiple of 0.25%. 0 = 0%, 31 = 7.75%. <b>0x06: 1.5%</b>; u3.2 value from 0% - 7.75%."
"Valid range: 0x0 ~ 0x1F"
Combo $gPlatformFspPkgTokenSpaceGuid_DlvrRfiEnable, "DLVR RFI Enable", &EN_DIS,
Help "Enable/Disable DLVR RFI frequency hopping. 0: Disable; <b>1: Enable</b>."
EditNum $gPlatformFspPkgTokenSpaceGuid_PreWake, "Pre Wake Randomization time", HEX,
Help "Set the maximum Pre Wake randomization time in micro ticks. This is for acoustic noise mitigation Dynamic Perodicity Alteration (DPA) tuning. Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RampUp, "Ramp Up Randomization time", HEX,
Help "Set the maximum Ramp Up randomization time in micro ticks. This is for acoustic noise mitigation Dynamic Perodicity Alteration (DPA) tuning. Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RampDown, "Ramp Down Randomization time", HEX,
Help "Set the maximum Ramp Down randomization time in micro ticks. This is for acoustic noise mitigation Dynamic Perodicity Alteration (DPA) tuning. Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrPowerDeliveryDesign, "Available power delivery segments", HEX,
Help "This field is required to be non-zero on Desktop platforms. Used to communicate the power delivery design capability of the board. This value is an enum of the available power delivery segments that are defined in the Platform Design Guide. <b>0: Disable.</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrVoltageLimit, "VR Voltage Limit", HEX,
Help "Voltage Limit (VMAX). This value represents the Maximum instantaneous voltage allowed at any given time. Range is 0 - 7999mV. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x1F3F1F3F1F3F1F3F1F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PS1toPS0DynamicCutoffEnable, "Enable/Disable PS1 to PS0 Dynamic Cutoff", HEX,
Help "PS1 to PS0 Dynamic Cutoff Enable/Disable. <b>0: Disable</b>; 1: Enable. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PS1toPS0MCoef, "PS1 to PS0 Dynamic Cutoff M Coef", HEX,
Help "PS1 to PS0 Dynamic Cutoff M Coef, This number is in M*100 units. For 12.50, enter 1250. Range: 0-4096. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x10001000100010001000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PS1toPS0CCoef, "PS1 to PS0 Dynamic Cutoff C Coef", HEX,
Help "PS1 to PS0 Dynamic Cutoff C Coef, This number is in C*100 units. For 12.50, enter 1250. If your value bigger than 2047, it will minus 4096. For -12.50, enter 2846, range:0-4096. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x10001000100010001000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PS2toPS1DynamicCutoffEnable, "Enable/Disable PS2 to PS1 Dynamic Cutoff", HEX,
Help "PS2 to PS1 Dynamic Cutoff Enable/Disable. <b>0: Disable</b>; 1: Enable. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PS2toPS1MCoef, "PS2 to PS1 Dynamic Cutoff M Coef", HEX,
Help "PS2 to PS1 Dynamic Cutoff M Coef, This number is in M*100 units. For 12.50, enter 1250, range:0-4096. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x10001000100010001000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PS2toPS1CCoef, "PS2 to PS1 Dynamic Cutoff C Coef", HEX,
Help "PS2 to PS1 Dynamic Cutoff C Coef, This number is in C*100 units. For 12.50, enter 1250. If your value bigger than 2047, it will minus 4096. For -12.50, enter 2846, range:0-4096. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x10001000100010001000"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInDemotionEnable, "VCCIN Demotion", HEX,
Help "DEPRECATED. En/Dis VCCIN Demotion. 0: Disable, <b>1: Enable with default threshold</b>, 2: Enable with user configured threshold. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInDemotionQuiescentPowerInMw, "VCCIN Demotion Quiescent Power in mW", HEX,
Help "DEPRECATED. User configured platform quiescent threshold in milli-watt when VCC Demotion is enabled. Range is 0-255mW. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInDemotionCapacitanceInUf, "VCCIN Demotion Capacitance in uF", HEX,
Help "DEPRECATED. User configured VR's quiescent power threshold in micro-farad when VCC Demotion is enabled. Range: 0-2000uF. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x000007D0000007D0000007D0000007D0000007D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysOffset, "Platform Psys offset correction", HEX,
Help "PSYS Offset defined in 1/1000 increments. <b>0 - Auto</b> This is an 32-bit signed value (2's complement). Units 1/1000, Range is [-128000, 127999]. For an offset of 25.348, enter 25348."
"Valid range: 0x0000 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_FastPkgCRampDisable, "Disable Fast Slew Rate for Deep Package C States for VR domains", &EN_DIS,
Help "This option needs to be configured to reduce acoustic noise during deeper C states. False: Don't disable Fast ramp during deeper C states; True: Disable Fast ramp during deeper C state. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved. <b>0: False</b>; 1: True"
Combo $gPlatformFspPkgTokenSpaceGuid_SlowSlewRate, "Slew Rate configuration for Deep Package C States for VR domains", &gPlatformFspPkgTokenSpaceGuid_SlowSlewRate,
Help "Set VR IA/GT/SA Slow Slew Rate for Deep Package C State ramp time; Slow slew rate equals to Fast divided by number, the number is 2, 4, 8, 16 to slow down the slew rate to help minimize acoustic noise; divide by 16 is disabled for GT/SA. <b>0: Fast/2</b>; 1: Fast/4; 2: Fast/8; 3: Fast/16; 0xFF: Ignore the configuration"
EditNum $gPlatformFspPkgTokenSpaceGuid_IccMax, "Icc Max limit", HEX,
Help "Voltage Regulator Current Limit (Icc Max). This value represents the Maximum instantaneous current allowed at any given time. The value is represented in 1/4 A increments. A value of 400 = 100A. 0 means AUTO. IA and GT, range 0-2047. SA range 0-1023. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x07FF07FF03FFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FastVmodeOffset, "VR Fast Vmode Offset", HEX,
Help "Voltage Regulator Fast Vmode Offset. This value represents the ICC Max Offset(dV/dT) to be configured if Fast Vmode is enabled. The value is represented in 1 mV increments. 0 = Use processor default setting. Highly recommend to keep at the default setting. IA, GT and SA, range 0-255. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SvidStabilizationDelay, "SVID Stabiliation Delay", HEX,
Help "Configure SVID Stabiliation Delay being used for the FVM feature when it is enabled. Note that this delay applies to all SVID domains equally (no unique values possible for IA/GT/SA).The value is represented in 1 us increments. IA, GT and SA, range 0-255."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccDemotionShutdownThreshold, "VCC Demotion Shutdown Threshold in msec", HEX,
Help "User configured time threshold in msec. Range is 0-255 msec. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IccLimit, "VR Fast Vmode ICC Limit support", HEX,
Help "Voltage Regulator Fast Vmode ICC Limit. A value of 400 = 100A. A value of 0 corresponds to feature disabled (no reactive protection). This value represents the current threshold where the VR would initiate reactive protection if Fast Vmode is enabled. The value is represented in 1/4 A increments. Range 0-2040. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0x07F807F807F807F807F8"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableFastVmode, "Enable/Disable VR FastVmode. The VR will initiate reactive protection if Fast Vmode is enabled.", &gPlatformFspPkgTokenSpaceGuid_EnableFastVmode,
Help "Enable/Disable VR FastVmode; 0: Disable; <b>1: Enable</b>. For all VR by domain"
Combo $gPlatformFspPkgTokenSpaceGuid_CepEnable, "Enable CEP", &EN_DIS,
Help "Enable/Disable CEP (Current Excursion Protection) Support. 0: Disable; <b>1: Enable</b>. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
Combo $gPlatformFspPkgTokenSpaceGuid_SirpEnable, "Enable SIRP", &EN_DIS,
Help "Enable/Disable SIRP (SoC Iccmax Reactive Protection) Support. <b>0: Disable</b>; 1: Enable. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
EditNum $gPlatformFspPkgTokenSpaceGuid_Irms, "Enable IRMS", HEX,
Help "Enable/Disable IRMS for VR domains - Current root mean square. <b>0: Disable</b>; 1: Enable. [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UnderVoltProtection, "UnderVolt Protection", &EN_DIS,
Help "When UnderVolt Protection is enabled, user will be not be able to program under voltage in OS runtime. 0: Disabled; <b>1: Enabled</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_EnableVsysCritical, "Vsys Critical", HEX,
Help "PCODE MMIO Mailbox: Vsys Critical. <b>0: Disable</b>; 1: Enable Range is 0-255."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysFullScale, "Vsys Full Scale", DEC,
Help "Vsys Full Scale, Range is 0-255000mV"
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold, "Vsys Critical Threshold", DEC,
Help "Vsys Critical Threshold, Range is 0-255000mV "
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysFullScale, "Psys Full Scale", DEC,
Help "Vsys Full Scale, Range is 0-255000mV"
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysCriticalThreshold, "Psys Critical Threshold", DEC,
Help "Vsys Critical Threshold, Range is 0-255000mV "
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchMantissa, "Assertion Deglitch Mantissa", HEX,
Help "Assertion Deglitch Mantissa, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchExponent, "Assertion Deglitch Exponent", HEX,
Help "Assertion Deglitch Exponent, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchMantissa, "De assertion Deglitch Mantissa", HEX,
Help "De assertion Deglitch Mantissa, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchExponent, "De assertion Deglitch Exponent", HEX,
Help "De assertion Deglitch Exponent, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreMaxRatio, "Per Core Max OC Ratio", HEX,
Help "Array for the Per Core Max OC Ratio"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerAtomClusterMaxRatio, "Per Atom Cluster Max OC Ratio", HEX,
Help "Array for the Per Atom Cluster Max OC Ratio"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxVoltageLimit, "OC Max Voltage limits", HEX,
Help "OC Max Voltage limits"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CorePllCurrentRefTuningOffset, "Core PLL Current Reference Tuning Offset", HEX,
Help "Core PLL Current Reference Tuning Offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingPllCurrentRefTuningOffset, "Ring PLL Current Reference Tuning Offset", HEX,
Help "Ring PLL Current Reference Tuning Offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IaAtomPllCurrentRefTuningOffset, "IaAtom PLL Current Reference Tuning Offset", HEX,
Help "IaAtom PLL Current Reference Tuning Offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreDisableConfiguration, "Per Core Disable Configuration", HEX,
Help "This configuration can be used only when OC is enabled,user can either use legacy num of cores option or the OC specific per core disable configuration. <b>0: Disable</b>, 1: Enable"
"Valid range: 0x0 ~ 0x1"
Combo $gPlatformFspPkgTokenSpaceGuid_BiosGuard, "BiosGuard", &EN_DIS,
Help "Enable/Disable. 0: Disable, Enable/Disable BIOS Guard feature, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_Txt, "Txt", &EN_DIS,
Help "Enables utilization of additional hardware capabilities provided by Intel (R) Trusted Execution Technology. Changes require a full power cycle to take effect. <b>0: Disable</b>, 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PrmrrSize, "PrmrrSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of PrmrrSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SinitMemorySize, "SinitMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of SinitMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtDprMemoryBase, "TxtDprMemoryBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtDprMemoryBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtHeapMemorySize, "TxtHeapMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtHeapMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtDprMemorySize, "TxtDprMemorySize", HEX,
Help "Reserve DPR memory size (0-255) MB. 0: Disable, define default value of TxtDprMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosAcmBase, "BiosAcmBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosAcmSize, "BiosAcmSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ApStartupBase, "ApStartupBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TgaSize, "TgaSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TgaSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtLcpPdBase, "TxtLcpPdBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtLcpPdBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtLcpPdSize, "TxtLcpPdSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtLcpPdSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IsTPMPresence, "IsTPMPresence", HEX,
Help "IsTPMPresence default values"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedSecurityPreMem, "ReservedSecurityPreMem", &EN_DIS,
Help "Reserved for Security Pre-Mem"
Combo $gPlatformFspPkgTokenSpaceGuid_HobBufferSize, "HobBufferSize", &gPlatformFspPkgTokenSpaceGuid_HobBufferSize,
Help "Size to set HOB Buffer. 0:Default, 1: 1 Byte, 2: 1 KB, 3: Max value(assuming 63KB total HOB size)."
Combo $gPlatformFspPkgTokenSpaceGuid_ECT, "Early Command Training", &EN_DIS,
Help "Enables/Disable Early Command Training"
Combo $gPlatformFspPkgTokenSpaceGuid_SOT, "SenseAmp Offset Training", &EN_DIS,
Help "Enables/Disable SenseAmp Offset Training"
Combo $gPlatformFspPkgTokenSpaceGuid_ERDMPRTC2D, "Early ReadMPR Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Early ReadMPR Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDMPRT, "Read MPR Training", &EN_DIS,
Help "Enables/Disable Read MPR Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RCVET, "Receive Enable Training", &EN_DIS,
Help "Enables/Disable Receive Enable Training"
Combo $gPlatformFspPkgTokenSpaceGuid_JWRL, "Jedec Write Leveling", &EN_DIS,
Help "Enables/Disable Jedec Write Leveling"
Combo $gPlatformFspPkgTokenSpaceGuid_EWRTC2D, "Early Write Time Centering 2D", &EN_DIS,
Help "Enables/Disable Early Write Time Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_ERDTC2D, "Early Read Time Centering 2D", &EN_DIS,
Help "Enables/Disable Early Read Time Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_UNMATCHEDWRTC1D, "Unmatched Write Time Centering 1D", &EN_DIS,
Help "Enable/Disable {Unmatched Write Time Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTC1D, "Write Timing Centering 1D", &EN_DIS,
Help "Enables/Disable Write Timing Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRVC1D, "Write Voltage Centering 1D", &EN_DIS,
Help "Enables/Disable Write Voltage Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDTC1D, "Read Timing Centering 1D", &EN_DIS,
Help "Enables/Disable Read Timing Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVC1D, "Read Voltage Centering 1D", &EN_DIS,
Help "Enable/Disable Read Voltage Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_DDR5ODTTIMING, "DDR5 ODT Timing Config", &EN_DIS,
Help "Enable/Disable DDR5 ODT TIMING CONFIG"
Combo $gPlatformFspPkgTokenSpaceGuid_VIEWPINCAL, "View Pin Calibration", &EN_DIS,
Help "Enables/Disable View Pin Calibration"
Combo $gPlatformFspPkgTokenSpaceGuid_RDDQSODTT, "Read DQS ODT Training", &EN_DIS,
Help "Enables/Disable Read DQS ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDDQODTT, "Read DQ ODT Training", &EN_DIS,
Help "Enables/Disable Read DQ ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDEQT, "Read Equalization Training", &EN_DIS,
Help "Enables/Disable Read Equalization Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDCTLET, "Read CTLE Training", &EN_DIS,
Help "Enables/Disable Read CTLE Training"
Combo $gPlatformFspPkgTokenSpaceGuid_PPR, "Hard Post Package Repair", &EN_DIS,
Help "Enables/Disable Hard Post Package Repair"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTC2D, "Write Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Write Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDTC2D, "Read Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Read Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRVC2D, "Write Voltage Centering 2D", &EN_DIS,
Help "Enables/Disable Write Voltage Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVC2D, "Read Voltage Centering 2D", &EN_DIS,
Help "Enables/Disable Read Voltage Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RXVREFPERBIT, "RxVref Per-Bit Training", &EN_DIS,
Help "Enable/Disable RxVref Per-Bit Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDVC, "Command Voltage Centering", &EN_DIS,
Help "Enables/Disable Command Voltage Centering"
Combo $gPlatformFspPkgTokenSpaceGuid_LCT, "Late Command Training", &EN_DIS,
Help "Enables/Disable Late Command Training"
Combo $gPlatformFspPkgTokenSpaceGuid_TAT, "Turn Around Timing Training", &EN_DIS,
Help "Enables/Disable Turn Around Timing Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RMT, "Rank Margin Tool", &EN_DIS,
Help "Enable/disable Rank Margin Tool"
Combo $gPlatformFspPkgTokenSpaceGuid_LVRAUTOTRIM, "LVR Auto Trim", &EN_DIS,
Help "Enable/disable LVR Auto Trim"
Combo $gPlatformFspPkgTokenSpaceGuid_ALIASCHK, "DIMM SPD Alias Test", &EN_DIS,
Help "Enables/Disable DIMM SPD Alias Test"
Combo $gPlatformFspPkgTokenSpaceGuid_RMC, "Retrain Margin Check", &EN_DIS,
Help "Enables/Disable Retrain Margin Check"
Combo $gPlatformFspPkgTokenSpaceGuid_ROWHAMMER, "Row Hammering Prevention", &EN_DIS,
Help "Enables/Disable Row Hammering Prevention"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTT, "Dimm ODT Training", &EN_DIS,
Help "Enables/Disable Dimm ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMRONT, "DIMM RON Training", &EN_DIS,
Help "Enables/Disable DIMM RON Training"
Combo $gPlatformFspPkgTokenSpaceGuid_TXTCO, "TxDqTCO Comp Training", &EN_DIS,
Help "Enable/Disable TxDqTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CLKTCO, "ClkTCO Comp Training", &EN_DIS,
Help "Enable/Disable ClkTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDSR, "CMD Slew Rate Training", &EN_DIS,
Help "Enable/Disable CMD Slew Rate Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDDS, "CMD Drive Strength", &EN_DIS,
Help "Enable/Disable CMD Drive Strength"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDTXEQ, "CMD Tx Equalization", &EN_DIS,
Help "Enable/Disable CMD Tx Equalization"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTCA, "DIMM CA ODT Training", &EN_DIS,
Help "Enable/Disable DIMM CA ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTRETRAIN, "Write DQ/DQS Retraining", &EN_DIS,
Help "Enable/Disable Write DQ/DQS Retraining"
Combo $gPlatformFspPkgTokenSpaceGuid_PWRMETER, "Power Saving Meter Update", &EN_DIS,
Help "Enable/Disable Power Saving Meter Update"
Combo $gPlatformFspPkgTokenSpaceGuid_DDRPRECOMP, "Pre-Training Comp Calibration", &EN_DIS,
Help "Enable/Disable Pre-Training Comp Calibration"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVREFDC, "Read Vref Decap Training", &EN_DIS,
Help "Enable/Disable Read Vref Decap Training"
Combo $gPlatformFspPkgTokenSpaceGuid_VDDQT, "Vddq Training", &EN_DIS,
Help "Enable/Disable Vddq Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RMTBIT, "Rank Margin Tool Per Bit", &EN_DIS,
Help "Enable/Disable Rank Margin Tool Per Bit"
Combo $gPlatformFspPkgTokenSpaceGuid_DQDQSSWZ, "DQ/DQS Swizzle Training", &EN_DIS,
Help "Enable/Disable DQ/DQS Swizzle Training"
Combo $gPlatformFspPkgTokenSpaceGuid_REFPI, "Ref PI Calibration", &EN_DIS,
Help "Enable/Disable Ref PI Calibration"
Combo $gPlatformFspPkgTokenSpaceGuid_RXSALCAL, "Rx SAL Calibration", &gPlatformFspPkgTokenSpaceGuid_RXSALCAL,
Help "Enable/Disable Rx SAL Calibration"
Combo $gPlatformFspPkgTokenSpaceGuid_VCCCLKFF, "VccClk FF Offset Correction", &gPlatformFspPkgTokenSpaceGuid_VCCCLKFF,
Help "Enable/Disable VccClk FF Offset Correction"
Combo $gPlatformFspPkgTokenSpaceGuid_DCC, "Duty Cycle Correction Training", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction Training"
Combo $gPlatformFspPkgTokenSpaceGuid_DCCDOWNSTREAM, "Duty Cycle Correction Downstream Training", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction Downstream - PI Serializer/LUT"
Combo $gPlatformFspPkgTokenSpaceGuid_DCCQCLK, "Duty Cycle Correction QCLK Calibration", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction QCLK Calbration"
Combo $gPlatformFspPkgTokenSpaceGuid_DCCRISEFALL, "Duty Cycle Correction Rise/Fall Training", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction Rise/Fall Training"
Combo $gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQS, "Functional Duty Cycle Correction for DDR5 DQS", &gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQS,
Help "Enable/Disable Functional Duty Cycle Correction for DDR5 DQS"
Combo $gPlatformFspPkgTokenSpaceGuid_FUNCDCCCLK, "Functional Duty Cycle Correction for DDR5 CLK", &gPlatformFspPkgTokenSpaceGuid_FUNCDCCCLK,
Help "Enable/Disable Functional Duty Cycle Correction for DDR5 CLK"
Combo $gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQ, "Functional Duty Cycle Correction for Data DQ", &gPlatformFspPkgTokenSpaceGuid_FUNCDCCDQ,
Help "Enable/Disable Functional Duty Cycle Correction for Data DQ"
Combo $gPlatformFspPkgTokenSpaceGuid_DATAPILIN, "Data PI Linearity Calibration", &EN_DIS,
Help "Enable/Disable {ata PI Linearity Calibration"
Combo $gPlatformFspPkgTokenSpaceGuid_DDR5XTALK, "Ddr5 Rx Cross-Talk Cancellation", &EN_DIS,
Help "Enable/Disable Ddr5 Rx Cross-Talk Cancellation"
Combo $gPlatformFspPkgTokenSpaceGuid_DCCLP5WCKDCA, "Duty Cycle Correction for LP5 DCA", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction for LP5 DCA"
Combo $gPlatformFspPkgTokenSpaceGuid_RXUNMATCHEDCAL, "Unmatched Rx Calibration", &EN_DIS,
Help "Enable/Disable Rx Unmatched Calibration"
Combo $gPlatformFspPkgTokenSpaceGuid_TXRK2RK, "Write Rank-to-Rank Training", &EN_DIS,
Help "Enable/Disable Write Rank-to-Rank Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RXRK2RK, "Read Rank-to-Rank Training", &EN_DIS,
Help "Enable/Disable Read Rank-to-Rank Training"
Combo $gPlatformFspPkgTokenSpaceGuid_OPTIMIZECOMP, "Compensation Optimization", &EN_DIS,
Help "Enable/Disable Compensation Optimization"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTDIMMDFE, "DIMM DFE Training", &EN_DIS,
Help "Enable/Disable DIMM DFE Training"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTDS, "Write Drive Strength", &EN_DIS,
Help "Enables/Disable Write Drive Strength"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTEQ, "Write Equalization", &EN_DIS,
Help "Enables/Disable Write Equalization"
Combo $gPlatformFspPkgTokenSpaceGuid_EccSupport, "ECC Support", &EN_DIS,
Help "Enables/Disable ECC Support"
Combo $gPlatformFspPkgTokenSpaceGuid_Ibecc, "Ibecc", &EN_DIS,
Help "In-Band ECC Support"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccParity, "IbeccParity", &EN_DIS,
Help "In-Band ECC Parity Control"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode, "IbeccOperationMode", &gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode,
Help "In-Band ECC Operation Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionEnable, "IbeccProtectedRegionEnable", &EN_DIS,
Help "In-Band ECC Protected Region Enable "
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionBase, "IbeccProtectedRegionBases", HEX,
Help "IBECC Protected Region Bases per IBECC instance"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionMask, "IbeccProtectedRegionMasks", HEX,
Help "IBECC Protected Region Masks"
"Valid range: 0x00 ~ 0x3FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRegionOverallBase, "IbeccProtectedRegionOverallBases", HEX,
Help "IBECC Protected Region Bases based on enabled IBECC instance"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_RemapEnable, "Memory Remap", &EN_DIS,
Help "Enables/Disable Memory Remap"
Combo $gPlatformFspPkgTokenSpaceGuid_RankInterleave, "Rank Interleave support", &EN_DIS,
Help "Enables/Disable Rank Interleave support. NOTE: RI and HORI can not be enabled at the same time."
Combo $gPlatformFspPkgTokenSpaceGuid_EnhancedInterleave, "Enhanced Interleave support", &EN_DIS,
Help "Enables/Disable Enhanced Interleave support"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashEnable, "Ch Hash Support", &EN_DIS,
Help "Enable/Disable Channel Hash Support. NOTE: ONLY if Memory interleaved Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableExtts, "Extern Therm Status", &EN_DIS,
Help "Enables/Disable Extern Therm Status"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePwrDn, "DDR PowerDown and idle counter", &EN_DIS,
Help "Enables/Disable DDR PowerDown and idle counter(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePwrDnLpddr, "DDR PowerDown and idle counter", &EN_DIS,
Help "Enables/Disable DDR PowerDown and idle counter(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_SrefCfgEna, "SelfRefresh Enable", &EN_DIS,
Help "Enables/Disable SelfRefresh Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeatLpddr, "Throttler CKEMin Defeature", &EN_DIS,
Help "Enables/Disable Throttler CKEMin Defeature(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeat, "Throttler CKEMin Defeature", &EN_DIS,
Help "Enables/Disable Throttler CKEMin Defeature"
Combo $gPlatformFspPkgTokenSpaceGuid_RhSelect, "Row Hammer Select", &gPlatformFspPkgTokenSpaceGuid_RhSelect,
Help "Row Hammer Select"
Combo $gPlatformFspPkgTokenSpaceGuid_ExitOnFailure, "Exit On Failure (MRC)", &EN_DIS,
Help "Enables/Disable Exit On Failure (MRC)"
Combo $gPlatformFspPkgTokenSpaceGuid_DccSingleRankTrack, "DCC Single Rank Tracking", &EN_DIS,
Help "Force DCC to track single rank only"
Combo $gPlatformFspPkgTokenSpaceGuid_IsDdr5MR7WicaSupported, "DDR5 supports MR7 WICA 0.5 tCK offset", &gPlatformFspPkgTokenSpaceGuid_IsDdr5MR7WicaSupported,
Help "DDR5 DRAM Device supports MR7 WICA 0.5 tCK offset, <b>0:False</b>, 1:True"
Combo $gPlatformFspPkgTokenSpaceGuid_Write0, "Write0 feature", &EN_DIS,
Help "Enables/Disable Write0 feature"
Combo $gPlatformFspPkgTokenSpaceGuid_DdpSharedClock, "Select if CLK0 is shared between Rank0 and Rank1 in DDR4 DDP", &EN_DIS,
Help "Select if CLK0 is shared between Rank0 and Rank1 in DDR4 DDP"
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedZq, "Select if ZQ pin is shared between Rank0 and Rank1 in DDR4 DDP", &EN_DIS,
Help "ESelect if ZQ pin is shared between Rank0 and Rank1 in DDR4 DDP"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit, "Ch Hash Interleaved Bit", &gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit,
Help "Select the BIT to be used for Channel Interleaved mode. NOTE: BIT7 will interlave the channels at a 2 cacheline granularity, BIT8 at 4 and BIT9 at 8. Default is BIT8"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChHashMask, "Ch Hash Mask", HEX,
Help "Set the BIT(s) to be included in the XOR function. NOTE BIT mask corresponds to BITS [19:6] Default is 0x30CC"
"Valid range: 0x0000 ~ 0x3FFF"
Combo $gPlatformFspPkgTokenSpaceGuid_BClkFrequency, "Base reference clock value", &gPlatformFspPkgTokenSpaceGuid_BClkFrequency,
Help "Base reference clock value, in Hertz(Default is 125Hz)"
EditNum $gPlatformFspPkgTokenSpaceGuid_Idd3n, "EPG DIMM Idd3N", HEX,
Help "Active standby current (Idd3N) in milliamps from datasheet. Must be calculated on a per DIMM basis. Default is 26"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_Idd3p, "EPG DIMM Idd3P", HEX,
Help "Active power-down current (Idd3P) in milliamps from datasheet. Must be calculated on a per DIMM basis. Default is 11"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDNORM, "CMD Normalization", &EN_DIS,
Help "Enable/Disable CMD Normalization"
Combo $gPlatformFspPkgTokenSpaceGuid_EWRDSEQ, "Early DQ Write Drive Strength and Equalization Training", &EN_DIS,
Help "Enable/Disable Early DQ Write Drive Strength and Equalization Training"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm0, "Idle Energy Mc0Ch0Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm1, "Idle Energy Mc0Ch0Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm0, "Idle Energy Mc0Ch1Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm1, "Idle Energy Mc0Ch1Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm0, "Idle Energy Mc1Ch0Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm1, "Idle Energy Mc1Ch0Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm0, "Idle Energy Mc1Ch1Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm1, "Idle Energy Mc1Ch1Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm0, "PowerDown Energy Mc0Ch0Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm1, "PowerDown Energy Mc0Ch0Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm0, "PowerDown Energy Mc0Ch1Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm1, "PowerDown Energy Mc0Ch1Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm0, "PowerDown Energy Mc1Ch0Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm1, "PowerDown Energy Mc1Ch0Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm0, "PowerDown Energy Mc1Ch1Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm1, "PowerDown Energy Mc1Ch1Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm0, "Activate Energy Mc0Ch0Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm1, "Activate Energy Mc0Ch0Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm0, "Activate Energy Mc0Ch1Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm1, "Activate Energy Mc0Ch1Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm0, "Activate Energy Mc1Ch0Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm1, "Activate Energy Mc1Ch0Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm0, "Activate Energy Mc1Ch1Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm1, "Activate Energy Mc1Ch1Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm0, "Read Energy Mc0Ch0Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm1, "Read Energy Mc0Ch0Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm0, "Read Energy Mc0Ch1Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm1, "Read Energy Mc0Ch1Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm0, "Read Energy Mc1Ch0Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm1, "Read Energy Mc1Ch0Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm0, "Read Energy Mc1Ch1Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm1, "Read Energy Mc1Ch1Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm0, "Write Energy Mc0Ch0Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm1, "Write Energy Mc0Ch0Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm0, "Write Energy Mc0Ch1Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm1, "Write Energy Mc0Ch1Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm0, "Write Energy Mc1Ch0Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm1, "Write Energy Mc1Ch0Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm0, "Write Energy Mc1Ch1Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm1, "Write Energy Mc1Ch1Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmr, "Throttler CKEMin Timer", HEX,
Help "Timer value for CKEMin, range[255;0]. Req'd min of SC_ROUND_T + BYTE_LENGTH (4). Dfault is 0x00"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AllowOppRefBelowWriteThrehold, "Allow Opp Ref Below Write Threhold", &EN_DIS,
Help "Allow opportunistic refreshes while we don't exit power down."
EditNum $gPlatformFspPkgTokenSpaceGuid_WriteThreshold, "Write Threshold", HEX,
Help "Number of writes that can be accumulated while CKE is low before CKE is asserted."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh0, "Rapl Power Floor Ch0", HEX,
Help "Power budget ,range[255;0],(0= 5.3W Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh1, "Rapl Power Floor Ch1", HEX,
Help "Power budget ,range[255;0],(0= 5.3W Def)"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnCmdRate, "Command Rate Support", &gPlatformFspPkgTokenSpaceGuid_EnCmdRate,
Help "CMD Rate and Limit Support Option. NOTE: ONLY supported in 1N Mode, Default is 3 CMDs"
Combo $gPlatformFspPkgTokenSpaceGuid_McRefreshRate, "MC_REFRESH_RATE", &gPlatformFspPkgTokenSpaceGuid_McRefreshRate,
Help "Type of Refresh Rate used to prevent Row Hammer. Default is NORMAL Refresh"
Combo $gPlatformFspPkgTokenSpaceGuid_EpgEnable, "Energy Performance Gain", &EN_DIS,
Help "Enable/disable Energy Performance Gain. <b>0: Disable</b>; 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lfsr0Mask, "RH pTRR LFSR0 Mask", HEX,
Help "Row Hammer pTRR LFSR0 Mask, 1/2^(value)"
"Valid range: 0x01 ~ 0xF"
Combo $gPlatformFspPkgTokenSpaceGuid_UserThresholdEnable, "User Manual Threshold", &EN_DIS,
Help "Disabled: Predefined threshold will be used.\nEnabled: User Input will be used."
Combo $gPlatformFspPkgTokenSpaceGuid_UserBudgetEnable, "User Manual Budget", &EN_DIS,
Help "Disabled: Configuration of memories will defined the Budget value.\nEnabled: User Input will be used."
Combo $gPlatformFspPkgTokenSpaceGuid_OpportunisticSref, "Opportunistic Self Refresh", &gPlatformFspPkgTokenSpaceGuid_OpportunisticSref,
Help "Enable\Disable Opportunistic Self Refresh."
Combo $gPlatformFspPkgTokenSpaceGuid_PowerDownMode, "Power Down Mode", &gPlatformFspPkgTokenSpaceGuid_PowerDownMode,
Help "This option controls command bus tristating during idle periods"
EditNum $gPlatformFspPkgTokenSpaceGuid_PwdwnIdleCounter, "Pwr Down Idle Timer", HEX,
Help "The minimum value should = to the worst case Roundtrip delay + Burst_Length. 0 means AUTO: 64 for ULX/ULT, 128 for DT/Halo"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout, "Page Close Idle Timeout", &gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout,
Help "This option controls Page Close Idle Timeout"
EditNum $gPlatformFspPkgTokenSpaceGuid_CmdRanksTerminated, "Bitmask of ranks that have CA bus terminated", HEX,
Help "Offset 225 LPDDR4: Bitmask of ranks that have CA bus terminated. <b>0x01=Default, Rank0 is terminating and Rank1 is non-terminating</b>"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel, "PcdSerialDebugLevel", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel,
Help "Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
EditNum $gPlatformFspPkgTokenSpaceGuid_SafeModeOverride, "MRC Safe Mode Override", HEX,
Help "SafeModeOverride[0] Enable DdrSafeMode override, SafeModeOverride[1] Enable McSafeMode override, SafeModeOverride[2] Enable MrcSafeMode override, SafeModeOverride[3] Enable Training Algorithm (TrainingEnables) safe mode override, SafeModeOverride[4] Enable SaGv safe mode override"
"Valid range: 0x00 ~ 0x7"
EditNum $gPlatformFspPkgTokenSpaceGuid_MrcSafeMode, "MRC Safe Mode Support", HEX,
Help "MrcSafeMode[0]: Safe Frequency, MrcSafeMode[1]: Safe Gear, SafeMode[2]: Safe VCC IOG/CLK, SafeMode[3]: Safe VCC DDQ"
"Valid range: 0x00 ~ 0xF"
Combo $gPlatformFspPkgTokenSpaceGuid_RetrainToWorkingChannel, "Retrain On Working Channel", &EN_DIS,
Help "Enables/Disable Retrain On Working Channel feature"
EditNum $gPlatformFspPkgTokenSpaceGuid_DdrSafeMode, "DDR Phy Safe Mode Support", HEX,
Help "DdrSafeMode[0]: Basic PM Features, DdrSafeMode[1]: Spine Gating, DdrSafeMode[2]: Advanced DCC, DdrSafeMode[3]: R2R Training, DdrSafeMode[4]: Transformer Mode, DdrSafeMode[5]: PLL Operation, DdrSafeMode[6]: Safe ODT/SenseAmp Timing, DdrSafeMode[7]: Vtt Termination, DdrSafeMode[8]: Periodic Comp"
"Valid range: 0x00 ~ 0x1FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_McSafeMode, "Mc Safe Mode Support", HEX,
Help "McSafeMode[0]: Clk Gate / BGF, McSafeMode[1]: CKE Pdwn, McSafeMode[2]: Tristate, McSafeMode[3]: PHY Power States / Clock Spine, McSafeMode[4]: Same Rank TA, McSafeMode[5]: Different Rank TA, McSafeMode[6]: MR4_Period / ZQCAL_Period McSafeMode[7]: LP5 Wck Mode, SafeMode[8]: Self Refresh, McSafeMode[9]: WR/RD Retraining, McSafeMode[10]: Power Saving"
"Valid range: 0x00 ~ 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BoardStackUp, "Board Stack Up", HEX,
Help "0: Typical, 1: Frequency Limited"
"Valid range: 0x00 ~ 0x0"
Combo $gPlatformFspPkgTokenSpaceGuid_CleanMemory, "Ask MRC to clear memory content", &EN_DIS,
Help "Ask MRC to clear memory content <b>0: Do not Clear Memory;</b> 1: Clear Memory."
EditNum $gPlatformFspPkgTokenSpaceGuid_UsbTcPortEnPreMem, "TCSS USB Port Enable", HEX,
Help "Bitmap for per port enabling"
"Valid range: 0x0 ~ 0x000F"
Combo $gPlatformFspPkgTokenSpaceGuid_PwDownMode, "Power Down Mode", &gPlatformFspPkgTokenSpaceGuid_PwDownMode,
Help "This option controls command bus tristating during idle periods"
EditNum $gPlatformFspPkgTokenSpaceGuid_PostCodeOutputPort, "Post Code Output Port", HEX,
Help "This option configures Post Code Output Port"
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RMTLoopCount, "RMTLoopCount", HEX,
Help "Specifies the Loop Count to be used during Rank Margin Tool Testing. 0 - AUTO"
"Valid range: 0 ~ 0x20"
Combo $gPlatformFspPkgTokenSpaceGuid_CridEnable, "Enable/Disable SA CRID", &EN_DIS,
Help "Enable: SA CRID, Disable (Default): SA CRID"
EditNum $gPlatformFspPkgTokenSpaceGuid_PwDownIdleTimer, "Pwr Down Idle Timer", HEX,
Help "Default 0 = AUTO. Range is 30 to 2000(in us)"
"Valid range: 0x0 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_BclkRfiFreq, "BCLK RFI Frequency", HEX,
Help "Bclk RFI Frequency for each SAGV point in Hz units. 98000000Hz = 98MHz <b>0 - No RFI Tuning</b>. Range is 98Mhz-100Mhz."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieImrSize, "Size of PCIe IMR.", HEX,
Help "Size of PCIe IMR in megabytes"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieImrEnabled, "Enable PCIe IMR", &EN_DIS,
Help "0: Disable(AUTO), 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieImrRpLocation, "Enable PCIe IMR", &EN_DIS,
Help "1: PCH PCIE, 2: SA PCIE. If PCIeImrEnabled is TRUE then this will use to select the Root port location from PCH PCIe or SA PCIe"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieImrRpSelection, "Root port number for IMR.", HEX,
Help "Root port number for IMR.If PCieImrRpLocation is PCH PCIe then select root port from 0 to 23 and if it is SA PCIe then select root port from 0 to 3"
"Valid range: 0x00 ~ 0x17"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel, "SerialDebugMrcLevel", &gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel,
Help "MRC Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
Combo $gPlatformFspPkgTokenSpaceGuid_DdrOneDpc, "DdrOneDpc", &gPlatformFspPkgTokenSpaceGuid_DdrOneDpc,
Help "DDR 1DPC performance feature for 2R DIMMs. Can be enabled on DIMM0 or DIMM1 only, or on both (default)"
EditNum $gPlatformFspPkgTokenSpaceGuid_OverrideDriverType, "Override Driver Type", HEX,
Help "Override Driver Type. 0=Auto, 1=CMOS, 2=NMOS"
"Valid range: 0x0 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lp5BypassVddqLimits, "Lp5 Bypass Vddq Limits", HEX,
Help "Bypass Lp5 Vccddq Fuse limits. Advised to keep disabled"
"Valid range: 0x0 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_VddqVoltageOverride, "Vddq Voltage Override", HEX,
Help "# is multiple of 1mV where 0 means Auto."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccIogVoltageOverride, "VccIog Voltage Override", HEX,
Help "# is multiple of 1mV where 0 means Auto."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccClkVoltageOverride, "VccClk Voltage Override", HEX,
Help "# is multiple of 1mV where 0 means Auto."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ExtendedBankHashing, "Extended Bank Hashing", &EN_DIS,
Help "Eanble/Disable ExtendedBankHashing"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lfsr1Mask, "RH pTRR LFSR1 Mask", HEX,
Help "Row Hammer pTRR LFSR1 Mask, 1/2^(value)"
"Valid range: 0x01 ~ 0xF"
Combo $gPlatformFspPkgTokenSpaceGuid_RefreshWm, "Refresh Watermarks", &gPlatformFspPkgTokenSpaceGuid_RefreshWm,
Help "Refresh Watermarks: 0-Low, 1-High (default)"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lp5CccConfig, "Command Pins Mapping", HEX,
Help "BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller 1 Channel [3:0]. 0 = CCC pin mapping is Ascending, 1 = CCC pin mapping is Descending."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CmdMirror, "Command Pins Mirrored", HEX,
Help "BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller 1 Channel [3:0]. 0 = No Command Mirror and 1 = Command Mirror."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SiSkipOverrideBootModeWhenFwUpdate, "Skip override boot mode When Fw Update.", &EN_DIS,
Help "When set to TRUE and boot mode is BOOT_ON_FLASH_UPDATE, skip setting boot mode to BOOT_WITH_FULL_CONFIGURATION in PEI memory init."
EditNum $gPlatformFspPkgTokenSpaceGuid_OppSrefIdleTmr, "Opportunistic Self Refresh IdleTimer", HEX,
Help "Default 0 = AUTO. Range is 500 to 10000(in us)"
"Valid range: 0x0 ~ 0x2710"
Combo $gPlatformFspPkgTokenSpaceGuid_LowerBasicMemTestSize, "LowerBasicMemTestSize", &EN_DIS,
Help "Reduce BasicMemoryTest size WA: 0(Default)=Disable, 1=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_BoardTopology, "Board Topology", HEX,
Help "0: Daisy, 1: Tee"
"Valid range: 0x00 ~ 0x0"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprTestType, "PPR Test Type", HEX,
Help "Select memory tests used in Post Package Repair flow. This option is only valid if PPR=1, otherwise ignored. Bit 0: WCMATS8 test, Bit 1: Data Retention test, Bit 2: X March test, Bit 3: X March G test, Bit 4: Y March Short test, Bit 5: Y March Long test. Default=0x3, WCMATS8 and data retention"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedFspmUpd, "PreMemRsvd", &EN_DIS,
Help "Reserved for Pre-Mem"
Combo $gPlatformFspPkgTokenSpaceGuid_PprRepairType, "PPR Repair Type", &gPlatformFspPkgTokenSpaceGuid_PprRepairType,
Help "PPR Repair Type: 0:Do not Repair (Default), 1:Soft Repair, 2:Hard Repair"
Combo $gPlatformFspPkgTokenSpaceGuid_PprErrorInjection, "PPR Error Injection", &EN_DIS,
Help "When Eanble, PPR will inject bad rows during testing"
Combo $gPlatformFspPkgTokenSpaceGuid_PprForceRepair, "PPR ForceRepair", &EN_DIS,
Help "When Eanble, PPR will force repair some rows many times (90)"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairController, "PPR Repair Controller", HEX,
Help "PPR repair controller: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0x01"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairChannel, "PPR Repair Channel", HEX,
Help "PPR repair Channel: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0x01"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairDimm, "PPR Repair Dimm", HEX,
Help "PPR repair Dimm: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0x01"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairRank, "PPR Repair Rank", HEX,
Help "PPR repair Rank: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0x01"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairRow, "PPR Repair Row", HEX,
Help "PPR repair Row: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairPhysicalAddrLow, "PPR Repair Physical Address Low", HEX,
Help "PPR repair Physical Address Low: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairPhysicalAddrHigh, "PPR Repair Physical Address High", HEX,
Help "PPR repair Physical Address High: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairBankGroup, "PPR Repair BankGroup", HEX,
Help "PPR repair BankGroup: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PprRepairBank, "PPR Repair Bank", HEX,
Help "PPR repair Bank: User chooses to force repair specifc address "
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTCASPLIT, "DIMM CA ODT Split Training", &EN_DIS,
Help "Enable/Disable DIMM CA ODT Split Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDDSSPLIT, "CMD Drive Strength Split", &EN_DIS,
Help "Enable/Disable CMD Drive Strength Split"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDSRSPLIT, "CMD Slew Rate Split Training", &EN_DIS,
Help "Enable/Disable CMD Slew Rate Split Training"
EditNum $gPlatformFspPkgTokenSpaceGuid_TotalFlashSize, "TotalFlashSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TotalFlashSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosSize, "BiosSize", HEX,
Help "The size of the BIOS region of the IFWI. Used if FspmUpd->FspmConfig.BiosGuard != 0. If BiosGuard is enabled, MRC will increase the size of the DPR (DMA Protected Range) so that a BIOS Update Script can be stored in the DPR."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SecurityTestRsvd, "SecurityTestRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Test"
EndPage
Page "PCH(PreMem)"
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusEnable, "Enable SMBus", &EN_DIS,
Help "Enable/disable SMBus controller."
EditNum $gPlatformFspPkgTokenSpaceGuid_SpdAddressTable, "Spd Address Tabl", HEX,
Help "Specify SPD Address table for CH0D0/CH0D1/CH1D0&CH1D1. MemorySpdPtr will be used if SPD Address is 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PlatformDebugOption, "Platform Debug Consent", &gPlatformFspPkgTokenSpaceGuid_PlatformDebugOption,
Help "Enabled Trace active: TraceHub is enabled and trace is active, blocks s0ix.\n\nEnabled Trace ready: TraceHub is enabled and allowed S0ix.\n\nEnabled Trace power off: TraceHub is powergated, provide setting close to functional low power state\n\nManual: user needs to configure Advanced Debug Settings manually, aimed at advanced users"
Combo $gPlatformFspPkgTokenSpaceGuid_DciEn, "DCI Enable", &EN_DIS,
Help "Determine if to enable DCI debug from host"
Combo $gPlatformFspPkgTokenSpaceGuid_DciClkEnable, "DCI Clock Enable", &EN_DIS,
Help "Enable/Disable DCI clock in lowest power state"
Combo $gPlatformFspPkgTokenSpaceGuid_DciDbcMode, "DCI DbC Mode", &gPlatformFspPkgTokenSpaceGuid_DciDbcMode,
Help "Disabled: Clear both USB2/3DBCEN; USB2: set USB2DBCEN; USB3: set USB3DBCEN; Both: Set both USB2/3DBCEN; No Change: Comply with HW value"
Combo $gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg, "USB3 Type-C UFP2DFP Kernel/Platform Debug Support", &gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg,
Help "This BIOS option enables kernel and platform debug for USB3 interface over a UFP Type-C receptacle, select 'No Change' will do nothing to UFP2DFP setting."
Combo $gPlatformFspPkgTokenSpaceGuid_SocTraceHubMode, "SOC Trace Hub Mode", &EN_DIS,
Help "Enable/Disable SOC TraceHub"
Combo $gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg0Size, "SOC Trace Hub Memory Region 0 buffer Size", &gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg0Size,
Help "Select size of memory region 0 buffer. Memory allocated by BIOS only applies to ITH tool running on the host. For ITH tool running on the target, choose None/OS, memory shall be allocated by tool. User should be cautious to choose the amount of memory. If chosen size is larger than half of system memory, setup will automatically rollback to default value."
Combo $gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg1Size, "SOC Trace Hub Memory Region 1 buffer Size", &gPlatformFspPkgTokenSpaceGuid_SocTraceHubMemReg1Size,
Help "Select size of memory region 1 buffer. Memory allocated by BIOS only applies to ITH tool running on the host. For ITH tool running on the target, choose None/OS, memory shall be allocated by tool. User should be cautious to choose the amount of memory. If chosen size is larger than half of system memory, setup will automatically rollback to default value."
Combo $gPlatformFspPkgTokenSpaceGuid_KeepEarlyTrace, "Keep Early Trace", &EN_DIS,
Help "Trace is activated by default. When enable, keep early trace data and keep tracing, may block s0ix.\nWhen disabled will abandon trace data and stop tracing which allows enter s0ix\n\nnoted:enable this option will not enable TraceHub; When probe is connected, keep early trace will then be configured by tool, this option will not take effect."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode, "PCH Trace Hub Mode", &EN_DIS,
Help "Enable/Disable PCH TraceHub"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size, "PCH Trace Hub Memory Region 0 buffer Size", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size,
Help "Select size of memory region 0 buffer. Memory allocated by BIOS only applies to ITH tool running on the host. For ITH tool running on the target, choose None/OS, memory shall be allocated by tool. User should be cautious to choose the amount of memory. If chosen size is larger than half of system memory, setup will automatically rollback to default value."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size, "PCH Trace Hub Memory Region 1 buffer Size", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size,
Help "Select size of memory region 1 buffer. Memory allocated by BIOS only applies to ITH tool running on the host. For ITH tool running on the target, choose None/OS, memory shall be allocated by tool. User should be cautious to choose the amount of memory. If chosen size is larger than half of system memory, setup will automatically rollback to default value."
Combo $gPlatformFspPkgTokenSpaceGuid_IoeDebugEn, "IOE Debug Enable", &EN_DIS,
Help "Enable/Disable IOE Debug. When enabled, IOE D2D Dfx link will keep up and clock is enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_PmodeClkEn, "Pmode Clock Enable", &EN_DIS,
Help "Enable/Disable PMODE clock. When enabled, Pmode clock will toggle for XDP use"
Combo $gPlatformFspPkgTokenSpaceGuid_AetTraceHubMode, "AET Trace Hub Mode Select", &gPlatformFspPkgTokenSpaceGuid_AetTraceHubMode,
Help "Select AET to Trace Hub destination."
Combo $gPlatformFspPkgTokenSpaceGuid_BiosTraceSinkMode, "BIOS trace destination", &gPlatformFspPkgTokenSpaceGuid_BiosTraceSinkMode,
Help "Select BIOS trace destination."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect, "HD Audio DMIC Link Clock Select", &gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect,
Help "Determines DMIC<N> Clock Source. 0: Both, 1: ClkA, 2: ClkB"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaEnable, "Enable Intel HD Audio (Azalia)", &EN_DIS,
Help "0: Disable, 1: Enable (Default) Azalia controller"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshEnable, "Enable PCH ISH Controller", &EN_DIS,
Help "0: Disable, 1: Enable (Default) ISH Controller"
EditNum $gPlatformFspPkgTokenSpaceGuid_DFETap1StepSize, "Dimm DFE Tap1 Step Size Setting", HEX,
Help "Dimm DFE Tap1 setting: Memory-dependent, positive value will be converted to minus values by *-1 automatically"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DFETap2StepSize, "Dimm DFE Tap2 Step Size Setting", HEX,
Help "Dimm DFE Tap2 setting: Memory-dependent, positive value will be converted to minus values by *-1 automatically"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtleEnable, "Enable PCH HSIO PCIE Rx Set Ctle", HEX,
Help "Enable PCH PCIe Gen 3 Set CTLE Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtle, "PCH HSIO PCIE Rx Set Ctle Value", HEX,
Help "PCH PCIe Gen 3 Set CTLE Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmpEnable, "Enble PCH HSIO PCIE TX Gen 1 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmp, "PCH HSIO PCIE Gen 2 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmpEnable, "Enable PCH HSIO PCIE TX Gen 2 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmp, "PCH HSIO PCIE Gen 2 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmpEnable, "Enable PCH HSIO PCIE TX Gen 3 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmp, "PCH HSIO PCIE Gen 3 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 3 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmphEnable, "Enable PCH HSIO PCIE Gen 1 TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmph, "PCH HSIO PCIE Gen 1 TX Output De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 1 TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5Enable, "Enable PCH HSIO PCIE Gen 2 TX Output -3.5dB De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5, "PCH HSIO PCIE Gen 2 TX Output -3.5dB De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output -3.5dB De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0Enable, "Enable PCH HSIO PCIE Gen 2 TX Output -6.0dB De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0, "PCH HSIO PCIE Gen 2 TX Output -6.0dB De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output -6.0dB De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMag, "PCH HSIO SATA 1.5 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 1.5 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMag, "PCH HSIO SATA 3.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 3.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMag, "PCH HSIO SATA 6.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 6.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmpEnable, "Enable PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmp, "PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmpEnable, "Enable PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmp, "PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmpEnable, "Enable PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmp, "PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmphEnable, "Enable PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmph, "PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmphEnable, "Enable PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmph, "PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmphEnable, "Enable PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmph, "PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLpcEnhancePort8xhDecoding, "PCH LPC Enhance the port 8xh decoding", &EN_DIS,
Help "Original LPC only decodes one byte of port 80h."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPort80Route, "PCH Port80 Route", &EN_DIS,
Help "Control where the Port 80h cycles are sent, 0: LPC; 1: PCI."
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusArpEnable, "Enable SMBus ARP support", &EN_DIS,
Help "Enable SMBus ARP support."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchNumRsvdSmbusAddresses, "Number of RsvdSmbusAddressTable.", HEX,
Help "The number of elements in the RsvdSmbusAddressTable."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSmbusIoBase, "SMBUS Base Address", HEX,
Help "SMBUS Base Address (IO space)."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchSmbAlertEnable, "Enable SMBus Alert Pin", &EN_DIS,
Help "Enable SMBus Alert Pin."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkSrcUsage, "Usage type for SOC/IOE ClkSrc", HEX,
Help "0-23: PCIe rootport, 0x70:LAN, 0x80: unspecified but in use (free running), 0xFF: not used"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieClkSrcUsage, "Usage type for PCH ClkSrc", HEX,
Help "0-23: PCIe rootport, 0x70:LAN, 0x80: unspecified but in use (free running), 0xFF: not used"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkSrcClkReq, "SOC/IOE ClkReq-to-ClkSrc mapping", HEX,
Help "Number of ClkReq signal assigned to ClkSrc"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieClkSrcClkReq, "PCH ClkReq-to-ClkSrc mapping", HEX,
Help "Number of ClkReq signal assigned to ClkSrc"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkReqGpioMux, "Clk Req GPIO Pin", HEX,
Help "Select Clk Req Pin. Refer to GPIO_*_MUXING_SRC_CLKREQ_x* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RsvdSmbusAddressTablePtr, "Point of RsvdSmbusAddressTable", HEX,
Help "Array of addresses reserved for non-ARP-capable SMBus devices."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieRpEnableMask, "Enable PCH PCIE RP Mask", HEX,
Help "Enable/disable PCH PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpEnableMask, "Enable SOC/IOE PCIE RP Mask", HEX,
Help "Enable/disable SOC/IOE PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0xFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaVcType, "VC Type", &gPlatformFspPkgTokenSpaceGuid_PchHdaVcType,
Help "Virtual Channel Type Select: 0: VC0, 1: VC1."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaDspUaaCompliance, "Universal Audio Architecture compliance for DSP enabled system", &EN_DIS,
Help "0: Not-UAA Compliant (Intel SST driver supported only), 1: UAA Compliant (HDA Inbox driver or SST driver supported)."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkHdaEnable, "Enable HD Audio Link", &EN_DIS,
Help "Enable/disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaSdiEnable, "Enable HDA SDI lanes", HEX,
Help "Enable/disable HDA SDI lanes."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating, "HDA Power/Clock Gating (PGD/CGD)", &gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating,
Help "Enable/Disable HD Audio Power and Clock Gating(POR: Enable). 0: PLATFORM_POR, 1: FORCE_ENABLE, 2: FORCE_DISABLE."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicEnable, "Enable HD Audio DMIC_N Link", HEX,
Help "Enable/disable HD Audio DMIC1 link. Muxed with SNDW3."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkAPinMux, "DMIC<N> ClkA Pin Muxing (N - DMIC number)", HEX,
Help "Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKA_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkBPinMux, "DMIC<N> ClkB Pin Muxing", HEX,
Help "Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKB_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaDspEnable, "Enable HD Audio DSP", &EN_DIS,
Help "Enable/disable HD Audio DSP feature."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicDataPinMux, "DMIC<N> Data Pin Muxing", HEX,
Help "Determines DMIC<N> Data Pin muxing. See GPIO_*_MUXING_DMIC<N>_DATA_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSspEnable, "Enable HD Audio SSP0 Link", HEX,
Help "Enable/disable HD Audio SSP_N/I2S link. Muxed with HDA. N-number 0-5"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSndwEnable, "Enable HD Audio SoundWire#N Link", HEX,
Help "Enable/disable HD Audio SNDW#N link. Muxed with HDA."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency, "iDisp-Link Frequency", &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency,
Help "iDisp-Link Freq (PCH_HDAUDIO_LINK_FREQUENCY enum): 4: 96MHz, 3: 48MHz."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdAudioSndwMultilaneEnable, "Sndw0 Multiline enablement", &EN_DIS,
Help "SoundWire Link 0 Multiline enablement. Default is DISABLE. 0: DISABLE, 1: Two lines enabled, 2: Three lines enabled, 3: Four Lines enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode, "iDisp-Link T-mode", &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode,
Help "iDisp-Link T-Mode (PCH_HDAUDIO_IDISP_TMODE enum): 0: 2T, 2: 4T, 3: 8T, 4: 16T"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispCodecDisconnect, "iDisplay Audio Codec disconnection", &EN_DIS,
Help "0: Not disconnected, enumerable, 1: Disconnected SDI, not enumerable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaSubSystemIds, "Audio Sub System IDs", HEX,
Help "Set default Audio Sub System IDs. If its set to 0 then value from Strap is used."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviDdrRfim, "CNVi DDR RFI Mitigation", &EN_DIS,
Help "Enable/Disable DDR RFI Mitigation. Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_ExtendedBiosDecodeRange, "Extended BIOS Support", &EN_DIS,
Help "Enable/Disable Extended BIOS Region Support. Default is DISABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable, "Extented BIOS Direct Read Decode enable", &EN_DIS,
Help "Enable/Disable access to bigger than 16MB BIOS Region through Direct Memory Reads. 0: disabled (default), 1: enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase, "Extended BIOS Direct Read Decode Range base", HEX,
Help "Bits of 31:16 of a memory address that'll be a base for Extended BIOS Direct Read Decode."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit, "Extended BIOS Direct Read Decode Range limit", HEX,
Help "Bits of 31:16 of a memory address that'll be a limit for Extended BIOS Direct Read Decode."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags, "Debug Interfaces", HEX,
Help "Debug Interfaces. BIT0-RAM, BIT1-UART, BIT3-USB3, BIT4-Serial IO, BIT5-TraceHub, BIT2 - Not used."
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber, "Serial Io Uart Debug Controller Number", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber,
Help "Select SerialIo Uart Controller for debug."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugAutoFlow, "Serial Io Uart Debug Auto Flow", &EN_DIS,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugBaudRate, "Serial Io Uart Debug BaudRate", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000. Recommended values 9600, 19200, 57600, 115200, 460800, 921600, 1500000, 1843200, 3000000, 3686400, 6000000"
"Valid range: 0 ~ 6000000"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity, "Serial Io Uart Debug Parity", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity,
Help "Set default Parity."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits, "Serial Io Uart Debug Stop Bits", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits,
Help "Set default stop bits."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugDataBits, "Serial Io Uart Debug Data Bits", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating, "SerialIo Uart PowerGating", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating,
Help "Select SerialIo Uart Powergating mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMmioBase, "Serial Io Uart Debug Mmio Base", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIoUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase, "ISA Serial Base selection", &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase,
Help "Select ISA Serial Base address. Default is 0x3F8."
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusDynamicPowerGating, "Smbus dynamic power gating", &EN_DIS,
Help "Disable or Enable Smbus dynamic power gating."
Combo $gPlatformFspPkgTokenSpaceGuid_WdtDisableAndLock, "Disable and Lock Watch Dog Register", &EN_DIS,
Help "Set 1 to clear WDT status, then disable and lock WDT registers."
Combo $gPlatformFspPkgTokenSpaceGuid_SocBclkPllOn, "SoC BCLK PLL configuration", &EN_DIS,
Help "Configure SoC BCLK PLL state"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuBclkPllOn, "CPU BCLK PLL configuration", &EN_DIS,
Help "Configure CPU BCLK PLL state"
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusSpdWriteDisable, "SMBUS SPD Write Disable", &EN_DIS,
Help "Set/Clear Smbus SPD Write Disable. 0: leave SPD Write Disable bit; 1: set SPD Write Disable bit. For security recommendations, SPD write disable bit must be set."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiTranCoOverEn, "Dmi Tran Co Over En", HEX,
Help "Enable/Disable Lane Transmitter Coefficient."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiTranCoOverPostCur, "Dmi Tran Co Over Post Cur", HEX,
Help "Lane Transmitter Post-Cursor Coefficient Override."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiTranCoOverPreCur, "Dmi Tran Co Over Pre Cur", HEX,
Help "Lane Transmitter Pre-Cursor Coefficient Override."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiUpPortTranPreset, "Dmi Up Port Tran Preset", HEX,
Help "Upstream Port Lane Transmitter Preset."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiUpPortTranPresetEn, "Dmi UpPort Tran Preset En", HEX,
Help "0: POR setting, 1: force enable, 2: force disable."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiRtlepceb, "Dmi Rtlepceb", HEX,
Help "DMI Remote Transmit Link Equalization Preset/Coefficient Evaluation Bypass (RTLEPCEB)."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_HeciTimeouts, "HECI Timeouts", &EN_DIS,
Help "0: Disable, 1: Enable (Default) timeout check for HECI"
Combo $gPlatformFspPkgTokenSpaceGuid_DidInitStat, "Force ME DID Init Status", &EN_DIS,
Help "Test, 0: disable, 1: Success, 2: No Memory in Channels, 3: Memory Init Error, Set ME DID init stat value"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableCpuReplacedPolling, "CPU Replaced Polling Disable", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option disables CPU replacement polling loop"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMessageCheck, "Check HECI message before send", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable/Disable message check."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipMbpHob, "Skip MBP HOB", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable/Disable sending MBP message and creating MBP Hob."
Combo $gPlatformFspPkgTokenSpaceGuid_HeciCommunication2, "HECI2 Interface Communication", &EN_DIS,
Help "Test, 0: disable, 1: enable, Adds or Removes HECI2 Device from PCI space."
Combo $gPlatformFspPkgTokenSpaceGuid_KtDeviceEnable, "Enable KT device", &EN_DIS,
Help "Test, 0: POR, 1: enable, 2: disable, Enable or Disable KT device."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipCpuReplacementCheck, "Skip CPU replacement check", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option to skip CPU replacement check"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx2VoltageScaleFactor, "Avx2 Voltage Guardband Scaling Factor", HEX,
Help "AVX2 Voltage Guardband Scale factor applied to AVX2 workloads. Range is 0-200 in 1/100 units, where a value of 125 would apply a 1.25 scale factor."
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx512VoltageScaleFactor, "Avx512 Voltage Guardband Scaling Factor", HEX,
Help "DEPRECATED. AVX512 Voltage Guardband Scale factor applied to AVX512 workloads. Range is 0-200 in 1/100 units, where a value of 125 would apply a 1.25 scale factor."
"Valid range: 0x00 ~ 0xC8"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode, "Serial Io Uart Debug Mode", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRxPinMux, "SerialIoUartDebugRxPinMux - FSPM", HEX,
Help "Select RX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugTxPinMux, "SerialIoUartDebugTxPinMux - FSPM", HEX,
Help "Select TX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRtsPinMux, "SerialIoUartDebugRtsPinMux - FSPM", HEX,
Help "Select SerialIo Uart used for debug Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugCtsPinMux, "SerialIoUartDebugCtsPinMux - FSPM", HEX,
Help "Select SerialIo Uart used for debug Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugPciCfgBase, "Serial Io Uart Debug Pci Base", HEX,
Help "Specify PciCfgBase address. Allows for SerialIO UART functionality outside Bus 0"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MemSSVoltageMode, "Memory Subsystem voltage mode", &EN_DIS,
Help "Memory Subsystem voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSAdaptiveVoltage, "Memory Subsystem Adaptive Voltage", HEX,
Help "Adaptive voltage applied to the memory when the cpu is operating in adaptive mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSVoltageOverride, "Memory Subsystem voltage override", HEX,
Help "The Memory Subsystem voltage override which is applied to the entire range of memory frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffsetMode, "Memory Subsystem VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_MemSSVfPointOffsetMode,
Help "Selects Memory Subsystem Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSMaxOcRatio, "Maximum Memory Subsystem turbo ratio override", HEX,
Help "Maximum Memory Subsystem turbo ratio override allows to increase memory frequency beyond the fused max turbo ratio limit. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x55"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemSSVoltageOffset, "Memory Subsystem Turbo voltage Offset", HEX,
Help "The voltage offset applied to the memory while operating in turbo mode. Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuDlvrMode, "Select Core(s) and RING DLVR Mode", &gPlatformFspPkgTokenSpaceGuid_CpuDlvrMode,
Help "Select Core(s) and RING DLVR Mode). <b>0: Regulation Mode</b>; 1: Power Gate Mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguMaxOcRatio, "Maximum clr turbo ratio override", HEX,
Help "Maximum clr turbo ratio override allows to increase CPU clr frequency beyond the fused max turbo ratio limit. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x55"
Combo $gPlatformFspPkgTokenSpaceGuid_NguVoltageMode, "NGU voltage mode", &EN_DIS,
Help "NGU voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_NguRatio, "NGU Ratio", HEX,
Help "Sets the Ratio for NGU when SAGV is enabled, using SAVG B2P Mailbox cmd 0x22 and subcommand 0x1. When this value is zero, dynamic mode is selected and NGU ratio can be modified using OCMB cmd 0x11. When valid ratio value is set, static mode is selected with the fixed ratio specified by this value.. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x55"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguVoltageOverride, "NGU voltage override", HEX,
Help "The NGU voltage override which is applied to the entire range of cpu NGU frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguAdaptiveVoltage, "adaptive voltage applied during turbo frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguVoltageOffset, "NGU Turbo voltage Offset", HEX,
Help "The voltage offset applied to the NGU while operating in turbo mode. Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
Combo $gPlatformFspPkgTokenSpaceGuid_NguVfPointOffsetMode, "NGU VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_NguVfPointOffsetMode,
Help "Selects NGU Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_NguVfPointOffset, "NGU VF Point Offset", HEX,
Help "Array used to specifies the NGU Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguVfPointOffsetPrefix, "NGU VF Point Offset Prefix", HEX,
Help "Sets the NguVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguVfPointRatio, "NGU VF Point Ratio", HEX,
Help "Array for the each selected NGU VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NguVfPointCount, "NGU VF Point Count", HEX,
Help "Number of supported NGU Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_GtVfPointOffsetMode, "GT VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_GtVfPointOffsetMode,
Help "Selects GT Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVfPointOffset, "GT VF Point Offset", HEX,
Help "Array used to specifies the GT Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVfPointOffsetPrefix, "GT VF Point Offset Prefix", HEX,
Help "Sets the GtVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVfPointRatio, "GT VF Point Ratio", HEX,
Help "Array for the each selected GT VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVfPointCount, "GT VF Point Count", HEX,
Help "Number of supported GT Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MrcTimeMeasure, "Time Measure", &EN_DIS,
Help "Time Measure: 0(Default)=Disable, 1=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_TmeExcludeBase, "TME Exclude Base Address", HEX,
Help "TME Exclude Base Address."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TmeExcludeSize, "TME Exclude Size Value", HEX,
Help "TME Exclude Size Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_GenerateNewTmeKey, "Generate New TME Key", &EN_DIS,
Help "Enable: Generate New TME Key, Disable(Default): TME key determine by type of reset"
EditNum $gPlatformFspPkgTokenSpaceGuid_CkdAddressTable, "CkdAddress Tabl", HEX,
Help "Specify CKD Address table for CH0D0/CH0D1/CH1D0&CH1D1"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EndPage
Page "System Agent(PostMem)"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPtr, "Logo Pointer", HEX,
Help "Points to PEI Display Logo Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoSize, "Logo Size", HEX,
Help "Size of PEI Display Logo Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BltBufferAddress, "Blt Buffer Address", HEX,
Help "Address of Blt buffer"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BltBufferSize, "Blt Buffer Size", HEX,
Help "Size of Blt Buffer, is equal to PixelWidth * PixelHeight * 4 bytes (the size of EFI_GRAPHICS_OUTPUT_BLT_PIXEL)"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GraphicsConfigPtr, "Graphics Configuration Ptr", HEX,
Help "Points to VBT"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Device4Enable, "Enable Device 4", &EN_DIS,
Help "Enable/disable Device 4"
EditNum $gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionBase, "MicrocodeRegionBase", HEX,
Help "Memory Base of Microcode Updates"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionSize, "MicrocodeRegionSize", HEX,
Help "Size of Microcode Updates"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboMode, "Turbo Mode", &EN_DIS,
Help "Enable/Disable processor Turbo Mode. 0:disable, <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PavpEnable, "Enable/Disable PavpEnable", &EN_DIS,
Help "Enable(Default): Enable PavpEnable, Disable: Disable PavpEnable"
Combo $gPlatformFspPkgTokenSpaceGuid_PeiGraphicsPeimInit, "Enable/Disable PeiGraphicsPeimInit", &EN_DIS,
Help "<b>Enable(Default):</b> FSP will initialize the framebuffer and provide it via EFI_PEI_GRAPHICS_INFO_HOB. Disable: FSP will NOT initialize the framebuffer."
Combo $gPlatformFspPkgTokenSpaceGuid_D3HotEnable, "Enable D3 Hot in TCSS ", &EN_DIS,
Help "This policy will enable/disable D3 hot support in IOM"
Combo $gPlatformFspPkgTokenSpaceGuid_GnaEnable, "Enable or disable GNA device", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_IomTypeCPortPadCfg, "TypeC port GPIO setting", HEX,
Help "GPIO Ping number for Type C Aux Oritation setting, use the GpioPad that is defined in GpioPinsXXXH.h and GpioPinsXXXLp.h as argument.(XXX is platform name, Ex: Mtl = MeteorLake)"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuUsb3OverCurrentPin, "CPU USB3 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USBC Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_D3ColdEnable, "Enable D3 Cold in TCSS ", &EN_DIS,
Help "This policy will enable/disable D3 cold support in IOM"
Combo $gPlatformFspPkgTokenSpaceGuid_ITbtPcieTunnelingForUsb4, "Enable/Disable PCIe tunneling for USB4", &EN_DIS,
Help "Enable/Disable PCIe tunneling for USB4, default is enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipFspGop, "Enable/Disable SkipFspGop", &EN_DIS,
Help "Enable: Skip FSP provided GOP driver, Disable(Default): Use FSP provided GOP driver"
Combo $gPlatformFspPkgTokenSpaceGuid_VpuEnable, "Enable/Disable VPU Device", &EN_DIS,
Help "Enable(Default): Enable VPU Device, Disable: Disable VPU Device"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcCstateLimit, "TC State in TCSS ", HEX,
Help "This TC C-State Limit in IOM"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TcNotifyIgd, "Display port support policy in TCSS ", &EN_DIS,
Help "This policy will enable/disable Display port support in IOM"
EditNum $gPlatformFspPkgTokenSpaceGuid_VbtSize, "Intel Graphics VBT (Video BIOS Table) Size", HEX,
Help "Size of Internal Graphics VBT Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_LidStatus, "Platform LID Status for LFP Displays.", &gPlatformFspPkgTokenSpaceGuid_LidStatus,
Help "LFP Display Lid Status (LID_STATUS enum): 0 (Default): LidClosed, 1: LidOpen."
Combo $gPlatformFspPkgTokenSpaceGuid_SaPostMemRsvd, "PchPostMemRsvd", &EN_DIS,
Help "Reserved for PCH Post-Mem"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdEnable, "Enable VMD controller", &EN_DIS,
Help "Enable/disable to VMD controller.0: Disable; 1: Enable(Default)"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdGlobalMapping, "Enable VMD Global Mapping", &EN_DIS,
Help "Enable/disable to VMD controller.0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdPort, "Map port under VMD", &EN_DIS,
Help "Map/UnMap port under VMD"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortBus, "VMD Port Bus", DEC,
Help "VMD Root port bus number."
"Valid range: 0 ~ 255"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortDev, "VMD Port Device", DEC,
Help "VMD Root port device number."
"Valid range: 0 ~ 31"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortFunc, "VMD Port Func", DEC,
Help "VMD Root port function number."
"Valid range: 0 ~ 7"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdVariablePtr, "VMD Variable", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBase, "Temporary CfgBar address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Base, "Temporary MemBar1 address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Base, "Temporary MemBar2 address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BgpdtHash, "BgpdtHash[4]", HEX,
Help "BgpdtHash values"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosGuardAttr, "BiosGuardAttr", HEX,
Help "BiosGuardAttr default values"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosGuardModulePtr, "BiosGuardModulePtr", HEX,
Help "BiosGuardModulePtr default values"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SendEcCmd, "SendEcCmd", HEX,
Help "SendEcCmd function pointer. \n @code typedef EFI_STATUS (EFIAPI *PLATFORM_SEND_EC_COMMAND) (IN EC_COMMAND_TYPE EcCmdType, IN UINT8 EcCmd, IN UINT8 SendData, IN OUT UINT8 *ReceiveData); @endcode"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcCmdProvisionEav, "EcCmdProvisionEav", HEX,
Help "Ephemeral Authorization Value default values. Provisions an ephemeral shared secret to the EC"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcCmdLock, "EcCmdLock", HEX,
Help "EcCmdLock default values. Locks Ephemeral Authorization Value sent previously"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcProvisionEav, "EcProvisionEav", HEX,
Help "EcProvisionEav function pointer. \n @code typedef EFI_STATUS (EFIAPI *EC_PROVISION_EAV) (IN UINT32 Eav, OUT UINT8 *ReturnValue); @endcode"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcBiosGuardCmdLock, "EcBiosGuardCmdLock", HEX,
Help "EcBiosGuardCmdLock function pointer. \n @code typedef EFI_STATUS (EFIAPI *EC_CMD_LOCK) (OUT UINT8 *ReturnValue); @endcode"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SiSkipSsidProgramming, "Skip Ssid Programming.", &EN_DIS,
Help "When set to TRUE, silicon code will not do any SSID programming and platform code needs to handle that by itself properly."
EditNum $gPlatformFspPkgTokenSpaceGuid_SiCustomizedSvid, "Change Default SVID", HEX,
Help "Change the default SVID used in FSP to programming internal devices. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiCustomizedSsid, "Change Default SSID", HEX,
Help "Change the default SSID used in FSP to programming internal devices. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiSsidTablePtr, "SVID SDID table Poniter.", HEX,
Help "The address of the table of SVID SDID to customize each SVID SDID entry. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiNumberOfSsidTableEntry, "Number of ssid table.", HEX,
Help "SiNumberOfSsidTableEntry should match the table entries created in SiSsidTablePtr. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortResetMessageEnable, "USB2 Port Reset Message Enable", HEX,
Help "0: Disable USB2 Port Reset Message; 1: Enable USB2 Port Reset Message; This must be enable for USB2 Port those are paired with CPU XHCI Port"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt, "SATA RST Interrupt Mode", &gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt,
Help "Allowes to choose which interrupts will be implemented by SATA controller in RAID mode."
Combo $gPlatformFspPkgTokenSpaceGuid_PsOnEnable, "Enable PS_ON.", &EN_DIS,
Help "PS_ON is a new C10 state from the CPU on desktop SKUs that enables a lower power target that will be required by the California Energy Commission (CEC). When FALSE, PS_ON is to be disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcCpuC10GatePinEnable, "Pmc Cpu C10 Gate Pin Enable", &EN_DIS,
Help "Enable/Disable platform support for CPU_C10_GATE# pin to control gating of CPU VccIO and VccSTG rails instead of SLP_S0# pin."
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl, "Pch Dmi Aspm Ctrl", &gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl,
Help "ASPM configuration on the PCH side of the DMI/OPI Link. Default is <b>PchPcieAspmAutoConfig</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiCwbEnable, "PchDmiCwbEnable", &EN_DIS,
Help "Central Write Buffer feature configurable and enabled by default"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcOsIdleEnable, "OS IDLE Mode Enable", &EN_DIS,
Help "Enable/Disable OS Idle Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PchS0ixAutoDemotion, "S0ix Auto-Demotion", &EN_DIS,
Help "Enable/Disable the Low Power Mode Auto-Demotion Host Control feature."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmLatchEventsC10Exit, "Latch Events C10 Exit", &EN_DIS,
Help "When this bit is set to 1, SLP_S0# entry events in SLP_S0_DEBUG_REGx registers are captured on C10 exit (instead of C10 entry which is default)"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrEn, "PMC ADR enable", &EN_DIS,
Help "Enable/disable asynchronous DRAM refresh"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrTimerEn, "PMC ADR timer configuration enable", &EN_DIS,
Help "Enable/disable ADR timer configuration"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrTimer1Val, "PMC ADR phase 1 timer value", HEX,
Help "Enable/disable ADR timer configuration"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrMultiplier1Val, "PMC ADR phase 1 timer multiplier value", HEX,
Help "Specify the multiplier value for phase 1 ADR timer"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrHostPartitionReset, "PMC ADR host reset partition enable", &EN_DIS,
Help "Specify whether PMC should set ADR_RST_STS bit after receiving Reset_Warn_Ack DMI message"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcOverride, "PMC ADR source select override enable", &EN_DIS,
Help "Tells the FSP to update the source select with platform value"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcSel, "PMC ADR source selection", HEX,
Help "Specify which sources should cause ADR flow"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcWdtTimerEn, "PMC WDT enable", &EN_DIS,
Help "Enable/disable PMC WDT configuration"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieClockGating, "PCIe RootPort Clock Gating", &EN_DIS,
Help "Describes whether the PCI Express Clock Gating for each root port is enabled by platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_PciePowerGating, "PCIe RootPort Power Gating", &EN_DIS,
Help "Describes whether the PCI Express Power Gating for each root port is enabled by platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieFomsCp, "FOMS Control Policy", &gPlatformFspPkgTokenSpaceGuid_PcieFomsCp,
Help "Choose the Foms Control Policy, <b>Default = 0 </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_LinkDownGpios, "PCIe GPIO Assertion in Link Down", &EN_DIS,
Help "Describes whether the PCIe GPIO Assertion in Link Down programming is enabled for each root portby platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipPamLock, "Skip PAM regsiter lock", &EN_DIS,
Help "Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC"
Combo $gPlatformFspPkgTokenSpaceGuid_RenderStandby, "Enable/Disable IGFX RenderStandby", &EN_DIS,
Help "Enable(Default): Enable IGFX RenderStandby, Disable: Disable IGFX RenderStandby"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigureGT, "Enable/Disable GT Configuration", &EN_DIS,
Help "Enable(Default): Configure GT for use, Disable: Skip GT Configuration"
Combo $gPlatformFspPkgTokenSpaceGuid_GtFreqMax, "GT Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_GtFreqMax,
Help "0xFF: Auto(Default), 2: 100 Mhz, 3: 150 Mhz, 4: 200 Mhz, 5: 250 Mhz, 6: 300 Mhz, 7: 350 Mhz, 8: 400 Mhz, 9: 450 Mhz, 0xA: 500 Mhz, 0xB: 550 Mhz, 0xC: 600 Mhz, 0xD: 650 Mhz, 0xE: 700 Mhz, 0xF: 750 Mhz, 0x10: 800 Mhz, 0x11: 850 Mhz, 0x12:900 Mhz, 0x13: 950 Mhz, 0x14: 1000 Mhz, 0x15: 1050 Mhz, 0x16: 1100 Mhz, 0x17: 1150 Mhz, 0x18: 1200 Mhz"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableTurboGt, "Disable Turbo GT", &EN_DIS,
Help " 0=Disable: GT frequency is not limited, 1=Enable: Disables Turbo GT frequency"
Combo $gPlatformFspPkgTokenSpaceGuid_RC1pGtFreqEnable, "Enable RC1p GT frequency request to PMA (provided all other conditions are met)", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_RC1pMediaFreqEnable, "Enable RC1p Media frequency request to PMA (provided all other conditions are met)", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnMultiVcEnable, "Enable TSN Multi-VC", &EN_DIS,
Help "Enable/disable Multi Virtual Channels(VC) in TSN."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcLimitC3AndDeeperWA, "PMC Limit Powergating", &EN_DIS,
Help "Enable/disable Limit PSF powergating to C3 and deeper states"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPixelHeight, "LogoPixelHeight Address", HEX,
Help "Address of LogoPixelHeight"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPixelWidth, "LogoPixelWidth Address", HEX,
Help "Address of LogoPixelWidth"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigureMedia, "Enable/Disable Media Configuration", &EN_DIS,
Help "Enable(Default): Configure Media for use, Disable: Skip Media Configuration"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb4CmMode, "ITbt Usb4CmMode value", HEX,
Help "ITbt Usb4CmMode value. 0:Firmware CM, 1:Software CM"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_HorizontalResolution, "HorizontalResolution for PEI Logo", HEX,
Help "HorizontalResolution from PEIm Gfx for PEI Logo"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VerticalResolution, "VerticalResolution for PEI Logo", HEX,
Help "VerticalResolution from PEIm Gfx for PEI Logo"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MediaStandby, "Enable/Disable IGFX Media Standby", &EN_DIS,
Help "Enable(Default): Enable IGFX Media Standby, Disable: Disable IGFX MediaStandby"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPostMemTestRsvd, "SaPostMemTestRsvd", &EN_DIS,
Help "Reserved for SA Post-Mem Test"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableRsr, "RSR feature", &EN_DIS,
Help "Enable or Disable RSR feature; 0: Disable; <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem1, "ReservedCpuPostMem1", &EN_DIS,
Help "Reserved for CPU Post-Mem 1"
Combo $gPlatformFspPkgTokenSpaceGuid_Hwp, "Enable or Disable HWP", &EN_DIS,
Help "Enable/Disable Intel(R) Speed Shift Technology support. Enabling will expose the CPPC v2 interface to allow for hardware controlled P-states. 0: Disable; <b>1: Enable;</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit1Time, "Package Long duration turbo mode time", HEX,
Help "Power Limit 1 Time Window value in seconds. The value may vary from 0 to 128. 0 = default value (28 sec for Mobile and 8 sec for Desktop). Defines time window which Processor Base Power (TDP) value should be maintained. Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128"
"Valid range: 0x00 ~ 0x80"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit2, "Short Duration Turbo Mode", &EN_DIS,
Help "Enable/Disable Power Limit 2 override. If this option is disabled, BIOS will program the default values for Power Limit 2. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboPowerLimitLock, "Turbo settings Lock", &EN_DIS,
Help "Enable/Disable locking of Package Power Limit settings. When enabled, PACKAGE_POWER_LIMIT MSR will be locked and a reset will be required to unlock the register. <b>0: Disable; </b> 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3Time, "Package PL3 time window", HEX,
Help "Power Limit 3 Time Window value in Milli seconds. Indicates the time window over which Power Limit 3 value should be maintained. If the value is 0, BIOS leaves the hardware default value. Valid value: <b>0</b>, 3-8, 10, 12, 14, 16, 20, 24, 28, 32, 40, 48, 56, 64."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3DutyCycle, "Package PL3 Duty Cycle", HEX,
Help "Specify the duty cycle in percentage that the CPU is required to maintain over the configured time window. Range is 0-100."
"Valid range: 0x00 ~ 0x64"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit3Lock, "Package PL3 Lock", &EN_DIS,
Help "Power Limit 3 Lock. When enabled PL3 configurations are locked during OS. When disabled PL3 configuration can be changed during OS. <b>0: Disable</b> ; 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit4Lock, "Package PL4 Lock", &EN_DIS,
Help "Power Limit 4 Lock. When enabled PL4 configurations are locked during OS. When disabled PL4 configuration can be changed during OS. <b>0: Disable</b> ; 1:Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_TccActivationOffset, "TCC Activation Offset", HEX,
Help "TCC Activation Offset. Offset from factory set TCC activation temperature at which the Thermal Control Circuit must be activated. TCC will be activated at TCC Activation Temperature, in volts. <b>Default = 0h</b>."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TccOffsetClamp, "Tcc Offset Clamp Enable/Disable", &EN_DIS,
Help "Tcc Offset Clamp for Runtime Average Temperature Limit (RATL) allows CPU to throttle below P1. <b>0: Disabled</b>; 1: Enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_TccOffsetLock, "Tcc Offset Lock", &EN_DIS,
Help "Tcc Offset Lock for Runtime Average Temperature Limit (RATL) to lock temperature target; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_NumberOfEntries, "Custom Ratio State Entries", HEX,
Help "The number of custom ratio state entries, ranges from 0 to 40 for a valid custom ratio table. Sets the number of custom P-states. At least 2 states must be present"
"Valid range: 0x00 ~ 0x28"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Power Limit 1 Time Window value in seconds. The value may vary from 0 to 128. 0 = default value (28 sec for Mobile and 8 sec for Desktop). Defines time window which Processor Base Power (TDP) value should be maintained."
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Custom value for Turbo Activation Ratio. Needs to be configured with valid values from LFM to Max Turbo. 0 means don't use custom value. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp(Base Power) Control (0/1/2) value for custom cTDP(Assured Power) level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Power Limit 1 Time Window value in seconds. The value may vary from 0 to 128. 0 = default value (28 sec for Mobile and 8 sec for Desktop). Defines time window which Processor Base Power (TDP) value should be maintained."
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Custom value for Turbo Activation Ratio. Needs to be configured with valid values from LFM to Max Turbo. 0 means don't use custom value. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp(Base Power) Control (0/1/2) value for custom cTDP(Assured Power) level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Power Limit 1 Time Window value in seconds. The value may vary from 0 to 128. 0 = default value (28 sec for Mobile and 8 sec for Desktop). Defines time window which Processor Base Power (TDP) value should be maintained."
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Custom value for Turbo Activation Ratio. Needs to be configured with valid values from LFM to Max Turbo. 0 means don't use custom value. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp(Base Power) Control (0/1/2) value for custom cTDP(Assured Power) level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLock, "ConfigTdp mode settings Lock", &EN_DIS,
Help "cTDP(Assured Power) Mode Lock sets the Lock bits on TURBO_ACTIVATION_RATIO and CONFIG_TDP_CONTROL. Note: When CTDP(Assured Power) Lock is enabled Custom ConfigTDP Count will be forced to 1 and Custom ConfigTDP Boot Index will be forced to 0. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigTdpBios, "Load Configurable TDP SSDT", &EN_DIS,
Help "Enables cTDP(Assured Power) control via runtime ACPI BIOS methods. This 'BIOS only' feature does not require EC or driver support. <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1, "PL1 Enable value", &EN_DIS,
Help "Enable/Disable Platform Power Limit 1 programming. If this option is enabled, it activates the PL1 value to be used by the processor to limit the average power of given time window. <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Time, "PL1 timewindow", HEX,
Help "Platform Power Limit 1 Time Window value in seconds. The value may vary from 0 to 128. 0 = default values. Indicates the time window over which Platform Processor Base Power (TDP) value should be maintained. Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128"
"Valid range: 0x00 ~ 0x80"
Combo $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2, "PL2 Enable Value", &EN_DIS,
Help "Enable/Disable Platform Power Limit 2 programming. If this option is disabled, BIOS will program the default values for Platform Power Limit 2. <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_MlcStreamerPrefetcher, "Enable or Disable MLC Streamer Prefetcher", &EN_DIS,
Help "Enable or Disable MLC Streamer Prefetcher; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_MlcSpatialPrefetcher, "Enable or Disable MLC Spatial Prefetcher", &EN_DIS,
Help "Enable or Disable MLC Spatial Prefetcher; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_MonitorMwaitEnable, "Enable or Disable Monitor /MWAIT instructions", &EN_DIS,
Help "Enable/Disable MonitorMWait, if Disable MonitorMwait, the AP threads Idle Manner should not set in MWAIT Loop. 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_MachineCheckEnable, "Enable or Disable initialization of machine check registers", &EN_DIS,
Help "Enable or Disable initialization of machine check registers; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ApIdleManner, "AP Idle Manner of waiting for SIPI", &gPlatformFspPkgTokenSpaceGuid_ApIdleManner,
Help "AP threads Idle Manner for waiting signal to run. 1: HALT loop; <b>2: MWAIT loop</b>; 3: RUN loop."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme, "Control on Processor Trace output scheme", &gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme,
Help "Control on Processor Trace output scheme; <b>0: Single Range Output</b>; 1: ToPA Output."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceEnable, "Enable or Disable Processor Trace feature", &EN_DIS,
Help "Enable or Disable Processor Trace feature; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_Eist, "Enable or Disable Intel SpeedStep Technology", &EN_DIS,
Help "Allows more than two frequency ranges to be supported. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnergyEfficientPState, "Enable or Disable Energy Efficient P-state", &EN_DIS,
Help "Enable/Disable Energy Efficient P-state feature. When set to 0, will disable access to ENERGY_PERFORMANCE_BIAS MSR and CPUID Function will read 0 indicating no support for Energy Efficient policy setting. When set to 1 will enable access to ENERGY_PERFORMANCE_BIAS MSR and CPUID Function will read 1 indicating Energy Efficient policy setting is supported. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnergyEfficientTurbo, "Enable or Disable Energy Efficient Turbo", &EN_DIS,
Help "Enable/Disable Energy Efficient Turbo Feature. This feature will opportunistically lower the turbo frequency to increase efficiency. Recommended only to disable in overclocking situations where turbo frequency must remain constant. Otherwise, leave enabled. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_TStates, "Enable or Disable T states", &EN_DIS,
Help "Enable or Disable T states; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_BiProcHot, "Enable or Disable Bi-Directional PROCHOT#", &EN_DIS,
Help "Enable or Disable Bi-Directional PROCHOT#; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableProcHotOut, "Enable or Disable PROCHOT# signal being driven externally", &EN_DIS,
Help "Enable or Disable PROCHOT# signal being driven externally; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotResponse, "Enable or Disable PROCHOT# Response", &EN_DIS,
Help "Enable or Disable PROCHOT# Response; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_DisableVrThermalAlert, "Enable or Disable VR Thermal Alert", &EN_DIS,
Help "Enable or Disable VR Thermal Alert; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_EnableAllThermalFunctions, "Enable or Disable Thermal Reporting", &EN_DIS,
Help "Enable or Disable Thermal Reporting through ACPI tables; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ThermalMonitor, "Enable or Disable Thermal Monitor", &EN_DIS,
Help "Enable or Disable Thermal Monitor; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_Cx, "Enable or Disable CPU power states (C-states)", &EN_DIS,
Help "Enable/Disable CPU Power Management. Allows CPU to go to C states when it's not 100% utilized. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PmgCstCfgCtrlLock, "Configure C-State Configuration Lock", &EN_DIS,
Help "Configure MSR to CFG Lock bit. 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_C1e, "Enable or Disable Enhanced C-states", &EN_DIS,
Help "Enable/Disable C1E. When enabled, CPU will switch to minimum speed when all cores enter C-State. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PkgCStateDemotion, "Enable or Disable Package Cstate Demotion", &EN_DIS,
Help "Enable or Disable Package C-State Demotion. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PkgCStateUnDemotion, "Enable or Disable Package Cstate UnDemotion", &EN_DIS,
Help "Enable or Disable Package C-State Un-Demotion. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_CStatePreWake, "Enable or Disable CState-Pre wake", &EN_DIS,
Help "Disable - to disable the Cstate Pre-Wake. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TimedMwait, "Enable or Disable TimedMwait Support.", &EN_DIS,
Help "Enable or Disable TimedMwait Support. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_CstCfgCtrIoMwaitRedirection, "Enable or Disable IO to MWAIT redirection", &EN_DIS,
Help "When set, will map IO_read instructions sent to IO registers PMG_IO_BASE_ADDRBASE+offset to MWAIT(offset). <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PkgCStateLimit, "Set the Max Pkg Cstate", HEX,
Help "Maximum Package C State Limit Setting. Cpu Default: Leaves to Factory default value. Auto: Initializes to deepest available Package C State Limit. Valid values 0 - C0/C1, 1 - C2, 2 - C3, 3 - C6, 4 - C7, 5 - C7S, 6 - C8, 7 - C9, 8 - C10, 254 - CPU Default, <b>255 - Auto</b>"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PpmIrmSetting, "Interrupt Redirection Mode Select", HEX,
Help "Interrupt Redirection Mode Select for Logical Interrupts. 0: Fixed priority; 1: Round robin; 2: Hash vector; 7: No change."
"Valid range: 0x00 ~ 0x7"
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotLock, "Lock prochot configuration", &EN_DIS,
Help "Lock prochot configuration Enable/Disable; 0: Disable;<b> 1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel, "Configuration for boot TDP selection", HEX,
Help "cTDP(Assured Power) Mode as Nominal/Level1/Level2/Deactivate TDP(Base Power) selection. Deactivate option will set MSR to Nominal and MMIO to Zero. <b>0: TDP(Base Power) Nominal</b>; 1: TDP(Base Power) Down; 2: TDP(Base Power) Up;0xFF : Deactivate"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxRatio, "Max P-State Ratio", HEX,
Help "Maximum P-state ratio to use in the custom P-state table. Valid Range 0 to 0x7F"
"Valid range: 0x00 ~ 0x7F"
EditNum $gPlatformFspPkgTokenSpaceGuid_StateRatio, "P-state ratios for custom P-state table", HEX,
Help "P-state ratios for custom P-state table. NumberOfEntries has valid range between 0 to 40. For no. of P-States supported(NumberOfEntries) , StateRatio[NumberOfEntries] are configurable. Valid Range of each entry is 0 to 0x7F"
"Valid range: 0x00 ~ 0x7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F"
EditNum $gPlatformFspPkgTokenSpaceGuid_StateRatioMax16, "P-state ratios for max 16 version of custom P-state table", HEX,
Help "P-state ratios for max 16 version of custom P-state table. This table is used for OS versions limited to a max of 16 P-States. If the first entry of this table is 0, or if Number of Entries is 16 or less, then this table will be ignored, and up to the top 16 values of the StateRatio table will be used instead. Valid Range of each entry is 0 to 0x7F"
"Valid range: 0x00 ~ 0x7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F7F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit1, "Package Long duration turbo mode power limit", HEX,
Help "Power Limit 1 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Overclocking SKU: Value must be between Max and Min Power Limits. Other SKUs: This value must be between Min Power Limit and Processor Base Power (TDP) Limit. If value is 0, BIOS will program Processor Base Power (TDP) value. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit2Power, "Package Short duration turbo mode power limit", HEX,
Help "Power Limit 2 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. If the value is 0, BIOS will program this value as 1.25*Processor Base Power (TDP). Processor applies control policies such that the package power does not exceed this limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3, "Package PL3 power limit", HEX,
Help "Power Limit 3 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. XE SKU: Any value can be programmed. Overclocking SKU: Value must be between Max and Min Power Limits. Other SKUs: This value must be between Min Power Limit and Processor Base Power (TDP) Limit. If the value is 0, BIOS leaves the hardware default value. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit4, "Package PL4 power limit", HEX,
Help "Power Limit 4 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. If the value is 0, BIOS leaves default value. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit4Boost, "Package PL4 boost configuration", HEX,
Help "Configure Power Limit 4 Boost in Watts. Valid Range 0 to 1023 in step size of 1 Watt. The value 0 means disable."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TccOffsetTimeWindowForRatl, "Tcc Offset Time Window for RATL", HEX,
Help ""
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1, "Short term Power Limit value for custom cTDP level 1", HEX,
Help "Power Limit 1 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Overclocking SKU: Value must be between Max and Min Power Limits. Other SKUs: This value must be between Min Power Limit and Processor Base Power (TDP) Limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit2, "Long term Power Limit value for custom cTDP level 1", HEX,
Help "Power Limit 2 value in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Processor applies control policies such that the package power does not exceed this limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1, "Short term Power Limit value for custom cTDP level 2", HEX,
Help "Power Limit 1 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Overclocking SKU: Value must be between Max and Min Power Limits. Other SKUs: This value must be between Min Power Limit and Processor Base Power (TDP) Limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit2, "Long term Power Limit value for custom cTDP level 2", HEX,
Help "Power Limit 2 value in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Processor applies control policies such that the package power does not exceed this limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1, "Short term Power Limit value for custom cTDP level 3", HEX,
Help "Power Limit 1 in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Overclocking SKU: Value must be between Max and Min Power Limits. Other SKUs: This value must be between Min Power Limit and Processor Base Power (TDP) Limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit2, "Long term Power Limit value for custom cTDP level 3", HEX,
Help "Power Limit 2 value in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. 0 = no custom override. Processor applies control policies such that the package power does not exceed this limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Power, "Platform PL1 power", HEX,
Help "Platform Power Limit 1 Power in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. Any value can be programmed between Max and Min Power Limits. This setting will act as the new PL1 value for the Package RAPL algorithm. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2Power, "Platform PL2 power", HEX,
Help "Platform Power Limit 2 Power in Milli Watts. BIOS will round to the nearest 1/8W when programming. Value set 120 = 15W. Any value can be programmed between Max and Min Power Limits. This setting will act as the new Max Turbo Power (PL2) value for the Package RAPL algorithm. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 32767."
"Valid range: 0x00 ~ 0x7FFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CcfAutoGv, "CCF AutoGV", &EN_DIS,
Help "Enable/Disable CCF AutoGV; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_RaceToHalt, "Race To Halt", &EN_DIS,
Help "Enable/Disable Race To Halt feature. RTH will dynamically increase CPU frequency in order to enter pkg C-State faster to reduce overall power. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounter, "Enable or Disable Three Strike Counter", &EN_DIS,
Help "Enable (default): Three Strike counter will be incremented. Disable: Prevents Three Strike counter from incrementing; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_HwpInterruptControl, "Set HW P-State Interrupts Enabled for for MISC_PWR_MGMT", &EN_DIS,
Help "Set HW P-State Interrupts Enabled for for MISC_PWR_MGMT; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem2, "ReservedCpuPostMem2", &EN_DIS,
Help "Reserved for CPU Post-Mem 2"
Combo $gPlatformFspPkgTokenSpaceGuid_C1StateAutoDemotion, "Enable or Disable C1 Cstate Demotion", &EN_DIS,
Help "Enable or Disable C1 Cstate Auto Demotion. Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_C1StateUnDemotion, "Enable or Disable C1 Cstate UnDemotion", &EN_DIS,
Help "Enable or Disable C1 Cstate Un-Demotion. Disable; <b>1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_MinRingRatioLimit, "Minimum Ring ratio limit override", HEX,
Help "Minimum Ring ratio limit override. <b>0: Hardware defaults.</b> Range: 0 - Max turbo ratio limit"
"Valid range: 0x00 ~ 0x53"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxRingRatioLimit, "Maximum Ring ratio limit override", HEX,
Help "Maximum Ring ratio limit override. <b>0: Hardware defaults.</b> Range: 0 - Max turbo ratio limit"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePerCorePState, "Enable or Disable Per Core P State OS control", &EN_DIS,
Help "Enable/Disable Per Core P state OS control mode. When set, the highest core request is used for all other core requests. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoPerCorePstate, "Enable or Disable HwP Autonomous Per Core P State OS control", &EN_DIS,
Help "Disable Autonomous PCPS Autonomous will request the same value for all cores all the time. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoEppGrouping, "Enable or Disable HwP Autonomous EPP Grouping", &EN_DIS,
Help "Enable EPP grouping Autonomous will request the same values for all cores with same EPP. Disable EPP grouping autonomous will not necessarily request same values for all cores with same EPP. <b> 0: Disable </b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ApplyConfigTdp, "Enable Configurable TDP", &EN_DIS,
Help "Applies cTDP(Assured Power) initialization settings based on non-cTDP(Assured Power) or cTDP(Assured Power). Default is 1: Applies to cTDP(Assured Power); if 0 then applies non-cTDP(Assured Power) and BIOS will bypass cTDP(Assured Power) initialzation flow"
Combo $gPlatformFspPkgTokenSpaceGuid_HwpLock, "Misc Power Management MSR Lock", &EN_DIS,
Help "Enable/Disable HWP Lock support in Misc Power Management MSR. 0: Disable, <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DualTauBoost, "Dual Tau Boost", &EN_DIS,
Help "Enable Dual Tau Boost feature. This is only applicable for Desktop 35W/65W/125W sku. When DPTF is enabled this feature is ignored. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_StepDownMode, "Response Mode", &gPlatformFspPkgTokenSpaceGuid_StepDownMode,
Help "Use Response Mode to adjust Psys_PL3 power reduction behavior. Battery-enabled systems use Gradual Power Reduction. <b>0: Gradual Power Reduction</b> ; 1: Aggressive Power Reduction"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerFloorManagement, "Power Floor Managment for SOC", &EN_DIS,
Help "Option to disable Power Floor Managment for SOC. Disabling this might effectively raise power floor of the SoC and may lead to stability issues. 0: Disable, <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerFloorDisplayDisconnect, "Power Floor Disaplay Disconnect", &EN_DIS,
Help "SoC can disconnect secondary/external display to lower SoC floor power (Default enabled). 0: Disable: Display disconnect will not be used by SoC., <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableRp, "Resource Priority Feature", &EN_DIS,
Help "Enable/Disable Resource Priority Feature. Enable/Disable; <b>0: Disable</b> ; 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerFloorPcieGenDowngrade, "Power Floor PCIe Gen Downgrade", &EN_DIS,
Help "SoC can downgrade PCIe gen speed to lower SoC floor power (Default enabled). 0: Disable: Reduction in PCIe gen speed will not be used by SoC., <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemTest, "ReservedCpuPostMemTest", &EN_DIS,
Help "Reserved for CPU Post-Mem Test"
EndPage
Page "PCH(PostMem)"
Combo $gPlatformFspPkgTokenSpaceGuid_ShowSpiController, "Show SPI controller", &EN_DIS,
Help "Enable/disable to show SPI controller."
Combo $gPlatformFspPkgTokenSpaceGuid_SataSalpSupport, "Enable SATA SALP Support", &EN_DIS,
Help "Enable/disable SATA Aggressive Link Power Management."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsEnable, "Enable SATA ports", HEX,
Help "Enable/disable SATA ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlp, "Enable SATA DEVSLP Feature", HEX,
Help "Enable/disable SATA DEVSLP per port. 0 is disable, 1 is enable. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortDevSlpPinMux, "SATA DEVSLP GPIO Pin", HEX,
Help "Select SATA DEVSLP Pin. Refer to GPIO_*_MUXING_SATA_DEVSLP_x* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortUsb20Enable, "Enable USB2 ports", HEX,
Help "Enable/disable per USB2 ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortUsb30Enable, "Enable USB3 ports", HEX,
Help "Enable/disable per USB3 ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_XdciEnable, "Enable xDCI controller", &EN_DIS,
Help "Enable/disable to xDCI controller."
EditNum $gPlatformFspPkgTokenSpaceGuid_DevIntConfigPtr, "Address of PCH_DEVICE_INTERRUPT_CONFIG table.", HEX,
Help "The address of the table of PCH_DEVICE_INTERRUPT_CONFIG."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NumOfDevIntConfig, "Number of DevIntConfig Entry", HEX,
Help "Number of Device Interrupt Configuration Entry. If this is not zero, the DevIntConfigPtr must not be NULL."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_PxRcConfig, "PIRQx to IRQx Map Config", HEX,
Help "PIRQx to IRQx mapping. The valid value is 0x00 to 0x0F for each. First byte is for PIRQA, second byte is for PIRQB, and so on. The setting is only available in Legacy 8259 PCI mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GpioIrqRoute, "Select GPIO IRQ Route", HEX,
Help "GPIO IRQ Select. The valid value is 14 or 15."
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SciIrqSelect, "Select SciIrqSelect", HEX,
Help "SCI IRQ Select. The valid value is 9, 10, 11, and 20, 21, 22, 23 for APIC only."
"Valid range: 0x00 ~ 0x17"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcoIrqSelect, "Select TcoIrqSelect", HEX,
Help "TCO IRQ Select. The valid value is 9, 10, 11, 20, 21, 22, 23."
"Valid range: 0x00 ~ 0x17"
Combo $gPlatformFspPkgTokenSpaceGuid_TcoIrqEnable, "Enable/Disable Tco IRQ", &EN_DIS,
Help "Enable/disable TCO IRQ"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTableEntryNum, "PCH HDA Verb Table Entry Number", HEX,
Help "Number of Entries in Verb Table."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTablePtr, "PCH HDA Verb Table Pointer", HEX,
Help "Pointer to Array of pointers to Verb Table."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataEnable, "Enable SATA", &EN_DIS,
Help "Enable/disable SATA controller."
Combo $gPlatformFspPkgTokenSpaceGuid_SataMode, "SATA Mode", &gPlatformFspPkgTokenSpaceGuid_SataMode,
Help "Select SATA controller working mode."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMode, "SPIn Device Mode", HEX,
Help "Selects SPI operation mode. N represents controller index: SPI0, SPI1, ... Available modes: 0:SerialIoSpiDisabled, 1:SerialIoSpiPci, 2:SerialIoSpiHidden"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPolarity, "SPI<N> Chip Select Polarity", HEX,
Help "Sets polarity for each chip Select. Available options: 0:SerialIoSpiCsActiveLow, 1:SerialIoSpiCsActiveHigh"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsEnable, "SPI<N> Chip Select Enable", HEX,
Help "0:Disabled, 1:Enabled. Enables GPIO for CS0 or CS1 if it is Enabled"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiDefaultCsOutput, "SPIn Default Chip Select Output", HEX,
Help "Sets Default CS as Output. N represents controller index: SPI0, SPI1, ... Available options: 0:CS0, 1:CS1"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsMode, "SPIn Default Chip Select Mode HW/SW", HEX,
Help "Sets Default CS Mode Hardware or Software. N represents controller index: SPI0, SPI1, ... Available options: 0:HW, 1:SW"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsState, "SPIn Default Chip Select State Low/High", HEX,
Help "Sets Default CS State Low or High. N represents controller index: SPI0, SPI1, ... Available options: 0:Low, 1:High"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPinMux, "Serial IO SPI CS Pin Muxing", HEX,
Help "Select SerialIo SPI CS pin muxing. Refer to GPIO_*_MUXING_SERIALIO_SPIx_CS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiClkPinMux, "Serial IO SPI CLK Pin Muxing", HEX,
Help "Select SerialIo SPI CS pin muxing. Refer to GPIO_*_MUXING_SERIALIO_SPIx_CLK* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMisoPinMux, "Serial IO SPI MISO Pin Muxing", HEX,
Help "Select SerialIo SPI MISO pin muxing. Refer to GPIO_*_MUXING_SERIALIO_SPIx_MISO* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMosiPinMux, "Serial IO SPI MOSI Pin Muxing", HEX,
Help "Select SerialIo SPI MOSI pin muxing. Refer to GPIO_*_MUXING_SERIALIO_SPIx_MOSI* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartMode, "UARTn Device Mode", HEX,
Help "Selects Uart operation mode. N represents controller index: Uart0, Uart1, ... Available modes: 0:SerialIoUartDisabled, 1:SerialIoUartPci, 2:SerialIoUartHidden, 3:SerialIoUartCom, 4:SerialIoUartSkipInit"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartBaudRate, "Default BaudRate for each Serial IO UART", HEX,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartParity, "Default ParityType for each Serial IO UART", HEX,
Help "Set default Parity. 0: DefaultParity, 1: NoParity, 2: EvenParity, 3: OddParity"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDataBits, "Default DataBits for each Serial IO UART", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartStopBits, "Default StopBits for each Serial IO UART", HEX,
Help "Set default stop bits. 0: DefaultStopBits, 1: OneStopBit, 2: OneFiveStopBits, 3: TwoStopBits"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating, "Power Gating mode for each Serial IO UART that works in COM mode", HEX,
Help "Set Power Gating. 0: Disabled, 1: Enabled, 2: Auto"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDmaEnable, "Enable Dma for each Serial IO UART that supports it", HEX,
Help "Set DMA/PIO mode. 0: Disabled, 1: Enabled"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartAutoFlow, "Enables UART hardware flow control, CTS and RTS lines", HEX,
Help "Enables UART hardware flow control, CTS and RTS lines."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartRtsPinMuxPolicy, "SerialIoUartRtsPinMuxPolicy", HEX,
Help "Select SerialIo Uart Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartCtsPinMuxPolicy, "SerialIoUartCtsPinMuxPolicy", HEX,
Help "Select SerialIo Uart Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartRxPinMuxPolicy, "SerialIoUartRxPinMuxPolicy", HEX,
Help "Select SerialIo Uart Rx pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RX* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartTxPinMuxPolicy, "SerialIoUartTxPinMuxPolicy", HEX,
Help "Select SerialIo Uart Tx pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_TX* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDbg2, "Serial IO UART DBG2 table", HEX,
Help "Enable or disable Serial Io UART DBG2 table, default is Disable; <b>0: Disable;</b> 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI2cMode, "I2Cn Device Mode", HEX,
Help "Selects I2c operation mode. N represents controller index: I2c0, I2c1, ... Available modes: 0:SerialIoI2cDisabled, 1:SerialIoI2cPci, 2:SerialIoI2cHidden"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSdaPinMux, "Serial IO I2C SDA Pin Muxing", HEX,
Help "Select SerialIo I2c Sda pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I2Cx_SDA* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSclPinMux, "Serial IO I2C SCL Pin Muxing", HEX,
Help "Select SerialIo I2c Scl pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I2Cx_SCL* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cPadsTermination, "PCH SerialIo I2C Pads Termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C0,I2C1,... pads termination respectively. One byte for each controller, byte0 for I2C0, byte1 for I2C1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cMode, "I3C Device Mode", HEX,
Help "Selects I3c operation mode. Available modes: 0:SerialIoI3cDisabled, 1:SerialIoI3cPci, 2:SerialIoI3cPhantom (only applicable to I3C1, controlls GPIO enabling)"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSdaPinMux, "Serial IO I3C SDA Pin Muxing", HEX,
Help "Select SerialIo I3c Sda pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I3Cx_SDA* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSdaPadTermination, "Serial IO I3C SDA Pad Termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I3C0,I3C1,... pads termination respectively. One byte for each controller, byte0 for I3C0, byte1 for I3C1, and so on."
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclPinMux, "Serial IO I3C SCL Pin Muxing", HEX,
Help "Select SerialIo I3c Scl pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I3Cx_SCL* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclPadTermination, "Serial IO I3C SCL Pad Termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I3C0,I3C1,... pads termination respectively. One byte for each controller, byte0 for I3C0, byte1 for I3C1, and so on."
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclFbPinMux, "Serial IO I3C SCL FB Pin Muxing", HEX,
Help "Select SerialIo I3c SclFb pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I3Cx_SCL FB* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI3cSclFbPadTermination, "Serial IO I3C SCL FB Pad Termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I3C0,I3C1,... pads termination respectively. One byte for each controller, byte0 for I3C0, byte1 for I3C1, and so on."
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshGpGpioPinMuxing, "ISH GP GPIO Pin Muxing", HEX,
Help "Determines ISH GP GPIO Pin muxing. See GPIO_*_MUXING_ISH_GP_x_GPIO_*. 'x' are GP_NUMBER"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRxPinMuxing, "ISH UART Rx Pin Muxing", HEX,
Help "Determines ISH UART Rx Pin muxing. See GPIO_*_MUXING_ISH_UARTx_TXD_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartTxPinMuxing, "ISH UART Tx Pin Muxing", HEX,
Help "Determines ISH UART Tx Pin muxing. See GPIO_*_MUXING_ISH_UARTx_RXD_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRtsPinMuxing, "ISH UART Rts Pin Muxing", HEX,
Help "Select ISH UART Rts Pin muxing. Refer to GPIO_*_MUXING_ISH_UARTx_RTS_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartCtsPinMuxing, "ISH UART Rts Pin Muxing", HEX,
Help "Select ISH UART Cts Pin muxing. Refer to GPIO_*_MUXING_ISH_UARTx_CTS_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPinMuxing, "ISH I2C SDA Pin Muxing", HEX,
Help "Select ISH I2C SDA Pin muxing. Refer to GPIO_*_MUXING_ISH_I2Cx_SDA_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSclPinMuxing, "ISH I2C SCL Pin Muxing", HEX,
Help "Select ISH I2C SCL Pin muxing. Refer to GPIO_*_MUXING_ISH_I2Cx_SCL_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI3cSdaPinMuxing, "ISH I3C SDA Pin Muxing", HEX,
Help "Select ISH I3C SDA Pin muxing. Refer to GPIO_*_MUXING_ISH_I3Cx_SDA_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI3cSclPinMuxing, "ISH I3C SCL Pin Muxing", HEX,
Help "Select ISH I3C SCL Pin muxing. Refer to GPIO_*_MUXING_ISH_I3Cx_SCL_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPinMuxing, "ISH SPI MOSI Pin Muxing", HEX,
Help "Select ISH SPI MOSI Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_MOSI_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPinMuxing, "ISH SPI MISO Pin Muxing", HEX,
Help "Select ISH SPI MISO Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_MISO_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiClkPinMuxing, "ISH SPI CLK Pin Muxing", HEX,
Help "Select ISH SPI CLK Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_CLK_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiCsPinMuxing, "ISH SPI CS#N Pin Muxing", HEX,
Help "Select ISH SPI CS#N Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_CS<N>_* for possible values. N-SPI number, 0-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshGpGpioPadTermination, "ISH GP GPIO Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo GP#N GPIO pads termination respectively. #N are GP_NUMBER, not strictly relate to indexes of this table. Index 0-23 -> ISH_GP_0-23, Index 24-25 -> ISH_GP_30-31"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRxPadTermination, "ISH UART Rx Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Rx pads termination respectively. #N-byte for each controller, byte0 for UART0 Rx, byte1 for UART1 Rx, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartTxPadTermination, "ISH UART Tx Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Tx pads termination respectively. #N-byte for each controller, byte0 for UART0 Tx, byte1 for UART1 Tx, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRtsPadTermination, "ISH UART Rts Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Rts pads termination respectively. #N-byte for each controller, byte0 for UART0 Rts, byte1 for UART1 Rts, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartCtsPadTermination, "ISH UART Rts Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Cts pads termination respectively. #N-byte for each controller, byte0 for UART0 Cts, byte1 for UART1 Cts, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPadTermination, "ISH I2C SDA Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Sda pads termination respectively. #N-byte for each controller, byte0 for I2C0 Sda, byte1 for I2C1 Sda, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI3cSdaPadTermination, "ISH I3C SDA Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Sda pads termination respectively. #N-byte for each controller, byte0 for I2C0 Sda, byte1 for I2C1 Sda, and so on."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSclPadTermination, "ISH I2C SCL Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Scl pads termination respectively. #N-byte for each controller, byte0 for I2C0 Scl, byte1 for I2C1 Scl, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI3cSclPadTermination, "ISH I3C SCL Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Scl pads termination respectively. #N-byte for each controller, byte0 for I2C0 Scl, byte1 for I2C1 Scl, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPadTermination, "ISH SPI MOSI Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Mosi pads termination respectively. #N-byte for each controller, byte0 for SPI0 Mosi, byte1 for SPI1 Mosi, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPadTermination, "ISH SPI MISO Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Miso pads termination respectively. #N-byte for each controller, byte0 for SPI0 Miso, byte1 for SPI1 Miso, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiClkPadTermination, "ISH SPI CLK Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Clk pads termination respectively. #N-byte for each controller, byte0 for SPI0 Clk, byte1 for SPI1 Clk, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiCsPadTermination, "ISH SPI CS#N Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Cs#M pads termination respectively. N*M-byte for each controller, byte0 for SPI0 Cs0, byte1 for SPI1 Cs1, SPI1 Cs0, byte2, SPI1 Cs1, byte3"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiCsEnable, "Enable PCH ISH SPI Cs#N pins assigned", HEX,
Help "Set if ISH SPI Cs#N pins are to be enabled by BIOS. 0: Disable; 1: Enable. N-Cs number: 0-1"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPetxiset, "USB Per Port HS Preemphasis Bias", HEX,
Help "USB Per Port HS Preemphasis Bias. 000b-0mV, 001b-11.25mV, 010b-16.9mV, 011b-28.15mV, 100b-28.15mV, 101b-39.35mV, 110b-45mV, 111b-56.3mV. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyTxiset, "USB Per Port HS Transmitter Bias", HEX,
Help "USB Per Port HS Transmitter Bias. 000b-0mV, 001b-11.25mV, 010b-16.9mV, 011b-28.15mV, 100b-28.15mV, 101b-39.35mV, 110b-45mV, 111b-56.3mV, One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPredeemp, "USB Per Port HS Transmitter Emphasis", HEX,
Help "USB Per Port HS Transmitter Emphasis. 00b - Emphasis OFF, 01b - De-emphasis ON, 10b - Pre-emphasis ON, 11b - Pre-emphasis & De-emphasis ON. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPehalfbit, "USB Per Port Half Bit Pre-emphasis", HEX,
Help "USB Per Port Half Bit Pre-emphasis. 1b - half-bit pre-emphasis, 0b - full-bit pre-emphasis. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmphEnable, "Enable the write to USB 3.0 TX Output -3.5dB De-Emphasis Adjustment", HEX,
Help "Enable the write to USB 3.0 TX Output -3.5dB De-Emphasis Adjustment. Each value in arrary can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmph, "USB 3.0 TX Output -3.5dB De-Emphasis Adjustment Setting", HEX,
Help "USB 3.0 TX Output -3.5dB De-Emphasis Adjustment Setting, HSIO_TX_DWORD5[21:16], <b>Default = 29h</b> (approximately -3.5dB De-Emphasis). One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmpEnable, "Enable the write to USB 3.0 TX Output Downscale Amplitude Adjustment", HEX,
Help "Enable the write to USB 3.0 TX Output Downscale Amplitude Adjustment, Each value in arrary can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmp, "USB 3.0 TX Output Downscale Amplitude Adjustment", HEX,
Help "USB 3.0 TX Output Downscale Amplitude Adjustment, HSIO_TX_DWORD8[21:16], <b>Default = 00h</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanEnable, "Enable LAN", &EN_DIS,
Help "Enable/disable LAN controller."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnEnable, "Enable PCH TSN", &EN_DIS,
Help "Enable/disable TSN on the PCH."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed, "TSN Link Speed", &gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed,
Help "Set TSN Link Speed."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressHigh, "PCH TSN MAC Address High Bits", HEX,
Help "Set TSN MAC Address High."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressLow, "PCH TSN MAC Address Low Bits", HEX,
Help "Set TSN MAC Address Low."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsn1MacAddressHigh, "PCH TSN MAC Address High Bits", HEX,
Help "Set TSN MAC Address High."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsn1MacAddressLow, "PCH TSN MAC Address Low Bits", HEX,
Help "Set TSN MAC Address Low."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PciePtm, "PCIe PTM enable/disable", HEX,
Help "Enable/disable Precision Time Measurement for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiPowerGatingDis, "Disable DMI Power Gating", &EN_DIS,
Help "Enable/disable DMI Power Gating Disable."
Combo $gPlatformFspPkgTokenSpaceGuid_UsbPdoProgramming, "USB PDO Programming", &EN_DIS,
Help "Enable/disable PDO programming for USB in PEI phase. Disabling will allow for programming during later phase. 1: enable, 0: disable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcPowerButtonDebounce, "Power button debounce configuration", HEX,
Help "Debounce time for PWRBTN in microseconds. For values not supported by HW, they will be rounded down to closest supported on. 0: disable, 250-1024000us: supported range"
"Valid range: 0x00 ~ 0x009C4000"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiBmeHostDeviceEnabled, "PCH eSPI Host and Device BME enabled", &EN_DIS,
Help "PCH eSPI Host and Device BME enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration, "PCH eSPI Link Configuration Lock (SBLCL)", &EN_DIS,
Help "Enable/Disable lock of communication through SET_CONFIG/GET_CONFIG to eSPI target addresseses from range 0x0 - 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailEnabledStates, "Mask to enable the usage of external V1p05 VR rail in specific S0ix or Sx states", HEX,
Help "Enable External V1P05 Rail in: BIT0:S0i1/S0i2, BIT1:S0i3, BIT2:S3, BIT3:S4, BIT5:S5"
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailSupportedVoltageStates, "Mask to enable the platform configuration of external V1p05 VR rail", HEX,
Help "External V1P05 Rail Supported Configuration"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailVoltage, "External V1P05 Voltage Value that will be used in S0i2/S0i3 states", HEX,
Help "Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...)"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMax, "External V1P05 Icc Max Value", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailEnabledStates, "Mask to enable the usage of external Vnn VR rail in specific S0ix or Sx states", HEX,
Help "Enable External Vnn Rail in: BIT0:S0i1/S0i2, BIT1:S0i3, BIT2:S3, BIT3:S4, BIT5:S5"
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSupportedVoltageStates, "Mask to enable the platform configuration of external Vnn VR rail", HEX,
Help "External Vnn Rail Supported Configuration"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailVoltage, "External Vnn Voltage Value that will be used in S0ix/Sx states", HEX,
Help "Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...), Default is set to 420"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMax, "External Vnn Icc Max Value that will be used in S0ix/Sx states", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxEnabledStates, "Mask to enable the usage of external Vnn VR rail in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Enable External Vnn Rail in Sx: BIT0-1:Reserved, BIT2:S3, BIT3:S4, BIT5:S5"
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxVoltage, "External Vnn Voltage Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...)"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMax, "External Vnn Icc Max Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxLowToHighCurModeVolTranTime, "Transition time in microseconds from Low Current Mode Voltage to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to low current mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToHighCurModeVolTranTime, "Transition time in microseconds from Retention Mode Voltage to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to retention mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToLowCurModeVolTranTime, "Transition time in microseconds from Retention Mode Voltage to Low Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to retention mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxOffToHighCurModeVolTranTime, "Transition time in microseconds from Off (0V) to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 Transition to 0V is disabled."
"Valid range: 0x0 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcDbgMsgEn, "PMC Debug Message Enable", &EN_DIS,
Help "When Enabled, PMC HW will send debug messages to trace hub; When Disabled, PMC HW will never send debug meesages to trace hub. Noted: When Enabled, may not enter S0ix"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinPtr, "Pointer to ChipsetInit Binary", HEX,
Help "ChipsetInit Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinLen, "Length of ChipsetInit Binary", HEX,
Help "ChipsetInit Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NphyBinPtr, "Pointer to NPHY Binary", HEX,
Help "Nphy Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NphyBinLen, "Length of NPHY Binary", HEX,
Help "Nphy Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinPtr, "Pointer to SYNPS PHY Binary", HEX,
Help "Synps Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinLen, "Length of SYNPS PHY Binary", HEX,
Help "Synps Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchFivrDynPm, "FIVR Dynamic Power Management", &EN_DIS,
Help "Enable/Disable FIVR Dynamic Power Management."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMaximum, "External V1P05 Icc Max Value", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMaximum, "External Vnn Icc Max Value that will be used in S0ix/Sx states", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMaximum, "External Vnn Icc Max Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciUaolEnable, "USB Audio Offload enable", &EN_DIS,
Help "Enable/Disable USB Audio Offload capabilites. 0: disabled, 1: enabled (default)"
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable, "PCH xHCI enable HS Interrupt IN Alarm", &EN_DIS,
Help "PCH xHCI enable HS Interrupt IN Alarm. 0: disabled (default), 1: enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchGpioUnlockDataPtr, "PCH GPIOV2 Unlock Data Buffer Address", HEX,
Help "Address of GPIO Unlock Data buffer"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchGpioUnlockDataSize, "PCH GPIOV2 Unlock Data Buffer Size", HEX,
Help "Size of PCH GPIO Unlock Data Buffer"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPostMemRsvd, "PchPostMemRsvd", &EN_DIS,
Help "Reserved for PCH Post-Mem"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviMode, "CNVi Configuration", &gPlatformFspPkgTokenSpaceGuid_CnviMode,
Help "This option allows for automatic detection of Connectivity Solution. [Auto Detection] assumes that CNVi will be enabled when available, [Disable] allows for disabling CNVi."
Combo $gPlatformFspPkgTokenSpaceGuid_CnviWifiCore, "CNVi Wi-Fi Core", &EN_DIS,
Help "Enable/Disable CNVi Wi-Fi Core, Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviBtCore, "CNVi BT Core", &EN_DIS,
Help "Enable/Disable CNVi BT Core, Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviBtAudioOffload, "CNVi BT Audio Offload", &EN_DIS,
Help "Enable/Disable BT Audio Offload, Default is ENABLE. 0: DISABLE, 1: ENABLE"
EditNum $gPlatformFspPkgTokenSpaceGuid_CnviRfResetPinMux, "CNVi RF_RESET pin muxing", HEX,
Help "Select CNVi RF_RESET# pin depending on board routing. LP/P/M: GPP_A8 = 0x2942E408(default) or GPP_F4 = 0x194CE404. H/S: 0. Refer to GPIO_*_MUXING_CNVI_RF_RESET_* in GpioPins*.h."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CnviClkreqPinMux, "CNVi CLKREQ pin muxing", HEX,
Help "Select CNVi CLKREQ pin depending on board routing. LP/P/M: GPP_A9 = 0x3942E609(default) or GPP_F5 = 0x394CE605. H/S: 0. Refer to GPIO_*_MUXING_CNVI_CRF_XTAL_CLKREQ_* in GpioPins*.h."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiHostC10ReportEnable, "Enable Host C10 reporting through eSPI", &EN_DIS,
Help "Enable/disable Host C10 reporting to Device via eSPI Virtual Wire."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcUsb2PhySusPgEnable, "PCH USB2 PHY Power Gating enable", &EN_DIS,
Help "1: Will enable USB2 PHY SUS Well Power Gating, 0: Will not enable PG of USB2 PHY Sus Well PG"
Combo $gPlatformFspPkgTokenSpaceGuid_PchUsbOverCurrentEnable, "PCH USB OverCurrent mapping enable", &EN_DIS,
Help "1: Will program USB OC pin mapping in xHCI controller memory, 0: Will clear OC pin mapping allow for NOA usage of OC pins"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiLgmrEnable, "Espi Lgmr Memory Range decode ", &EN_DIS,
Help "This option enables or disables espi lgmr "
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailCtrlRampTmr, "External V1P05 Control Ramp Timer value", HEX,
Help "Hold off time to be used when changing the v1p05_ctrl for external bypass value in us"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailCtrlRampTmr, "External VNN Control Ramp Timer value", HEX,
Help "Hold off time to be used when changing the vnn_ctrl for external bypass value in us"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlpResetConfig, "Set SATA DEVSLP GPIO Reset Config", HEX,
Help "Set SATA DEVSLP GPIO Reset Config per port. 0x00 - GpioResetDefault, 0x01 - GpioResumeReset, 0x03 - GpioHostDeepReset, 0x05 - GpioPlatformReset, 0x07 - GpioDswReset. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHotEnable, "PCHHOT# pin", &EN_DIS,
Help "Enable PCHHOT# pin assertion when temperature is higher than PchHotLevel. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SataLedEnable, "SATA LED", &EN_DIS,
Help "SATA LED indicating SATA controller activity. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmVrAlert, "VRAlert# Pin", &EN_DIS,
Help "When VRAlert# feature pin is enabled and its state is '0', the PMC requests throttling to a T3 Tstate to the PCH throttling unit.. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_AmtEnabled, "AMT Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable or disable AMT functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_WatchDogEnabled, "WatchDog Timer Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable or disable WatchDog timer. Setting is invalid if AmtEnabled is 0."
Combo $gPlatformFspPkgTokenSpaceGuid_FwProgress, "PET Progress", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable/Disable PET Events Progress to receive PET Events. Setting is invalid if AmtEnabled is 0."
Combo $gPlatformFspPkgTokenSpaceGuid_AmtSolEnabled, "SOL Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Serial Over Lan enable/disable state by Mebx. Setting is invalid if AmtEnabled is 0."
EditNum $gPlatformFspPkgTokenSpaceGuid_WatchDogTimerOs, "OS Timer", HEX,
Help "16 bits Value, Set OS watchdog timer. Setting is invalid if AmtEnabled is 0."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WatchDogTimerBios, "BIOS Timer", HEX,
Help "16 bits Value, Set BIOS watchdog timer. Setting is invalid if AmtEnabled is 0."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotImplemented, "PCH PCIe root port connection type", HEX,
Help "0: built-in device, 1:slot"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAcsEnabled, "PCIE RP Access Control Services Extended Capability", HEX,
Help "Enable/Disable PCIE RP Access Control Services Extended Capability"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpEnableCpm, "PCIE RP Clock Power Management", HEX,
Help "Enable/Disable PCIE RP Clock Power Management, even if disabled, CLKREQ# signal can still be controlled by L1 PM substates mechanism"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpDetectTimeoutMs, "PCIE RP Detect Timeout Ms", HEX,
Help "The number of milliseconds within 0~65535 in reference code will wait for link to exit Detect state for enabled ports before assuming there is no device and potentially disabling the port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcModPhySusPgEnable, "ModPHY SUS Power Domain Dynamic Gating", &EN_DIS,
Help "Enable/Disable ModPHY SUS Power Domain Dynamic Gating. Setting not supported on PCH-H. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcV1p05PhyExtFetControlEn, "V1p05-PHY supply external FET control", &EN_DIS,
Help "Enable/Disable control using EXT_PWR_GATE# pin of external FET to power gate v1p05-PHY supply. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcV1p05IsExtFetControlEn, "V1p05-IS supply external FET control", &EN_DIS,
Help "Enable/Disable control using EXT_PWR_GATE2# pin of external FET to power gate v1p05-IS supply. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPwrOptEnable, "Enable Power Optimizer", &EN_DIS,
Help "Enable DMI Power Optimizer on PCH side."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchWriteProtectionEnable, "PCH Flash Protection Ranges Write Enble", HEX,
Help "Write or erase is blocked by hardware."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchReadProtectionEnable, "PCH Flash Protection Ranges Read Enble", HEX,
Help "Read is blocked by hardware."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeLimit, "PCH Protect Range Limit", HEX,
Help "Left shifted address by 12 bits with address bits 11:0 are assumed to be FFFh for limit comparison."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeBase, "PCH Protect Range Base", HEX,
Help "Left shifted address by 12 bits with address bits 11:0 are assumed to be 0."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaPme, "Enable Pme", &EN_DIS,
Help "Enable Azalia wake-on-ring."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency, "HD Audio Link Frequency", &gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency,
Help "HDA Link Freq (PCH_HDAUDIO_LINK_FREQUENCY enum): 0: 6MHz, 1: 12MHz, 2: 24MHz."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiCs0Enable, "Enable PCH ISH SPI Cs0 pins assigned", HEX,
Help "Set if ISH SPI Cs0 pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIoApicEntry24_119, "Enable PCH Io Apic Entry 24-119", &EN_DIS,
Help "0: Disable; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIoApicId, "PCH Io Apic ID", HEX,
Help "This member determines IOAPIC ID. Default is 0x02."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiEnable, "Enable PCH ISH SPI pins assigned", HEX,
Help "Set if ISH SPI native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshUartEnable, "Enable PCH ISH UART pins assigned", HEX,
Help "Set if ISH UART native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshI2cEnable, "Enable PCH ISH I2C pins assigned", HEX,
Help "Set if ISH I2C native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshI3cEnable, "Enable PCH ISH I3C pins assigned", HEX,
Help "Set if ISH I3C native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshGpEnable, "Enable PCH ISH GP pins assigned", HEX,
Help "Set if ISH GP native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshPdtUnlock, "PCH ISH PDT Unlock Msg", &EN_DIS,
Help "0: False; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshMsiInterrupt, "PCH ISH MSI Interrupts", &EN_DIS,
Help "0: False; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanLtrEnable, "Enable PCH Lan LTR capabilty of PCH internal LAN", &EN_DIS,
Help "0: Disable; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosLock, "Enable LOCKDOWN BIOS LOCK", &EN_DIS,
Help "Enable the BIOS Lock feature and set EISS bit (D31:F5:RegDCh[5]) for the BIOS region protection."
Combo $gPlatformFspPkgTokenSpaceGuid_PchCrid, "PCH Compatibility Revision ID", &EN_DIS,
Help "This member describes whether or not the CRID feature of PCH should be enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_RtcBiosInterfaceLock, "RTC BIOS Interface Lock", &EN_DIS,
Help "Enable RTC BIOS interface lock. When set, prevents RTC TS (BUC.TS) from being changed."
Combo $gPlatformFspPkgTokenSpaceGuid_RtcMemoryLock, "RTC Cmos Memory Lock", &EN_DIS,
Help "Enable RTC lower and upper 128 byte Lock bits to lock Bytes 38h-3Fh in the upper and and lower 128-byte bank of RTC RAM."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpHotPlug, "Enable PCIE RP HotPlug", HEX,
Help "Indicate whether the root port is hot plug available."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpPmSci, "Enable PCIE RP Pm Sci", &EN_DIS,
Help "Indicate whether the root port power manager SCI is enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpTransmitterHalfSwing, "Enable PCIE RP Transmitter Half Swing", HEX,
Help "Indicate whether the Transmitter Half Swing is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpClkReqDetect, "Enable PCIE RP Clk Req Detect", HEX,
Help "Probe CLKREQ# signal before enabling CLKREQ# based power management."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAdvancedErrorReporting, "PCIE RP Advanced Error Report", HEX,
Help "Indicate whether the Advanced Error Reporting is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpUnsupportedRequestReport, "PCIE RP Unsupported Request Report", HEX,
Help "Indicate whether the Unsupported Request Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpFatalErrorReport, "PCIE RP Fatal Error Report", HEX,
Help "Indicate whether the Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNoFatalErrorReport, "PCIE RP No Fatal Error Report", HEX,
Help "Indicate whether the No Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpCorrectableErrorReport, "PCIE RP Correctable Error Report", HEX,
Help "Indicate whether the Correctable Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnFatalError, "PCIE RP System Error On Fatal Error", HEX,
Help "Indicate whether the System Error on Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnNonFatalError, "PCIE RP System Error On Non Fatal Error", HEX,
Help "Indicate whether the System Error on Non Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnCorrectableError, "PCIE RP System Error On Correctable Error", HEX,
Help "Indicate whether the System Error on Correctable Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpMaxPayload, "PCIE RP Max Payload", HEX,
Help "Max Payload Size supported, Default 256B, see enum PCH_PCIE_MAX_PAYLOAD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcAssignment, "Touch Host Controller Assignment", HEX,
Help "Assign THC 0x0:ThcAssignmentNone, 0x1:ThcAssignmentThc0, 0x2:ThcAssignmentThc1"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcInterruptPinMuxing, "Touch Host Controller Interrupt Pin Mux", HEX,
Help "Set THC Pin Muxing Value if signal can be enabled on multiple pads. Refer to GPIO_*_MUXING_THC_SPIx_INTB_* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcMode, "Touch Host Controller Mode", HEX,
Help "Switch between Intel THC protocol and Industry standard HID Over SPI protocol. 0x0:Thc, 0x1:Hid"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcWakeOnTouch, "Touch Host Controller Wake On Touch", HEX,
Help "Based on this setting vGPIO for given THC will be in native mode, and additional _CRS for wake will be exposed in ACPI"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcActiveLtr, "Touch Host Controller Active Ltr", HEX,
Help "Expose Active Ltr for OS driver to set"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcIdleLtr, "Touch Host Controller Idle Ltr", HEX,
Help "Expose Idle Ltr for OS driver to set"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcResetPad, "Touch Host Controller Hid Over Spi ResetPad", HEX,
Help "Hid Over Spi ResetPad"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcResetPadTrigger, "Touch Host Controller Hid Over Spi ResetPad Trigger", HEX,
Help "Hid Over Spi Reset Pad Trigger 0x0:Low, 0x1:High"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiConnectionSpeed, "Touch Host Controller Hid Over Spi Connection Speed", HEX,
Help "Hid Over Spi Connection Speed - SPI Frequency"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiLimitPacketSize, "Touch Host Controller Hid Over Spi Limit PacketSize", HEX,
Help "When set, limits SPI read & write packet size to 64B. Otherwise, THC uses Max Soc packet size for SPI Read and Write 0x0- Max Soc Packet Size, 0x11 - 64 Bytes"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPerformanceLimitation, "Touch Host Controller Hid Over Spi Limit PacketSize", HEX,
Help "Minimum amount of delay the THC/QUICKSPI driver must wait between end of write operation and begin of read operation. This value shall be in 10us multiples 0x0: Disabled, 1-65535 (0xFFFF) - up to 655350 us"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiInputReportHeaderAddress, "Touch Host Controller Hid Over Spi Input Report Header Address", HEX,
Help "Hid Over Spi Input Report Header Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiInputReportBodyAddress, "Touch Host Controller Hid Over Spi Input Report Body Address", HEX,
Help "Hid Over Spi Input Report Body Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiOutputReportAddress, "Touch Host Controller Hid Over Spi Output Report Address", HEX,
Help "Hid Over Spi Output Report Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiReadOpcode, "Touch Host Controller Hid Over Spi Read Opcode", HEX,
Help "Hid Over Spi Read Opcode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiWriteOpcode, "Touch Host Controller Hid Over Spi Write Opcode", HEX,
Help "Hid Over Spi Write Opcode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidSpiFlags, "Touch Host Controller Hid Over Spi Flags", HEX,
Help "Hid Over Spi Flags 0x0:Single SPI Mode, 0x4000:Dual SPI Mode, 0x8000:Quad SPI Mode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcResetSequencingDelay, "Touch Host Controller Hid Over Spi Reset Sequencing Delay [ms]", HEX,
Help "Policy control for reset sequencing delay (ACPI _INI, _RST) default 300ms"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPcieSpeed, "PCIE RP Pcie Speed", HEX,
Help "Determines each PCIE Port speed capability. 0: Auto; 1: Gen1; 2: Gen2; 3: Gen3 (see: PCIE_SPEED)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPhysicalSlotNumber, "PCIE RP Physical Slot Number", HEX,
Help "Indicates the slot number for the root port. Default is the value as root port index."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpCompletionTimeout, "PCIE RP Completion Timeout", HEX,
Help "The root port completion timeout(see: PCIE_COMPLETION_TIMEOUT). Default is PchPcieCompletionTO_Default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAspm, "PCIE RP Aspm", HEX,
Help "The ASPM configuration of the root port (see: PCH_PCIE_ASPM_CONTROL). Default is PchPcieAspmAutoConfig."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpL1Substates, "PCIE RP L1 Substates", HEX,
Help "The L1 Substates configuration of the root port (see: PCH_PCIE_L1SUBSTATES_CONTROL). Default is PchPcieL1SubstatesL1_1_2."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqOverrideDefault, "PCIE RP override default settings for EQ", &EN_DIS,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMethod, "PCIE RP choose EQ method", &gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMethod,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMode, "PCIE RP choose EQ mode", &gPlatformFspPkgTokenSpaceGuid_PcieGen3EqMode,
Help "Choose PCIe EQ mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqLocalTxOverrideEn, "PCIE RP EQ local transmitter override", &EN_DIS,
Help "Enable/Disable local transmitter override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3NoOfPresetOrCoeff, "PCI RP number of valid list entries", HEX,
Help "Select number of presets or coefficients depending on the mode"
"Valid range: 0 ~ 11"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor0List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor0List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor1List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor1List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor2List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor2List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor3List, "PCIR RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor3List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor4List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor4List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor5List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor5List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor6List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor6List, "PCIe post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor7List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor7List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor8List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor8List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PreCursor9List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3PostCursor9List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset0List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset1List, "PCIe preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset2List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset3List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset4List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset5List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset6List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset7List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset8List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset9List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh3Preset10List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh1DpTxPreset, "PCIe EQ phase 1 downstream transmitter port preset", HEX,
Help "Allows to select the downstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh1UpTxPreset, "PCIE RP EQ phase 1 upstream tranmitter port preset", HEX,
Help "Allows to select the upstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3EqPh2LocalTxOverridePreset, "PCIE RP EQ phase 2 local transmitter override preset", HEX,
Help "Allows to select the value of the preset used during phase 2 local transmitter override"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMethod, "PCIE RP choose EQ method", &gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMethod,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMode, "PCIE RP choose EQ mode", &gPlatformFspPkgTokenSpaceGuid_PcieGen4EqMode,
Help "Choose PCIe EQ mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqLocalTxOverrideEn, "PCIE RP EQ local transmitter override", &EN_DIS,
Help "Enable/Disable local transmitter override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3NoOfPresetOrCoeff, "PCI RP number of valid list entries", HEX,
Help "Select number of presets or coefficients depending on the mode"
"Valid range: 0 ~ 11"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor0List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor0List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor1List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor1List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor2List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor2List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor3List, "PCIR RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor3List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor4List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor4List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor5List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor5List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor6List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor6List, "PCIe post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor7List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor7List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor8List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor8List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PreCursor9List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3PostCursor9List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset0List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset1List, "PCIe preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset2List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset3List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset4List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset5List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset6List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset7List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset8List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset9List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh3Preset10List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh1DpTxPreset, "PCIe EQ phase 1 downstream transmitter port preset", HEX,
Help "Allows to select the downstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh1UpTxPreset, "PCIE RP EQ phase 1 upstream tranmitter port preset", HEX,
Help "Allows to select the upstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4EqPh2LocalTxOverridePreset, "PCIE RP EQ phase 2 local transmitter override preset", HEX,
Help "Allows to select the value of the preset used during phase 2 local transmitter override"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMethod, "PCIE RP choose EQ method", &gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMethod,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMode, "PCIE RP choose EQ mode", &gPlatformFspPkgTokenSpaceGuid_PcieGen5EqMode,
Help "Choose PCIe EQ mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqLocalTxOverrideEn, "PCIE RP EQ local transmitter override", &EN_DIS,
Help "Enable/Disable local transmitter override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3NoOfPresetOrCoeff, "PCI RP number of valid list entries", HEX,
Help "Select number of presets or coefficients depending on the mode"
"Valid range: 0 ~ 11"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor0List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor0List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor1List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor1List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor2List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor2List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor3List, "PCIR RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor3List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor4List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor4List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor5List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor5List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor6List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor6List, "PCIe post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor7List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor7List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor8List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor8List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PreCursor9List, "PCIE RP pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3PostCursor9List, "PCIE RP post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset0List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset1List, "PCIe preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset2List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset3List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset4List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset5List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset6List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset7List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset8List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset9List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh3Preset10List, "PCIE RP preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh1DpTxPreset, "PCIe EQ phase 1 downstream transmitter port preset", HEX,
Help "Allows to select the downstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh1UpTxPreset, "PCIE RP EQ phase 1 upstream tranmitter port preset", HEX,
Help "Allows to select the upstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5EqPh2LocalTxOverridePreset, "PCIE RP EQ phase 2 local transmitter override preset", HEX,
Help "Allows to select the value of the preset used during phase 2 local transmitter override"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh3Bypass, "Phase3 RP Gen3 EQ enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh3Bypass,
Help "Phase3 Gen3 EQ enable. Disabled(0x0)(Default): Disable phase 3, Enabled(0x1): Enable phase 3"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh3Bypass, "Phase3 RP Gen3 EQ enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh3Bypass,
Help "Phase3 Gen3 EQ enable. Disabled(0x0)(Default): Disable phase 3, Enabled(0x1): Enable phase 3"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh3Bypass, "Phase3 RP Gen5 EQ enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh3Bypass,
Help "Phase3 Gen5 EQ enable. Disabled(0x0)(Default): Disable phase 3, Enabled(0x1): Enable phase 3"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh23Bypass, "Phase2-3 RP Gen3 EQ enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPh23Bypass,
Help "Phase2-3 Gen3 EQ enable. Disabled(0x0)(Default): Disable Phase2-3, Enabled(0x1): Enable Phase2-3"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh23Bypass, "Phase2-3 RP Gen4 EQ enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPh23Bypass,
Help "Phase2-3 Gen4 EQ enable. Disabled(0x0)(Default): Disable Phase2-3, Enabled(0x1): Enable Phase2-3"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh23Bypass, "Phase2-3 RP Gen5 EQ enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPh23Bypass,
Help "Phase2-3 Gen5 EQ enable. Disabled(0x0)(Default): Disable Phase2-3, Enabled(0x1): Enable Phase2-3"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPhBypass, "RP Gen3 EQ Phase enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen3EqPhBypass,
Help "Gen3 EQ Phase enable. Disabled(0x0)(Default): Disable Eq Phase, Enabled(0x1): Enable Eq Phase"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPhBypass, "RP Gen4 EQ Phase enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen4EqPhBypass,
Help "Gen4 EQ Phase enable. Disabled(0x0)(Default): Disable Eq Phase, Enabled(0x1): Enable Eq Phase"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPhBypass, "RP Gen5 EQ Phase enable", &gPlatformFspPkgTokenSpaceGuid_PcieRpGen5EqPhBypass,
Help "Gen5 EQ Phase enable. Disabled(0x0)(Default): Disable Eq Phase, Enabled(0x1): Enable Eq Phase"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3PcetTimer, "PCET Timer", HEX,
Help "Preset/Coefficient Evaluation Timeout Gen3 PCET Timer. See PCIE_GEN3_PCET. Default is 0x0(2ms)"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4PcetTimer, "Gen4 PCET Timer", HEX,
Help "Preset/Coefficient Evaluation Timeout - Gen4 PCET Timer. See PCIE_GEN4_PCET. Default is 0x0(2ms)"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5PcetTimer, "Gen5 PCET Timer", HEX,
Help "Preset/Coefficient Evaluation Timeout - Gen5 PCET Timer. See PCIE_GEN5_PCET. Default is 0x0(2ms)"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen3TsLockTimer, "TS Lock Timer for Gen3", HEX,
Help "Training Sequence Wait Latency For Presets/Coefficients Evaluation - Gen3 TS Lock Timer. See PCIE_GEN3_TS_LOCK_TIMER. Default is 0x0"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen4TsLockTimer, "PTS Lock Timer for Gen4", HEX,
Help "Training Sequence Wait Latency For Presets/Coefficients Evaluation - Gen4 TS Lock Timer. See PCIE_GEN4_TS_LCOK_TIMER. Default is 0x0"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieGen5TsLockTimer, "PTS Lock Timer for Gen5", HEX,
Help "Training Sequence Wait Latency For Presets/Coefficients Evaluation - Gen5 TS Lock Timer. See PCIE_GEN5_TS_LCOK_TIMER. Default is 0x0"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieSetSecuredRegisterLock, "PCIE Secure Register Lock", &EN_DIS,
Help "Describes whether Secure Register Lock is enaled or disabled. When it will be enbaled, load PcieRpSetSecuredRegisterLock recipe. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DGWait, "DG Wait", &EN_DIS,
Help "0(Default) = Disable, 1 = Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpTestAspmOc, "Enable/Disable ASPM Optionality Compliance", HEX,
Help "Enable/Disable ASPM Optionality Compliance."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieCfgDump, "PCIe Configuration Dump", &gPlatformFspPkgTokenSpaceGuid_PcieCfgDump,
Help "Enable/Disable ASPM Optionality Compliance."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEnablePeerMemoryWrite, "PCIE RP Enable Peer Memory Write", &EN_DIS,
Help "This member describes whether Peer Memory Writes are enabled on the platform."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieComplianceTestMode, "PCIE Compliance Test Mode", &EN_DIS,
Help "Compliance Test Mode shall be enabled when using Compliance Load Board."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpFunctionSwap, "PCIE Rp Function Swap", &EN_DIS,
Help "Allows BIOS to use root port function number swapping when root port of function 0 is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieFiaProgramming, "PCIe Fia Programming", &EN_DIS,
Help "Load Fia configuration if enable. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmPmeB0S5Dis, "PCH Pm PME_B0_S5_DIS", &EN_DIS,
Help "When cleared (default), wake events from PME_B0_STS are allowed in S5 if PME_B0_EN = 1."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpImrEnabled, "PCIE IMR", &EN_DIS,
Help "Enables Isolated Memory Region for PCIe."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpImrSelection, "PCIE IMR port number", HEX,
Help "Selects PCIE root port number for IMR feature."
"Valid range: 0x0 ~ 23"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWolEnableOverride, "PCH Pm Wol Enable Override", &EN_DIS,
Help "Corresponds to the WOL Enable Override bit in the General PM Configuration B (GEN_PMCON_B) register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanEnable, "PCH Pm WoW lan Enable", &EN_DIS,
Help "Determine if WLAN wake from Sx, corresponds to the HOST_WLAN_PP_EN bit in the PWRM_CFG3 register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanDeepSxEnable, "PCH Pm WoW lan DeepSx Enable", &EN_DIS,
Help "Determine if WLAN wake from DeepSx, corresponds to the DSX_WLAN_PP_EN bit in the PWRM_CFG3 register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmLanWakeFromDeepSx, "PCH Pm Lan Wake From DeepSx", &EN_DIS,
Help "Determine if enable LAN to wake from deep Sx."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDeepSxPol, "PCH Pm Deep Sx Pol", &EN_DIS,
Help "Deep Sx Policy."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableDsxAcPresentPulldown, "PCH Pm Disable Dsx Ac Present Pulldown", &EN_DIS,
Help "When Disable, PCH will internal pull down AC_PRESENT in deep SX and during G3 exit."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpS3MinAssert, "PCH Pm Slp S3 Min Assert", HEX,
Help "SLP_S3 Minimum Assertion Width Policy. Default is PchSlpS350ms."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpS4MinAssert, "PCH Pm Slp S4 Min Assert", HEX,
Help "SLP_S4 Minimum Assertion Width Policy. Default is PchSlpS44s."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpSusMinAssert, "PCH Pm Slp Sus Min Assert", HEX,
Help "SLP_SUS Minimum Assertion Width Policy. Default is PchSlpSus4s."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpAMinAssert, "PCH Pm Slp A Min Assert", HEX,
Help "SLP_A Minimum Assertion Width Policy. Default is PchSlpA2s."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEnableDbcObs, "USB Overcurrent Override for VISA", &EN_DIS,
Help "This option overrides USB Over Current enablement state that USB OC will be disabled after enabling this option. Enable when VISA pin is muxed with USB OC"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmSlpStrchSusUp, "PCH Pm Slp Strch Sus Up", &EN_DIS,
Help "Enable SLP_X Stretching After SUS Well Power Up."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmSlpLanLowDc, "PCH Pm Slp Lan Low Dc", &EN_DIS,
Help "Enable/Disable SLP_LAN# Low on DC Power."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPwrBtnOverridePeriod, "PCH Pm Pwr Btn Override Period", HEX,
Help "PCH power button override period. 000b-4s, 001b-6s, 010b-8s, 011b-10s, 100b-12s, 101b-14s."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableNativePowerButton, "PCH Pm Disable Native Power Button", &EN_DIS,
Help "Power button native mode disable."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmMeWakeSts, "PCH Pm ME_WAKE_STS", &EN_DIS,
Help "Clear the ME_WAKE_STS bit in the Power and Reset Status (PRSTS) register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWolOvrWkSts, "PCH Pm WOL_OVR_WK_STS", &EN_DIS,
Help "Clear the WOL_OVR_WK_STS bit in the Power and Reset Status (PRSTS) register."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPwrCycDur, "PCH Pm Reset Power Cycle Duration", HEX,
Help "Could be customized in the unit of second. Please refer to EDS for all support settings. 0 is default, 1 is 1 second, 2 is 2 seconds, ..."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPciePllSsc, "PCH Pm Pcie Pll Ssc", HEX,
Help "Specifies the Pcie Pll Spread Spectrum Percentage. The default is 0xFF: AUTO - No BIOS override."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLegacyIoLowLatency, "PCH Legacy IO Low Latency Enable", &EN_DIS,
Help "Set to enable low latency of legacy IO. <b>0: Disable</b>, 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SataPwrOptEnable, "PCH Sata Pwr Opt Enable", &EN_DIS,
Help "SATA Power Optimizer on PCH side."
Combo $gPlatformFspPkgTokenSpaceGuid_EsataSpeedLimit, "PCH Sata eSATA Speed Limit", &EN_DIS,
Help "When enabled, BIOS will configure the PxSCTL.SPD to 2 to limit the eSATA port speed."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataSpeedLimit, "PCH Sata Speed Limit", HEX,
Help "Indicates the maximum speed the SATA controller can support 0h: PchSataSpeedDefault."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsHotPlug, "Enable SATA Port HotPlug", HEX,
Help "Enable SATA Port HotPlug."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsInterlockSw, "Enable SATA Port Interlock Sw", HEX,
Help "Enable SATA Port Interlock Sw."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsExternal, "Enable SATA Port External", HEX,
Help "Enable SATA Port External."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsSpinUp, "Enable SATA Port SpinUp", HEX,
Help "Enable the COMRESET initialization Sequence to the device."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsSolidStateDrive, "Enable SATA Port Solid State Drive", HEX,
Help "0: HDD; 1: SSD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsEnableDitoConfig, "Enable SATA Port Enable Dito Config", HEX,
Help "Enable DEVSLP Idle Timeout settings (DmVal, DitoVal)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDmVal, "Enable SATA Port DmVal", HEX,
Help "DITO multiplier. Default is 15."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiAspm, "Pch Dmi Aspm Ctrl", &gPlatformFspPkgTokenSpaceGuid_PchDmiAspm,
Help "ASPM configuration on the PCH side of the DMI/OPI Link. Default is <b>PchPcieAspmAutoConfig</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDitoVal, "Enable SATA Port DmVal", HEX,
Help "DEVSLP Idle Timeout (DITO), Default is 625."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsZpOdd, "Enable SATA Port ZpOdd", HEX,
Help "Support zero power ODD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataRstRaidDeviceId, "PCH Sata Rst Raid Alternate Id", &EN_DIS,
Help "Enable RAID Alternate ID."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieEnable, "PCH Sata Rst Pcie Storage Remap enable", HEX,
Help "Enable Intel RST for PCIe Storage remapping."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieStoragePort, "PCH Sata Rst Pcie Storage Port", HEX,
Help "Intel RST for PCIe Storage remapping - PCIe Port Selection (1-based, 0 = autodetect)."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieDeviceResetDelay, "PCH Sata Rst Pcie Device Reset Delay", HEX,
Help "PCIe Storage Device Reset Delay in milliseconds. Default value is 100ms"
"Valid range: 0x00 ~ 0xFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UfsEnable, "UFS enable/disable", &EN_DIS,
Help "Enable/Disable UFS controller, One byte for each Controller - (1,0) to enable controller 0 and (0,1) to enable controller 1"
Combo $gPlatformFspPkgTokenSpaceGuid_UfsInlineEncryption, "UFS Inline Encryption enable/disable", &EN_DIS,
Help "Enable/Disable UFS Inline Encryption feature, One byte for each Controller - (1,0) to enable Inline Encryption for controller 0 and (0,1) to enable Inline Encryption for controller 1 "
Combo $gPlatformFspPkgTokenSpaceGuid_IehMode, "IEH Mode", &gPlatformFspPkgTokenSpaceGuid_IehMode,
Help "Integrated Error Handler Mode, 0: Bypass, 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SocTTSuggestedSetting, "SOC Thermal Throttling Suggested Setting", &EN_DIS,
Help "Thermal Throttling Suggested Setting. When it is enabled, customized throttle levels are ignored but with native settings."
EditNum $gPlatformFspPkgTokenSpaceGuid_SocT0Level, "SOC Thermal Throttling Custimized T0Level Value", HEX,
Help "Custimized T0Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SocT1Level, "SOC Thermal Throttling Custimized T1Level Value", HEX,
Help "Custimized T1Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SocT2Level, "SOC Thermal Throttling Custimized T2Level Value", HEX,
Help "Custimized T2Level value."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SocTTEnable, "Enable SOC Thermal Throttle", &EN_DIS,
Help "Enable thermal throttle function."
Combo $gPlatformFspPkgTokenSpaceGuid_SocTTState13Enable, "SOC PMSync State 13", &EN_DIS,
Help "When set to 1 and the programmed GPIO pin is a 1, then PMSync state 13 will force at least T2 state."
Combo $gPlatformFspPkgTokenSpaceGuid_SocTTLock, "SOC Thermal Throttle Lock", &EN_DIS,
Help "Thermal Throttle Lock."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTSuggestedSetting, "PCH Thermal Throttling Suggested Setting", &EN_DIS,
Help "Thermal Throttling Suggested Setting. When it is enabled, customized throttle levels are ignored but with native settings."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT0Level, "PCH Thermal Throttling Custimized T0Level Value", HEX,
Help "Custimized T0Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT1Level, "PCH Thermal Throttling Custimized T1Level Value", HEX,
Help "Custimized T1Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT2Level, "PCH Thermal Throttling Custimized T2Level Value", HEX,
Help "Custimized T2Level value."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTEnable, "Enable PCH Thermal Throttle", &EN_DIS,
Help "Enable thermal throttle function."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTState13Enable, "PCH PMSync State 13", &EN_DIS,
Help "When set to 1 and the programmed GPIO pin is a 1, then PMSync state 13 will force at least T2 state."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTLock, "PCH Thermal Throttle Lock", &EN_DIS,
Help "Thermal Throttle Lock."
Combo $gPlatformFspPkgTokenSpaceGuid_IoeTTSuggestedSetting, "IOE Thermal Throttling Suggested Setting", &EN_DIS,
Help "IOE Thermal Throttling Suggested Setting. When it is enabled, customized throttle levels are ignored but with native settings."
EditNum $gPlatformFspPkgTokenSpaceGuid_IoeT0Level, "IOE Thermal Throttling Custimized T0Level Value", HEX,
Help "Custimized IOE T0Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IoeT1Level, "IOE Thermal Throttling Custimized T1Level Value", HEX,
Help "Custimized IOE T1Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IoeT2Level, "IOE Thermal Throttling Custimized T2Level Value", HEX,
Help "Custimized IOE T2Level value."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_IoeTTEnable, "Enable IOE Thermal Throttle", &EN_DIS,
Help "Enable thermal throttle function."
Combo $gPlatformFspPkgTokenSpaceGuid_IoeTTLock, "IOE Thermal Throttle Lock", &EN_DIS,
Help "Thermal Throttle Lock."
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiTsawEn, "DMI Thermal Sensor Autonomous Width Enable", &EN_DIS,
Help "DMI Thermal Sensor Autonomous Width Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiSuggestedSetting, "DMI Thermal Sensor Suggested Setting", &EN_DIS,
Help "DMT thermal sensor suggested representative values."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS0TW, "Thermal Sensor 0 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS0TW,
Help "Thermal Sensor 0 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS1TW, "Thermal Sensor 1 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS1TW,
Help "Thermal Sensor 1 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS2TW, "Thermal Sensor 2 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS2TW,
Help "Thermal Sensor 2 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS3TW, "Thermal Sensor 3 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS3TW,
Help "Thermal Sensor 3 Target Width."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T1M, "Port 0 T1 Multipler", HEX,
Help "Port 0 T1 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T2M, "Port 0 T2 Multipler", HEX,
Help "Port 0 T2 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T3M, "Port 0 T3 Multipler", HEX,
Help "Port 0 T3 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0TDisp, "Port 0 Tdispatch", HEX,
Help "Port 0 Tdispatch."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T1M, "Port 1 T1 Multipler", HEX,
Help "Port 1 T1 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T2M, "Port 1 T2 Multipler", HEX,
Help "Port 1 T2 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T3M, "Port 1 T3 Multipler", HEX,
Help "Port 1 T3 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1TDisp, "Port 1 Tdispatch", HEX,
Help "Port 1 Tdispatch."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0Tinact, "Port 0 Tinactive", HEX,
Help "Port 0 Tinactive."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataP0TDispFinit, "Port 0 Alternate Fast Init Tdispatch", &EN_DIS,
Help "Port 0 Alternate Fast Init Tdispatch."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1Tinact, "Port 1 Tinactive", HEX,
Help "Port 1 Tinactive."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataP1TDispFinit, "Port 1 Alternate Fast Init Tdispatch", &EN_DIS,
Help "Port 1 Alternate Fast Init Tdispatch."
Combo $gPlatformFspPkgTokenSpaceGuid_SataThermalSuggestedSetting, "Sata Thermal Throttling Suggested Setting", &EN_DIS,
Help "Sata Thermal Throttling Suggested Setting."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTemperatureHotLevel, "Thermal Device Temperature", HEX,
Help "Decides the temperature."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2OverCurrentPin, "USB2 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USB 2.0 Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3OverCurrentPin, "USB3 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USB 3.0 Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrOverrideEnable, "Enable xHCI LTR override", &EN_DIS,
Help "Enables override of recommended LTR values for xHCI"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrHighIdleTimeOverride, "xHCI High Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI High Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrMediumIdleTimeOverride, "xHCI Medium Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI Medium Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrLowIdleTimeOverride, "xHCI Low Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI Low Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGating, "Enable 8254 Static Clock Gating", &EN_DIS,
Help "Set 8254CGE=1 is required for SLP_S0 support. However, set 8254CGE=1 in POST time might fail to boot legacy OS using 8254 timer. Make sure it is disabled to support legacy OS using 8254 timer. Also enable this while S0ix is enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGatingOnS3, "Enable 8254 Static Clock Gating On S3", &EN_DIS,
Help "This is only applicable when Enable8254ClockGating is disabled. FSP will do the 8254 CGE programming on S3 resume when Enable8254ClockGatingOnS3 is enabled. This avoids the SMI requirement for the programming."
Combo $gPlatformFspPkgTokenSpaceGuid_EnableTcoTimer, "Enable TCO timer.", &EN_DIS,
Help "When FALSE, it disables PCH ACPI timer, and stops TCO timer. NOTE: This will have huge power impact when it's enabled. If TCO timer is disabled, uCode ACPI timer emulation must be enabled, and WDAT table must not be exposed to the OS."
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 3", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 3, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 3", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 3, HSIO_TX_DWORD9[6:0], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 2", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 2, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 2", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 2, HSIO_TX_DWORD9[14:8], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 1", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 1, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 1", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 1, HSIO_TX_DWORD9[22:16], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 0", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 0, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 0", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 0, HSIO_TX_DWORD9[30:24], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage, "End of Post message", &gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage,
Help "Test, Send End of Post message. Disable(0x0): Disable EOP message, Send in PEI(0x1): EOP send in PEI, Send in DXE(0x2)(Default): EOP send in DXE"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableD0I3SettingForHeci, "D0I3 Setting for HECI Disable", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option disables setting D0I3 bit for all HECI devices"
Combo $gPlatformFspPkgTokenSpaceGuid_MctpBroadcastCycle, "Mctp Broadcast Cycle", &EN_DIS,
Help "Test, Determine if MCTP Broadcast is enabled <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear, "ME Unconfig on RTC clear", &gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear,
Help "0: Disable ME Unconfig On Rtc Clear. <b>1: Enable ME Unconfig On Rtc Clear</b>. 2: Cmos is clear, status unkonwn. 3: Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode, "Enforce Enhanced Debug Mode", &EN_DIS,
Help "Determine if ME should enter Enhanced Debug Mode. <b>0: disable</b>, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_CseDataResilience, "CSE Data Resilience Support", &EN_DIS,
Help "0: Disable CSE Data Resilience Support. <b>1: Enable CSE Data Resilience Support.</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_MePostMemRsvd, "MePostMemRsvd", &EN_DIS,
Help "Reserved for ME Post-Mem"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownGlobalSmi, "Enable LOCKDOWN SMI", &EN_DIS,
Help "Enable SMI_LOCK bit to prevent writes to the Global SMI Enable bit."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosInterface, "Enable LOCKDOWN BIOS Interface", &EN_DIS,
Help "Enable BIOS Interface Lock Down bit to prevent writes to the Backup Control Register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchUnlockGpioPads, "Unlock all GPIO pads", &EN_DIS,
Help "Force all GPIO pads to be unlocked for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_PchSbAccessUnlock, "PCH Unlock SideBand access", &EN_DIS,
Help "The SideBand PortID mask for certain end point (e.g. PSFx) will be locked before 3rd party code execution. 0: Lock SideBand access; 1: Unlock SideBand access."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxSnoopLatency, "PCIE RP Ltr Max Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxNoSnoopLatency, "PCIE RP Ltr Max No Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Non-Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitScale, "PCIE RP Slot Power Limit Scale", HEX,
Help "Specifies scale used for slot power limit value. Leave as 0 to set to default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitValue, "PCIE RP Slot Power Limit Value", HEX,
Help "Specifies upper limit on power supplie by slot. Leave as 0 to set to default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEnablePort8xhDecode, "PCIE RP Enable Port8xh Decode", &EN_DIS,
Help "This member describes whether PCIE root port Port 8xh Decode is enabled. 0: Disable; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPciePort8xhDecodePortIndex, "PCIE Port8xh Decode Port Index", HEX,
Help "The Index of PCIe Port that is selected for Port8xh Decode (0 Based)."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableEnergyReport, "PCH Energy Reporting", &EN_DIS,
Help "Disable/Enable PCH to CPU energy report feature."
Combo $gPlatformFspPkgTokenSpaceGuid_SataTestMode, "PCH Sata Test Mode", &EN_DIS,
Help "Allow entrance to the PCH SATA test modes."
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciOcLock, "PCH USB OverCurrent mapping lock enable", &EN_DIS,
Help "If this policy option is enabled then BIOS will program OCCFDONE bit in xHCI meaning that OC mapping data will be consumed by xHCI and OC mapping registers will be locked."
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcLpmS0ixSubStateEnableMask, "Low Power Mode Enable/Disable config mask", HEX,
Help "Configure if respective S0i2/3 sub-states are to be supported. Each bit corresponds to one sub-state (LPMx - BITx): LPM0-s0i2.0, LPM1-s0i2.1, LPM2-s0i2.2, LPM3-s0i3.0, LPM4-s0i3.1, LPM5-s0i3.2, LPM6-s0i3.3, LPM7-s0i3.4."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcPchLpmS0ixSubStateEnableMask, "Low Power Mode Enable/Disable config mask", HEX,
Help "Configure if respective S0i2/3 sub-states are to be supported. Each bit corresponds to one sub-state (LPMx - BITx): LPM0-s0i2.0, LPM1-s0i2.1, LPM2-s0i2.2, LPM3-s0i3.0, LPM4-s0i3.1, LPM5-s0i3.2, LPM6-s0i3.3, LPM7-s0i3.4."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmErDebugMode, "PCH PMC ER Debug mode", &EN_DIS,
Help "Disable/Enable Energy Reporting Debug Mode."
Combo $gPlatformFspPkgTokenSpaceGuid_CppmFaEn, "CPPM Forced Alignment Enable", &EN_DIS,
Help "Enable/Disable CPPM Force Alignment. When enabled, PMC allows stalling of the backbone or blocking the DMI transmit arbiter"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanWOLFastSupport, "PCH Lan WOL Fast Support", &EN_DIS,
Help "Enables bit B_PCH_ACPI_GPE0_EN_127_96_PME_B0 during PchLanSxCallback in PchLanSxSmm."
Combo $gPlatformFspPkgTokenSpaceGuid_PlatformAtxTelemetryUnit, "Platform ATX Telemetry Unit", &EN_DIS,
Help "Set ATX Telemetry Unit in Watts or Percentage; <b>0: Watts</b>; 1: Percent"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrOverrideSpecComplaint, "PCIE RP LTR Override Spec Complaint", HEX,
Help "Override LTR based on Ep capability."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcC10DynamicThresholdAdjustment, "PMC C10 dynamic threshold dajustment enable", &EN_DIS,
Help "Set if you want to enable PMC C10 dynamic threshold adjustment. Only works on supported SKUs"
EditNum $gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitRatio, "Turbo Ratio Limit Ratio array", HEX,
Help "Performance-core Turbo Ratio Limit Ratio0-7 (TRLR) defines the turbo ratio (max is 85 in normal mode and 120 in core extension mode). Ratio[0]: This Turbo Ratio Limit Ratio0 must be greater than or equal all other ratio values. If this value is invalid, thn set all other active cores to minimum. Otherwise, align the Ratio Limit to 0. Please check each active cores. Ratio[1~7]: This Turbo Ratio Limit Ratio1 must be <= to Turbo Ratio Limit Ratio0~6."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitNumCore, "Turbo Ratio Limit Num Core array", HEX,
Help "Performance-core Turbo Ratio Limit Core0~7 defines the core range, the turbo ratio is defined in Turbo Ratio Limit Ratio0~7. If value is zero, this entry is ignored."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitRatio, "ATOM Turbo Ratio Limit Ratio array", HEX,
Help "Efficient-core Turbo Ratio Limit Ratio0-7 defines the turbo ratio (max is 85 irrespective of the core extension mode), the core range is defined in E-core Turbo Ratio Limit CoreCount0-7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitNumCore, "ATOM Turbo Ratio Limit Num Core array", HEX,
Help "Efficient-core Turbo Ratio Limit CoreCount0-7 defines the core range, the turbo ratio is defined in E-core Turbo Ratio Limit Ratio0-7. If value is zero, this entry is ignored."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FspEventHandler, "FspEventHandler", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of FSP_EVENT_HANDLER."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableTcssCovTypeA, "Type C Port x Convert to TypeA", &EN_DIS,
Help "Enable / Disable(default) Type C Port x Convert to TypeA"
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