139 lines
7.2 KiB
C
139 lines
7.2 KiB
C
/** @file
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This file contains definitions required for creation of TGL
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end-to-end check-the-checker test result hob.
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@copyright
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Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Specification Reference:
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**/
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#ifndef _FUSA_INFO_HOB_H_
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#define _FUSA_INFO_HOB_H_
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#pragma pack (push, 1)
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extern EFI_GUID gSiFusaInfoGuid;
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/**
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FuSa Info HOB version
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Use this to compare to the HOB retrieved from the FSP for the
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exact match
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**/
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#define FUSA_INFO_VERSION 0x00000100
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/** Constants used for FUSA_TEST_RESULT->CheckResults[] and
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* FUSA_TEST_RESULT->TestResult */
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/**@defgroup ResultConstant Check Result Constants*/
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/**@{*/
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#define FUSA_TEST_DEVICE_NOTAVAILABLE 0xFF /**<device is not available*/
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#define FUSA_TEST_NOTRUN 0x0U /**<check is not run*/
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#define FUSA_TEST_FAIL 0xD2U /**<check fail*/
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#define FUSA_TEST_PASS 0x2DU /**<check pass*/
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/**@}*/
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/** Fusa test result structure
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**/
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typedef struct
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{
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UINT32 TestNumber; /**< test number assigned to this test */
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UINT32 TotalChecks; /**< total number of checks in this test */
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UINT8 TestResult; /**< if all tests passed then this is FUSA_TEST_PASS.
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if at least one check fails, then this is TEST_FAIL
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if the device (eg. MC channel DIMM) is not available
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then this is FUSA_TEST_DEVICE_NOTAVAILABLE.
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if the test has not been run, then this is FUSA_TEST_NOTRUN*/
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UINT8 ReservedByte[3]; /**< reserved, as padding for 4 byte-alignment */
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UINT8 CheckResults[32]; /**< test result for each check.*/
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UINT32 Crc32; /**< crc32 of the structure */
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} FUSA_TEST_RESULT;
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/**
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Fusa Test Number assigned to each Fusa test.
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This will be used for the unique id for each test.
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FUSA_TEST_RESULT->TestNumber will have this value.
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@note While the core4-7 (cbo4-7) that are strictly related to
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the TGL-H are listed, there are not within the
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implementation scope and validation scope yet.
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**/
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typedef enum
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{
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FusaTestNumMc0Cmi = 0, ///<Check MC0 CMI path, valid if there is DIMM using MC0
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FusaTestNumMc1Cmi, ///<Check MC1 CMI path, valid if there is DIMM using MC1
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FusaTestNumMc0CmiCh0Data, ///<Check MC0 CH0 CMI path, valid if there is DIMM using MC0 CH0
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FusaTestNumMc0CmiCh1Data, ///<Check MC0 CH1 CMI path, valid if there is DIMM using MC0 CH1
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FusaTestNumMc0CmiCh2Data, ///<Check MC0 CH2 CMI path, valid if there is DIMM using MC0 CH2
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FusaTestNumMc0CmiCh3Data, ///<Check MC0 CH3 CMI path, valid if there is DIMM using MC0 CH3
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FusaTestNumMc1CmiCh0Data, ///<Check MC1 CH0 CMI path, valid if there is DIMM using MC1 CH0
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FusaTestNumMc1CmiCh1Data, ///<Check MC1 CH1 CMI path, valid if there is DIMM using MC1 CH1
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FusaTestNumMc1CmiCh2Data, ///<Check MC1 CH2 CMI path, valid if there is DIMM using MC1 CH2
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FusaTestNumMc1CmiCh3Data, ///<Check MC1 CH3 CMI path, valid if there is DIMM using MC1 CH3
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FusaTestNumIbecc0Cmi, ///<Check Ibecc0 CMI path, valid if there is IBECC range covering MC0 DIMMs
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FusaTestNumIbecc1Cmi, ///<Check Ibecc1 CMI path, valid if there is IBECC range covering MC1 DIMMs
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FusaTestNumIbecc0EccCorrError, ///<Check Ibecc0 ECC correctable error, valid if there is IBECC range covering MC0 DIMMs
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FusaTestNumIbecc1EccCorrError, ///<Check Ibecc1 ECC correctable error, valid if there is IBECC range covering MC1 DIMMs
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FusaTestNumIbecc0EccUncorrError,///<Check Ibecc0 ECC uncorrectable error, valid if there is IBECC range covering MC0 DIMMs
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FusaTestNumIbecc1EccUncorrError,///<Check Ibecc0 ECC uncorrectable error, valid if there is IBECC range covering MC1 DIMMs
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FusaTestNumMc0Mbist, ///<Check MC0 MBIST
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FusaTestNumMc1Mbist, ///<Check MC1 MBIST
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FusaTestNumMc0Ch0Mbist, ///<Check MC0 CH0 MBIST
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FusaTestNumMc0Ch1Mbist, ///<Check MC0 CH1 MBIST
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FusaTestNumMc0Ch2Mbist, ///<Check MC0 CH2 MBIST
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FusaTestNumMc0Ch3Mbist, ///<Check MC0 CH3 MBIST
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FusaTestNumMc1Ch0Mbist, ///<Check MC1 CH0 MBIST
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FusaTestNumMc1Ch1Mbist, ///<Check MC1 CH1 MBIST
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FusaTestNumMc1Ch2Mbist, ///<Check MC1 CH2 MBIST
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FusaTestNumMc1Ch3Mbist, ///<Check MC1 CH3 MBIST
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FusaTestNumIbecc0Mbist, ///<Check Ibecc0 MBIST
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FusaTestNumIbecc1Mbist, ///<Check Ibecc1 MBIST
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FusaTestNumCpu0Idi, ///<Check core0 IDI path, valid if there is core0 in the SKU
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FusaTestNumCpu1Idi, ///<Check core1 IDI path, valid if there is core1 in the SKU
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FusaTestNumCpu2Idi, ///<Check core2 IDI path, valid if there is core2 in the SKU
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FusaTestNumCpu3Idi, ///<Check core3 IDI path, valid if there is core3 in the SKU
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FusaTestNumCpu4Idi, ///<Check core4 IDI path, valid if there is core4 in the SKU
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FusaTestNumCpu5Idi, ///<Check core5 IDI path, valid if there is core5 in the SKU
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FusaTestNumCpu6Idi, ///<Check core6 IDI path, valid if there is core6 in the SKU
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FusaTestNumCpu7Idi, ///<Check core7 IDI path, valid if there is core7 in the SKU
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FusaTestNumCpu0Mbist, ///<Check core0 Mbist, valid if there is core0 in the SKU
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FusaTestNumCpu1Mbist, ///<Check core1 Mbist, valid if there is core1 in the SKU
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FusaTestNumCpu2Mbist, ///<Check core2 Mbist, valid if there is core2 in the SKU
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FusaTestNumCpu3Mbist, ///<Check core3 Mbist, valid if there is core3 in the SKU
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FusaTestNumCpu4Mbist, ///<Check core4 Mbist, valid if there is core4 in the SKU
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FusaTestNumCpu5Mbist, ///<Check core5 Mbist, valid if there is core5 in the SKU
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FusaTestNumCpu6Mbist, ///<Check core6 Mbist, valid if there is core6 in the SKU
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FusaTestNumCpu7Mbist, ///<Check core7 Mbist, valid if there is core7 in the SKU
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FusaTestNumCboSlice0Ingress, ///<Check CBO0 ingress path, valid if there is core0 in the SKU
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FusaTestNumCboSlice1Ingress, ///<Check CBO1 ingress path, valid if there is core1 in the SKU
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FusaTestNumCboSlice2Ingress, ///<Check CBO2 ingress path, valid if there is core2 in the SKU
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FusaTestNumCboSlice3Ingress, ///<Check CBO3 ingress path, valid if there is core3 in the SKU
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FusaTestNumCboSlice4Ingress, ///<Check CBO4 ingress path, valid if there is core4 in the SKU
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FusaTestNumCboSlice5Ingress, ///<Check CBO5 ingress path, valid if there is core5 in the SKU
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FusaTestNumCboSlice6Ingress, ///<Check CBO6 ingress path, valid if there is core6 in the SKU
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FusaTestNumCboSlice7Ingress, ///<Check CBO7 ingress path, valid if there is core7 in the SKU
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FusaTestNumOpiLinkIosfData, ///<Check OPI Link path
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FusaTestNumDip, ///<Check DIP path
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FusaTestNumIop, ///<Check IOP path
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FusaTestNumTotal ///<Totak CTC groups count
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} FUSA_TEST_NUMBER;
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/**
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Fusa test result HOB structure
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**/
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typedef struct {
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UINT32 Version;
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FUSA_TEST_RESULT FspDxCtcTestResult[FusaTestNumTotal];
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} FUSA_INFO_HOB;
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#pragma pack (pop)
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#endif // _FUSA_INFO_HOB_H_
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