Tim Crawford 4618f2b0ed Update coreboot to 4.22
As part of this, the RPL boards now use the client FSP release from
Intel's public repo [1].

[1]: https://github.com/intel/fsp

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-05 11:02:11 -07:00

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CONFIG_VENDOR_SYSTEM76=y
CONFIG_BOARD_SYSTEM76_ADDW3=y
CONFIG_CCACHE=y
CONFIG_CONSOLE_SERIAL=n
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
CONFIG_HAVE_GBE_BIN=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
CONFIG_PAYLOAD_ELF=y
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
#CONFIG_CONSOLE_SYSTEM76_EC=y