5b4dbd9c53
Rebase on upstream coreboot/coreboot@5622666396. The is slightly ahead of the 4.15 tag, but includes all of our boards and most Intel SoC changes we need. We are now ~10 patches on top of upstream. The following boards have been upstreamed: - addw1 - addw2 - bonw14 - darp5 - darp6 - darp7 - galp2 - galp3-b - galp3-c - galp4 - galp5 - gaze14 - gaze15 - gaze16 - lemp10 - oryp5 - oryp6 - oryp7 - oryp8 The following drivers have been upstreamed: - tas5825m microcode: - TGL-U boards have been updated to rev 0x9a from private repo - TGL-H boards have been updated to rev 0x3c from private repo - Remaining boards changed to use blobs from public repo FSP: - TGL changed to use A.0.51.31 from public repo Signed-off-by: Tim Crawford <tcrawford@system76.com>
20 lines
593 B
Plaintext
20 lines
593 B
Plaintext
CONFIG_VENDOR_SYSTEM76=y
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CONFIG_BOARD_SYSTEM76_GALP3_C=y
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CONFIG_CCACHE=y
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CONFIG_CONSOLE_SERIAL=n
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CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
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CONFIG_HAVE_IFD_BIN=y
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CONFIG_HAVE_ME_BIN=y
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CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
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CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
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CONFIG_PAYLOAD_ELF=y
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CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
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CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
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CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
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CONFIG_POST_IO=n
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CONFIG_RUN_FSP_GOP=y
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CONFIG_SMMSTORE=y
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CONFIG_USE_OPTION_TABLE=y
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CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
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#CONFIG_CONSOLE_SYSTEM76_EC=y
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