mb/up/squared: Make mini PCIe port mode configurable
Add config choice menu and pad configuration to put Mini PCIe port into mSATA mode. The vendor firmware's "Chipset->Mini PCIe / mSATA Switch" option has been used together with the output of inteltool and intel2pm to deduce the exact pad configuration. Note: the vendor firmware does not autodetect the mode, and the default setting for the port is "Mini PCIe". Tested with Kingston SUV500MS120G mSATA SSD. Change-Id: Ic2da1dd4252ebb5e373bc65418e321f566d4c10f Signed-off-by: Reto Buerki <reet@codelabs.ch> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@@ -76,4 +76,22 @@ config CONSOLE_POST
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bool
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default y
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choice
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prompt "Mini PCIe port mode"
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default MINI_PCIE_MODE_PCIE
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help
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Choose the operating mode of the mini PCIe port.
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config MINI_PCIE_MODE_PCIE
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bool "PCIe"
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help
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Select this option to leave the mini PCIe port in PCIe mode. This is
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also the default mode of the vendor firmware.
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config MINI_PCIE_MODE_MSATA
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bool "mSATA"
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help
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Select this option to put the mini PCIe port into mSATA mode.
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endchoice
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endif
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@@ -777,4 +777,14 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD),
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};
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/*
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* Pad configuration to put MiniPCIe port into mSATA mode.
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*/
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static const struct pad_config msata_mode_gpio_table[] = {
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/* ------- GPIO Group North-West ------- */
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/* GPIO_213 - GPIO */
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PAD_CFG_TERM_GPO(GPIO_213, 0, UP_20K, DEEP),
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};
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#endif /* CFG_GPIO_H */
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@@ -103,6 +103,8 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
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FSP_M_CONFIG *config = &memupd->FspmConfig;
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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if (CONFIG(MINI_PCIE_MODE_MSATA))
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gpio_configure_pads(msata_mode_gpio_table, ARRAY_SIZE(msata_mode_gpio_table));
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uint8_t memory_skuid = get_memory_skuid();
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printk(BIOS_DEBUG, "MAINBOARD: Found memory SKU ID: 0x%02x\n", memory_skuid);
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