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mb/google/drallion: Make use of chipset dt reference names

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Replace the PCI numbers with the reference names from the chipset
devicetree. Also, remove their comments since they are superfluous now.

Change-Id: Ib873854954e44b3ea370c2574da5db9792a446e9
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82155
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2024-05-02 02:34:08 +02:00 committed by Felix Held
parent aa37528107
commit 052b92dd49
1 changed files with 24 additions and 24 deletions
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48
src/mainboard/google/drallion/variants/drallion/devicetree.cb
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@ -217,7 +217,7 @@ chip soc/intel/cannonlake
register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_4]" = "0"
device domain 0 on device domain 0 on
device pci 02.0 on device ref igpu on
chip drivers/gfx/generic chip drivers/gfx/generic
register "device_count" = "1" register "device_count" = "1"
register "device[0].name" = ""LCD0"" register "device[0].name" = ""LCD0""
@ -231,16 +231,16 @@ chip soc/intel/cannonlake
register "device[0].privacy.disable_function" = ""\\_SB.PCI0.LPCB.EC0.DPVX"" register "device[0].privacy.disable_function" = ""\\_SB.PCI0.LPCB.EC0.DPVX""
device generic 0 on end device generic 0 on end
end end
end # Integrated Graphics Device end
device pci 04.0 on end # SA Thermal device device ref dptf on end
device pci 12.0 on end # Thermal Subsystem device ref thermal on end
device pci 13.0 on # Integrated Sensor Hub device ref ish on
chip drivers/intel/ish chip drivers/intel/ish
register "firmware_name" = ""drallion_ish.bin"" register "firmware_name" = ""drallion_ish.bin""
device generic 0 on end device generic 0 on end
end end
end end
device pci 14.0 on device ref xhci on
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""Root Hub"" register "desc" = ""Root Hub""
register "type" = "UPC_TYPE_HUB" register "type" = "UPC_TYPE_HUB"
@ -316,14 +316,14 @@ chip soc/intel/cannonlake
end end
end end
end end
end # USB xHCI end
device pci 14.3 on device ref cnvi_wifi on
chip drivers/wifi/generic chip drivers/wifi/generic
register "wake" = "PME_B0_EN_BIT" register "wake" = "PME_B0_EN_BIT"
device generic 0 on end device generic 0 on end
end end
end # CNVi wifi end
device pci 15.0 on device ref i2c0 on
chip drivers/i2c/hid chip drivers/i2c/hid
register "generic.hid" = ""WCOM48E2"" register "generic.hid" = ""WCOM48E2""
register "generic.desc" = ""Wacom Touchscreen"" register "generic.desc" = ""Wacom Touchscreen""
@ -383,8 +383,8 @@ chip soc/intel/cannonlake
register "device_present_gpio_invert" = "1" register "device_present_gpio_invert" = "1"
device i2c 34 on end device i2c 34 on end
end end
end # I2C #0 end
device pci 15.1 on device ref i2c1 on
chip drivers/i2c/generic chip drivers/i2c/generic
register "hid" = ""ELAN0000"" register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad"" register "desc" = ""ELAN Touchpad""
@ -399,29 +399,29 @@ chip soc/intel/cannonlake
register "detect" = "1" register "detect" = "1"
device i2c 15 on end device i2c 15 on end
end end
end # I2C #1 end
device pci 19.0 on device ref i2c4 on
chip drivers/i2c/tpm chip drivers/i2c/tpm
register "hid" = ""GOOG0005"" register "hid" = ""GOOG0005""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D18_IRQ)" register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D18_IRQ)"
device i2c 50 on end device i2c 50 on end
end end
end # I2C #4 end
device pci 1d.0 on device ref pcie_rp9 on
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X" smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
register "PcieRpSlotImplemented[8]" = "1" register "PcieRpSlotImplemented[8]" = "1"
end # PCI Express Port 9 end
device pci 1d.4 on device ref pcie_rp13 on
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X" smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
register "PcieRpSlotImplemented[12]" = "1" register "PcieRpSlotImplemented[12]" = "1"
end # PCI Express Port 13 (x4) end
device pci 1e.0 on end # UART #0 device ref uart0 on end
device pci 1f.0 on device ref lpc_espi on
chip ec/google/wilco chip ec/google/wilco
device pnp 0c09.0 on end device pnp 0c09.0 on end
end end
end # LPC/eSPI end
device pci 1f.3 on end # Intel HDA device ref hda on end
device pci 1f.4 on end # SMBus device ref smbus on end
end end
end end