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cpu/intel/speedstep: Fix the PNOT ACPI method

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The PNOT method never notifies the CPU to update it's _CST methods due
to reliance on inexisting variable (PDCx).

Add a method in the speedstep ssdt generator to notify all available
CPU nodes and hook this up in this file.

The cpu.asl file is moved to cpu/intel/speedstep/acpi since it now
relies on code generated in the speedstep ssdt generator. CPUs not
using the speedstep code never included this PNOT method so this is
a logical place for this code to be.

Change-Id: Ie2ba5e07b401d6f7c80c31f2bfcd9ef3ac0c1ad1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Arthur Heymans
2018-01-06 18:40:23 +01:00
committed by Martin Roth
parent 30bba281b9
commit 0a4e0fd913
17 changed files with 32 additions and 37 deletions
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13
src/cpu/intel/speedstep/acpi.c
View File

@ -23,6 +23,7 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include <device/device.h>
#include <string.h>
static int determine_total_number_of_cores(void)
{
@ -164,4 +165,16 @@ void generate_cpu_entries(device_t device)
/* PPKG is usually used for thermal management
of the first and only package. */
acpigen_write_processor_package("PPKG", 0, cores_per_package);
/* Add a method to notify processor nodes */
acpigen_write_method("\\_PR.CNOT", 1);
for (coreID = 0; coreID < cores_per_package; coreID++) {
char buffer[DEVICE_PATH_MAX];
snprintf(buffer, sizeof(buffer), "\\_PR.CP%c%c",
'0' + coreID / 10, '0' + coreID % 10);
acpigen_emit_byte(NOTIFY_OP);
acpigen_emit_namestring(buffer);
acpigen_emit_byte(ARG0_OP);
}
acpigen_pop_len();
}

31
src/cpu/intel/speedstep/acpi/cpu.asl Normal file
View File

@ -0,0 +1,31 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* These come from the dynamically created CPU SSDT */
External (\_PR.CNOT, MethodObj)
External (\_PR_.CP00, DeviceObj)
External (\_PR_.CP00._PPC)
External (\_PR_.CP01._PPC)
Method (PNOT)
{
If (MPEN) {
\_PR.CNOT (0x80) // _PPC
Sleep(100)
\_PR.CNOT (0x81) // _CST
} Else { // UP
Notify (\_PR_.CP00, 0x80)
Sleep(0x64)
Notify(\_PR_.CP00, 0x81)
}
}