sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default

Browse Source 
Since all mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, make it the
default by changing its enum value to 0 and remove its configuration
from all related devicetrees.

If `common_soc_config.chipset_lockdown` is not configured with
something else in the devicetree, then `CHIPSET_LOCKDOWN_COREBOOT`
is used.

Also, add a release note for the upcoming 4.15 release.

Change-Id: I369f01d3da2e901e2fb57f2c83bd07380f3946a6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Felix Singer
2021-08-13 08:31:52 +02:00
committed by Michael Niewöhner
parent 621ae7c701
commit 0dcdb217cf
60 changed files with 9 additions and 162 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/releases/coreboot-4.15-relnotes.md
View File

@@ -19,4 +19,11 @@ By using newer coreboot features like board variants and override devicetrees,
lots of code can now be shared. This should ease maintenance and also make it
easier for newcomers to add support for even more mainboards.
### Changed default setting for Intel chipset lockdown
Previously, the default behaviour for Intel chipset lockdown was to let the FSP
do it. Since all related mainboards used the coreboot mechanisms for chipset
lockdown, the default behaviour was changed to that.
### Add significant changes here