mb/amd/birman: Split FMD for phoenix/glinda

Glinda and Phoenix have different requirements, so split the birman FMD
files to better apply to each SoC.

TEST='./util/scripts/testsoc -K PHOENIX -K GLINDA' successfully builds
all boards

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Ia2dbaeb8af04fb1d1224c397d728929c50800dfe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

src/mainboard/amd/birman/Kconfig

@@ -16,8 +16,10 @@ config BOARD_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
 
 config FMDFILE
-	default "src/mainboard/amd/birman/chromeos.fmd" if CHROMEOS
+	default "src/mainboard/amd/birman/chromeos_glinda.fmd" if CHROMEOS && BOARD_AMD_BIRMAN_GLINDA
-	default "src/mainboard/amd/birman/board.fmd"
+	default "src/mainboard/amd/birman/chromeos_phoenix.fmd" if CHROMEOS && BOARD_AMD_BIRMAN_PHOENIX
+	default "src/mainboard/amd/birman/board_glinda.fmd" if BOARD_AMD_BIRMAN_GLINDA
+	default "src/mainboard/amd/birman/board_phoenix.fmd"
 
 config MAINBOARD_DIR
 	default "amd/birman"
@@ -54,7 +56,7 @@ config BIRMAN_MCHP_FW_FILE
 config BIRMAN_MCHP_FW_OFFSET
 	hex
 	depends on BIRMAN_HAVE_MCHP_FW
-	default 0xB80000
+	default 0xF00000
 	help
 	  The EC firmware blob defaults to the 4MByte offset of the firmware
 	  image. If this offset needs to change, a new signature block must be

src/mainboard/amd/birman/board_phoenix.fmd

@@ -0,0 +1,8 @@
+FLASH@0xFF000000 16M {
+	BIOS {
+		EC 4K
+		FMAP 4K
+		COREBOOT(CBFS)
+		RW_MRC_CACHE 120K
+	}
+}

src/mainboard/amd/birman/chromeos_phoenix.fmd

@@ -0,0 +1,34 @@
+FLASH@0xFF000000 16M {
+	SI_BIOS {
+		WP_RO 8M {
+			EC 4K
+			RO_VPD(PRESERVE) 16K
+			RO_SECTION {
+				FMAP 2K
+				RO_FRID 64
+				COREBOOT(CBFS)
+				GBB 448K
+			}
+		}
+		RW_SECTION_A 3M {
+			VBLOCK_A 8K
+			FW_MAIN_A(CBFS)
+			RW_FWID_A 256
+		}
+		RW_SECTION_B 3M {
+			VBLOCK_B 8K
+			FW_MAIN_B(CBFS)
+			RW_FWID_B 256
+		}
+		RW_ELOG(PRESERVE) 4K
+		RW_SHARED 16K {
+			SHARED_DATA 8K
+			VBLOCK_DEV 8K
+		}
+		RW_VPD(PRESERVE) 8K
+		RW_NVRAM(PRESERVE) 20K
+		SMMSTORE(PRESERVE) 64K
+		RW_LEGACY(CBFS)
+		RW_MRC_CACHE(PRESERVE) 120K
+	}
+}