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dram/ddr5: Use the same naming convention as DDR{2,3,4}

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Change-Id: I2cc38926b56315d4a828311917ff58051b34b777
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes Haouas 2024-05-06 10:08:51 +02:00
parent 239347a909
commit 0f45e17f56
3 changed files with 25 additions and 25 deletions
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16
src/device/dram/spd.c
View File

@ -135,26 +135,26 @@ static void convert_ddr4_module_type_to_spd_info(enum spd_dimm_type_ddr4 module_
}
}
static void convert_ddr5_module_type_to_spd_info(enum ddr5_module_type module_type,
static void convert_ddr5_module_type_to_spd_info(enum spd_dimm_type_ddr5 module_type,
struct spd_info *info)
{
switch (module_type) {
case DDR5_SPD_RDIMM:
case DDR5_SPD_MINI_RDIMM:
case SPD_DDR5_DIMM_TYPE_RDIMM:
case SPD_DDR5_DIMM_TYPE_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break;
case DDR5_SPD_UDIMM:
case DDR5_SPD_MINI_UDIMM:
case SPD_DDR5_DIMM_TYPE_UDIMM:
case SPD_DDR5_DIMM_TYPE_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break;
case DDR5_SPD_SODIMM:
case DDR5_SPD_72B_SO_UDIMM:
case SPD_DDR5_DIMM_TYPE_SODIMM:
case SPD_DDR5_DIMM_TYPE_72B_SO_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
case DDR5_SPD_2DPC:
case SPD_DDR5_DIMM_TYPE_2DPC:
info->form_factor = MEMORY_FORMFACTOR_PROPRIETARY_CARD;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;

28
src/include/device/dram/ddr5.h
View File

@ -15,20 +15,20 @@
/** Maximum SPD size supported */
#define SPD_SIZE_MAX_DDR5 1024
enum ddr5_module_type {
DDR5_SPD_RDIMM = 0x01,
DDR5_SPD_UDIMM = 0x02,
DDR5_SPD_SODIMM = 0x03,
DDR5_SPD_LRDIMM = 0x04,
DDR5_SPD_MINI_RDIMM = 0x05,
DDR5_SPD_MINI_UDIMM = 0x06,
DDR5_SPD_72B_SO_UDIMM = 0x08,
DDR5_SPD_72B_SO_RDIMM = 0x09,
DDR5_SPD_SOLDERED_DOWN = 0x0b,
DDR5_SPD_16B_SO_DIMM = 0x0c,
DDR5_SPD_32B_SO_RDIMM = 0x0d,
DDR5_SPD_1DPC = 0x0e,
DDR5_SPD_2DPC = 0x0f,
enum spd_dimm_type_ddr5 {
SPD_DDR5_DIMM_TYPE_RDIMM = 0x01,
SPD_DDR5_DIMM_TYPE_UDIMM = 0x02,
SPD_DDR5_DIMM_TYPE_SODIMM = 0x03,
SPD_DDR5_DIMM_TYPE_LRDIMM = 0x04,
SPD_DDR5_DIMM_TYPE_MINI_RDIMM = 0x05,
SPD_DDR5_DIMM_TYPE_MINI_UDIMM = 0x06,
SPD_DDR5_DIMM_TYPE_72B_SO_UDIMM = 0x08,
SPD_DDR5_DIMM_TYPE_72B_SO_RDIMM = 0x09,
SPD_DDR5_DIMM_TYPE_SOLDERED_DOWN = 0x0b,
SPD_DDR5_DIMM_TYPE_16B_SO_DIMM = 0x0c,
SPD_DDR5_DIMM_TYPE_32B_SO_RDIMM = 0x0d,
SPD_DDR5_DIMM_TYPE_1DPC = 0x0e,
SPD_DDR5_DIMM_TYPE_2DPC = 0x0f,
};
/**

6
tests/lib/dimm_info_util-test.c
View File

@ -165,9 +165,9 @@ static void test_smbios_form_factor_to_spd_mod_type(void **state)
.expected_module_type = SPD_DDR4_DIMM_TYPE_SO_DIMM,
},
{.memory_type = MEMORY_TYPE_DDR5,
.udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM},
.rdimm_allowed = {DDR5_SPD_RDIMM, DDR5_SPD_MINI_RDIMM},
.expected_module_type = DDR5_SPD_SODIMM},
.udimm_allowed = {SPD_DDR5_DIMM_TYPE_UDIMM, SPD_DDR5_DIMM_TYPE_MINI_UDIMM},
.rdimm_allowed = {SPD_DDR5_DIMM_TYPE_RDIMM, SPD_DDR5_DIMM_TYPE_MINI_RDIMM},
.expected_module_type = SPD_DDR5_DIMM_TYPE_SODIMM},
};
/* Test for DDRx DIMM Modules */