soc/intel/xeon_sp: Move proximity domain setting up
Move proximity domain setting up to ahead of attach_iio_stacks() so that proximity domain info could be ready before attach_iio_stacks()/create_xeonsp_domains(). For example in SPR, is_iio_cxl_stack_res() refers to proximity domain info, and it will be called in create_xeonsp_domains(). TEST=Build and boot on intel/archercity No significant boot log difference except for proximity domain dump info display are moved ahead (with correct contents). Change-Id: I594f0ec0c23e3b62c3bdd917ebf6e45be6e4069e Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82267 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -12,6 +12,7 @@
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#include <intelblocks/p2sb.h>
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#include <soc/acpi.h>
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#include <soc/chip_common.h>
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#include <soc/numa.h>
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#include <soc/pch.h>
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#include <soc/soc_pch.h>
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#include <soc/ramstage.h>
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@@ -167,6 +168,7 @@ static void chip_init(void *data)
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printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n");
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fsp_silicon_init();
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setup_pds();
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attach_iio_stacks();
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override_hpet_ioapic_bdf();
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@@ -4,6 +4,7 @@
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#include <intelblocks/pmclib.h>
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#include <soc/pm.h>
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#include <soc/chip_common.h>
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#include <soc/numa.h>
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#include <soc/ramstage.h>
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#include "chip.h"
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@@ -38,6 +39,7 @@ static void chip_init(void *data)
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printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n");
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fsp_silicon_init();
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setup_pds();
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attach_iio_stacks();
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pch_enable_ioapic();
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@@ -57,9 +57,7 @@ struct proximity_domains {
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extern struct proximity_domains pds;
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void dump_pds(void);
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void fill_pds(void);
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void fill_pd_distances(void);
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void setup_pds(void);
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/*
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* Return the total size of memory regions in generic initiator affinity
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@@ -11,7 +11,7 @@
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#include <soc/util.h>
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#include <types.h>
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void dump_pds(void)
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static void dump_pds(void)
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{
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printk(BIOS_DEBUG, "====== Proximity Domain Dump ======\n");
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printk(BIOS_DEBUG, "number of proximity domains: %d\n", pds.num_pds);
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@@ -25,7 +25,7 @@ void dump_pds(void)
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}
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}
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void fill_pds(void)
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static void fill_pds(void)
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{
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uint8_t num_sockets = soc_get_num_cpus();
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uint8_t num_cxlnodes = get_cxl_node_count();
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@@ -151,7 +151,7 @@ uint32_t memory_to_pd(const struct SystemMemoryMapElement *mem)
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#define PD_DISTANCE_MAX 0xFF
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#define PD_DISTANCE_IO_EXTRA 0x01
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void fill_pd_distances(void)
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static void fill_pd_distances(void)
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{
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for (int i = 0; i < pds.num_pds; i++) {
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for (int j = 0; j < pds.num_pds; j++) {
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@@ -173,3 +173,10 @@ void fill_pd_distances(void)
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}
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}
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}
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void setup_pds(void)
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{
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fill_pds();
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fill_pd_distances();
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dump_pds();
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}
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@@ -7,6 +7,7 @@
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#include <intelblocks/acpi.h>
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#include <soc/acpi.h>
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#include <soc/chip_common.h>
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#include <soc/numa.h>
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#include <soc/pch.h>
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#include <soc/soc_pch.h>
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#include <soc/ramstage.h>
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@@ -42,6 +43,7 @@ static void soc_init(void *data)
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printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n");
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fsp_silicon_init();
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setup_pds();
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attach_iio_stacks();
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override_hpet_ioapic_bdf();
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@@ -125,6 +125,7 @@ static void chip_init(void *data)
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printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n");
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fsp_silicon_init();
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setup_pds();
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attach_iio_stacks();
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override_hpet_ioapic_bdf();
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@@ -90,6 +90,9 @@ bool is_ioat_iio_stack_res(const STACK_RES *res)
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*/
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bool is_iio_cxl_stack_res(const STACK_RES *res)
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{
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/* pds should be setup ahead of this call */
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assert(pds.num_pds);
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for (uint8_t i = 0; i < pds.num_pds; i++) {
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if (pds.pds[i].pd_type == PD_TYPE_PROCESSOR)
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continue;
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@@ -336,15 +336,6 @@ static void mmapvtd_read_resources(struct device *dev)
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{
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int index = 0;
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static bool once;
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if (!once) {
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/* Construct NUMA data structure. This is needed for CXL. */
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fill_pds();
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fill_pd_distances();
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dump_pds();
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once = true;
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}
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/* Read standard PCI resources. */
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pci_dev_read_resources(dev);
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