pcengines/apu2: Add SKU in SMBIOS
Installed memory only, PCB revision cannot be detected. Change-Id: Ib6224018db3de4a7ddd9e6f7f30edc438c3f0702 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18153 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@@ -19,6 +19,7 @@ romstage-y += gpio_ftns.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += OemCustomize.c
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ramstage-y += gpio_ftns.c
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## DIMM SPD for on-board memory
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SPD_BIN = $(obj)/spd.bin
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@@ -28,9 +28,11 @@
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#include <northbridge/amd/pi/00730F01/pci_devs.h>
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#include <southbridge/amd/common/amd_pci_util.h>
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#include <superio/nuvoton/nct5104d/nct5104d.h>
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#include <smbios.h>
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#include <string.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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#include "gpio_ftns.h"
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#define SPD_SIZE 128
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#define PM_RTC_CONTROL 0x56
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@@ -188,6 +190,22 @@ static void mainboard_enable(device_t dev)
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pirq_setup();
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}
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/*
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* We will stuff the memory size into the smbios sku location.
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*/
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const char *smbios_mainboard_sku(void)
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{
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static char sku[5];
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if (sku[0] != 0)
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return sku;
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if (!get_spd_offset())
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snprintf(sku, sizeof(sku), "2 GB");
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else
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snprintf(sku, sizeof(sku), "4 GB");
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return sku;
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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