cml-u: sync with lemp9, enable i2c-hid

This commit is contained in:
Jeremy Soller
2020-06-03 15:39:47 -06:00
parent ba59168f06
commit 15eec6ad44
4 changed files with 48 additions and 13 deletions

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@@ -2,8 +2,8 @@ if BOARD_SYSTEM76_GALP4 || BOARD_SYSTEM76_DARP6
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select ADD_FSP_BINARIES
select BOARD_ROMSIZE_KB_16384 select BOARD_ROMSIZE_KB_16384
select DRIVERS_I2C_HID
select EC_ACPI select EC_ACPI
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
@@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SPD_READ_BY_WORD select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select USE_BLOBS
select USE_OPTION_TABLE select USE_OPTION_TABLE
select USE_LEGACY_8254_TIMER # Fix failure to boot GRUB select USE_LEGACY_8254_TIMER # Fix failure to boot GRUB

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@@ -116,14 +116,18 @@ Device (EC0)
Method (_Q11, 0, NotSerialized) // Brightness Down Method (_Q11, 0, NotSerialized) // Brightness Down
{ {
Debug = "EC: Brightness Down" Debug = "EC: Brightness Down"
if (^^^^HIDD.HRDY) {
^^^^HIDD.HPEM (20) ^^^^HIDD.HPEM (20)
} }
}
Method (_Q12, 0, NotSerialized) // Brightness Up Method (_Q12, 0, NotSerialized) // Brightness Up
{ {
Debug = "EC: Brightness Up" Debug = "EC: Brightness Up"
if (^^^^HIDD.HRDY) {
^^^^HIDD.HPEM (19) ^^^^HIDD.HPEM (19)
} }
}
Method (_Q13, 0, NotSerialized) // Camera Toggle Method (_Q13, 0, NotSerialized) // Camera Toggle
{ {
@@ -133,10 +137,10 @@ Device (EC0)
Method (_Q14, 0, NotSerialized) // Airplane Mode Method (_Q14, 0, NotSerialized) // Airplane Mode
{ {
Debug = "EC: Airplane Mode" Debug = "EC: Airplane Mode"
// Only send HIDD message when hardware airplane mode not in use if (^^^^HIDD.HRDY) {
If (ECOS == 2) {
^^^^HIDD.HPEM (8) ^^^^HIDD.HPEM (8)
} }
// TODO: hardware airplane mode
} }
Method (_Q15, 0, NotSerialized) // Suspend Button Method (_Q15, 0, NotSerialized) // Suspend Button

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@@ -2,6 +2,11 @@ chip soc/intel/cannonlake
# Lock Down # Lock Down
register "common_soc_config" = "{ register "common_soc_config" = "{
.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 80,
.fall_time_ns = 110,
},
}" }"
# Send an extra VR mailbox command for the PS4 exit issue # Send an extra VR mailbox command for the PS4 exit issue
@@ -19,8 +24,10 @@ chip soc/intel/cannonlake
# CPU (soc/intel/cannonlake/cpu.c) # CPU (soc/intel/cannonlake/cpu.c)
# Power limit # Power limit
register "tdp_pl1_override" = "15" register "power_limits_config" = "{
register "tdp_pl2_override" = "25" .tdp_pl1_override = 20,
.tdp_pl2_override = 30,
}"
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
@@ -33,6 +40,22 @@ chip soc/intel/cannonlake
#register "enable_c6dram" = "1" #register "enable_c6dram" = "1"
# FSP Silicon (soc/intel/cannonlake/fsp_params.c) # FSP Silicon (soc/intel/cannonlake/fsp_params.c)
# Serial I/O
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
[PchSerialIoIndexSPI0] = PchSerialIoDisabled,
[PchSerialIoIndexSPI1] = PchSerialIoDisabled,
[PchSerialIoIndexSPI2] = PchSerialIoDisabled,
[PchSerialIoIndexUART0] = PchSerialIoDisabled,
[PchSerialIoIndexUART1] = PchSerialIoDisabled,
[PchSerialIoIndexUART2] = PchSerialIoPci,
}"
# SATA # SATA
register "SataMode" = "Sata_AHCI" register "SataMode" = "Sata_AHCI"
register "SataSalpSupport" = "0" register "SataSalpSupport" = "0"
@@ -127,7 +150,7 @@ chip soc/intel/cannonlake
register "PcieClkSrcClkReq[5]" = "5" register "PcieClkSrcClkReq[5]" = "5"
# Misc # Misc
register "Device4Enable" = "0" register "Device4Enable" = "1"
register "HeciEnabled" = "0" register "HeciEnabled" = "0"
register "Heci3Enabled" = "0" register "Heci3Enabled" = "0"
register "AcousticNoiseMitigation" = "1" register "AcousticNoiseMitigation" = "1"
@@ -183,7 +206,7 @@ chip soc/intel/cannonlake
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 off end # SA Thermal device device pci 04.0 on end # SA Thermal device
device pci 12.0 on end # Thermal Subsystem device pci 12.0 on end # Thermal Subsystem
device pci 12.5 off end # UFS SCS device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2 device pci 12.6 off end # GSPI #2
@@ -195,7 +218,16 @@ chip soc/intel/cannonlake
device pci 14.3 on end # CNVi wifi device pci 14.3 on end # CNVi wifi
#end #end
device pci 14.5 off end # SDCard device pci 14.5 off end # SDCard
device pci 15.0 off end # I2C #0 device pci 15.0 on
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""Synaptics Touchpad""
register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
end # I2C #0
device pci 15.1 off end # I2C #1 device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2 device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3 device pci 15.3 off end # I2C #3

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@@ -250,8 +250,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
// NC // NC
PAD_CFG_NC(GPP_C22), PAD_CFG_NC(GPP_C22),
// NC // TP_ATTN#
PAD_CFG_NC(GPP_C23), PAD_CFG_GPI_APIC(GPP_C23, NONE, PLTRST, EDGE_SINGLE, INVERT),
// GPP_D // GPP_D
// SPI1 // SPI1