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mainboard/*: Drop USB power control bits in GNVS

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There is no platform-level implementation for USB port power management
in various sleepstates. The mainboards changed here never evaluate the
set GNVS variables S3U0, S3U1, S5U0 and S5U1 in ASL or in their SMI
handlers.

Change-Id: Ia1bc5969804a7346caac4ae93336efd9f0240c87
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
This commit is contained in:
Kyösti Mälkki 2023-04-29 07:42:45 +03:00
parent 96581b3217
commit 167ccc7e65
9 changed files with 0 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/apple/macbookair4_2/gnvs.c
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@ -5,14 +5,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Disable USB ports in S3 by default */
gnvs->s3u0 = 0;
gnvs->s3u1 = 0;
/* Disable USB ports in S5 by default */
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
/* the lid is open by default. */
gnvs->lids = 1;

8
src/mainboard/bostentech/gbyt4/acpi_tables.c
View File

@ -7,14 +7,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
gnvs->s3u1 = 1;
/* Disable USB ports in S5 */
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
/* TPM not present */
gnvs->tpmp = 0;

8
src/mainboard/facebook/fbg1701/acpi_tables.c
View File

@ -7,14 +7,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
gnvs->s3u1 = 1;
/* Disable USB ports in S5 */
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
/* PMIC is configured in I2C1, hide it for the OS */
struct device_nvs *dev_nvs = acpi_get_device_nvs();
dev_nvs->lpss_en[LPSS_NVS_I2C2] = 0;

8
src/mainboard/google/beltino/acpi_tables.c
View File

@ -8,14 +8,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
gnvs->s3u1 = 1;
/* Disable USB ports in S5 */
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
/* TPM Present */
gnvs->tpmp = 1;

6
src/mainboard/google/jecht/acpi_tables.c
View File

@ -9,12 +9,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
/* Disable USB ports in S5 */
gnvs->s5u0 = 0;
gnvs->tmps = TEMPERATURE_SENSOR_ID;
gnvs->tcrt = CRITICAL_TEMPERATURE;
gnvs->tpsv = PASSIVE_TEMPERATURE;

11
src/mainboard/intel/baskingridge/acpi_tables.c
View File

@ -9,17 +9,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
gnvs->s3u1 = 1;
/*
* Enable Front USB ports in S5 by default
* to be consistent with back port behavior
*/
gnvs->s5u0 = 1;
gnvs->s5u1 = 1;
/* TPM Present */
gnvs->tpmp = 1;

8
src/mainboard/intel/dcp847ske/acpi_tables.c
View File

@ -6,14 +6,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 by default */
gnvs->s3u0 = 1;
gnvs->s3u1 = 1;
/* Enable USB ports in S5 by default */
gnvs->s5u0 = 1;
gnvs->s5u1 = 1;
gnvs->tcrt = CRITICAL_TEMPERATURE;
gnvs->tpsv = PASSIVE_TEMPERATURE;
}

6
src/mainboard/intel/wtm2/acpi_tables.c
View File

@ -9,12 +9,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
/* Disable USB ports in S5 */
gnvs->s5u0 = 0;
gnvs->tcrt = CRITICAL_TEMPERATURE;
gnvs->tpsv = PASSIVE_TEMPERATURE;
gnvs->tmax = MAX_TEMPERATURE;

8
src/mainboard/portwell/m107/acpi_tables.c
View File

@ -7,14 +7,6 @@
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{
/* Enable USB ports in S3 */
gnvs->s3u0 = 1;
gnvs->s3u1 = 1;
/* Disable USB ports in S5 */
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
/* PMIC is configured in I2C1, hide it for the OS */
struct device_nvs *dev_nvs = acpi_get_device_nvs();
dev_nvs->lpss_en[LPSS_NVS_I2C2] = 0;