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mb/google/{auron,link,slippy}/acpi: Drop EC serial port

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The EC serial port on these devices is not accessible to the end user
and exposing it to the OS via ACPI serves no purpose. Debugging over
the EC serial port (via the servo interface) does not require the
ACPI exist. Drop it since it's not needed and serves no purpose.

TEST=build/boot Win11 on auron/link/slippy, verify Windows Device
Manager no longer shows an unusable COM port.

Change-Id: If453bfca8e094aa06043293bdf91a40c38cc7866
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76793
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: CoolStar <coolstarorganization@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier
2023-07-28 09:13:05 -05:00
committed by Felix Singer
parent 8bd2b5c657
commit 16b6937ea7
3 changed files with 0 additions and 3 deletions
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1
src/mainboard/google/auron/acpi/superio.asl
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@@ -6,7 +6,6 @@
#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard
#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1
/* ACPI code for EC SuperIO functions */
#include <ec/google/chromeec/acpi/superio.asl>

1
src/mainboard/google/link/acpi/superio.asl
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@@ -6,7 +6,6 @@
#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard
#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1
/* ACPI code for EC SuperIO functions */
#include "../../../../ec/google/chromeec/acpi/superio.asl"

1
src/mainboard/google/slippy/acpi/superio.asl
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@@ -6,7 +6,6 @@
#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard
#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1
/* ACPI code for EC SuperIO functions */
#include <ec/google/chromeec/acpi/superio.asl>