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soc/intel/cannonlake: Set correct serirq mode

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Set FSP params PchSirqEnable/PchSirqMode based on board
setting of serirq_mode. Matches implementation on Skylake.

This is a no-change for existing boards since the default
remains SERIRQ_QUIET mode.

Tested on system76 galp3-c, out-of-tree WHL-U board

Change-Id: I9ad4f5a6c7391fc6e813ec1306c708f449a69f59
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31536
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Nathaniel L Desimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Jeremy Soller 2019-02-20 16:39:55 -07:00 committed by Patrick Georgi
parent b6e2afb1ff
commit 1af482c9c9
3 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/soc/intel/cannonlake/chip.h
View File

@ -22,6 +22,7 @@
#include <drivers/i2c/designware/dw_i2c.h>
#include <intelblocks/gpio.h>
#include <intelblocks/gspi.h>
#include <intelblocks/lpc_lib.h>
#include <smbios.h>
#include <stdint.h>
#include <soc/gpio.h>
@ -360,6 +361,8 @@ struct soc_intel_cannonlake_config {
*/
uint8_t SerialIoDevMode[PchSerialIoIndexMAX];
enum serirq_mode serirq_mode;
/* GPIO SD card detect pin */
unsigned int sdcard_cd_gpio;

4
src/soc/intel/cannonlake/fsp_params.c
View File

@ -416,6 +416,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Unlock all GPIO pads */
tconfig->PchUnlockGpioPads = config->PchUnlockGpioPads;
/* Set correct Sirq mode based on config */
params->PchSirqEnable = config->serirq_mode != SERIRQ_OFF;
params->PchSirqMode = config->serirq_mode == SERIRQ_CONTINUOUS;
/*
* GSPI Chip Select parameters
* The GSPI driver assumes that CS0 is the used chip-select line,

7
src/soc/intel/cannonlake/lpc.c
View File

@ -210,6 +210,8 @@ static void pch_misc_init(void)
void lpc_soc_init(struct device *dev)
{
const config_t *config = dev->chip_info;
/* Legacy initialization */
isa_dma_init();
pch_misc_init();
@ -218,10 +220,7 @@ void lpc_soc_init(struct device *dev)
lpc_enable_pci_clk_cntl();
/* Set LPC Serial IRQ mode */
if (CONFIG(SERIRQ_CONTINUOUS_MODE))
lpc_set_serirq_mode(SERIRQ_CONTINUOUS);
else
lpc_set_serirq_mode(SERIRQ_QUIET);
lpc_set_serirq_mode(config->serirq_mode);
/* Interrupt configuration */
pch_enable_ioapic(dev);