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gru: Add USB 2.0 PHY tuning for Kevin

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This patch sets some magic number in magic undocumented registers that
are rumored to make USB 2.0 signal integrity better on Kevin. I don't
see any difference (unfortunately it doesn't solve the problems with
long cables on my board), but I guess it doesn't hurt either way.

BRANCH=None
BUG=chrome-os-partner:56108,chrome-os-partner:54788
TEST=Booted Kevin with USB connected through Servo. Seems to have
roughly the same failure rate as before.

Change-Id: If31fb49f1ed7218b50f24e251e54c9400db72720
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 0c5c8f0f80ea1ebb042bcb91506a6100833e7e84
Original-Change-Id: Ifbd47bf6adb63a2ca5371c0b05c5ec27a0fe3195
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/370900
Original-Reviewed-by: Guenter Roeck <groeck@chromium.org>
Original-Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-on: https://review.coreboot.org/16265
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Julius Werner
2016-08-15 17:58:05 -07:00
committed by Martin Roth
parent a2d4062d42
commit 1c8491c3ab
2 changed files with 10 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
src/mainboard/google/gru/mainboard.c
View File

@@ -158,6 +158,15 @@ static void configure_display(void)
static void setup_usb(void)
{
/* A few magic PHY tuning values that improve eye diagram amplitude
* and make it extra sure we get reliable communication in firmware. */
/* Set max ODT compensation voltage and current tuning reference. */
write32(&rk3399_grf->usbphy0_ctrl[3], 0x0fff02e3);
write32(&rk3399_grf->usbphy1_ctrl[3], 0x0fff02e3);
/* Set max pre-emphasis level, only on Kevin PHY0. */
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN))
write32(&rk3399_grf->usbphy0_ctrl[12], 0xffff00a7);
setup_usb_otg0();
setup_usb_otg1();
}

2
src/soc/rockchip/rk3399/include/soc/grf.h
View File

@@ -73,7 +73,7 @@ struct rk3399_grf_regs {
u32 reserved11[3];
u32 usbphy0_ctrl[26];
u32 reserved12[6];
u32 usbphy1[26];
u32 usbphy1_ctrl[26];
u32 reserved13[0x72f];
u32 soc_con9;
u32 reserved14[0x0a];