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superio/ite/it8728f: Hook up common environment-controller driver

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This replaces the custom environment controller handling in the it8728
driver with the common library.

It also updates the two existing boards with hwm register settings in
their devicetree config so they better match their vendor BIOS fan
control settings.

Change-Id: Idf0c8908ba5ad6ff552b8302bffc638aa9052941
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: https://review.coreboot.org/19293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Tobias Diedrich
2017-04-14 19:45:51 +02:00
committed by Martin Roth
parent 06ef889718
commit 1f064d7551
7 changed files with 48 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb
View File

@@ -58,12 +58,22 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 14.2 on end # HDA 0x4383
device pci 14.3 on # LPC 0x439d
chip superio/ite/it8728f
register hwm_ctl_register = "0xc0"
register hwm_main_ctl_register = "0x33"
register hwm_adc_temp_chan_en_reg = "0x38"
register hwm_fan1_ctl_pwm = "0x00"
register hwm_fan2_ctl_pwm = "0x00"
register hwm_fan3_ctl_pwm = "0x00"
register "TMPIN1" = "THERMAL_RESISTOR"
register "TMPIN2" = "THERMAL_RESISTOR"
register "TMPIN3" = "THERMAL_RESISTOR"
register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
register "FAN1.smart.tmpin" = "1"
register "FAN1.smart.tmp_off" = "0x80" # never
register "FAN1.smart.tmp_start" = "20"
register "FAN1.smart.tmp_full" = "70"
register "FAN1.smart.tmp_delta" = "0"
register "FAN1.smart.smoothing" = "1"
register "FAN1.smart.pwm_start" = "20"
register "FAN1.smart.slope" = "32"
# Enable tacho reading for chassis fan.
register "FAN2.mode" = "FAN_MODE_OFF"
device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0

22
src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb
View File

@@ -58,12 +58,22 @@ chip northbridge/amd/agesa/family15tn/root_complex
device pci 14.2 on end # HDA 0x4383
device pci 14.3 on # LPC 0x439d
chip superio/ite/it8728f
register hwm_ctl_register = "0xc0"
register hwm_main_ctl_register = "0x33"
register hwm_adc_temp_chan_en_reg = "0x38"
register hwm_fan1_ctl_pwm = "0x00"
register hwm_fan2_ctl_pwm = "0x00"
register hwm_fan3_ctl_pwm = "0x00"
register "TMPIN1" = "THERMAL_RESISTOR"
register "TMPIN2" = "THERMAL_RESISTOR"
register "TMPIN3" = "THERMAL_RESISTOR"
register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
register "FAN1.smart.tmpin" = "1"
register "FAN1.smart.tmp_off" = "0x80" # never
register "FAN1.smart.tmp_start" = "20"
register "FAN1.smart.tmp_full" = "70"
register "FAN1.smart.tmp_delta" = "0"
register "FAN1.smart.smoothing" = "1"
register "FAN1.smart.pwm_start" = "20"
register "FAN1.smart.slope" = "32"
# Enable tacho reading for chassis fan.
register "FAN2.mode" = "FAN_MODE_OFF"
device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0

4
src/superio/ite/it8728f/Kconfig
View File

@@ -17,3 +17,7 @@
config SUPERIO_ITE_IT8728F
bool
select SUPERIO_ITE_COMMON_ROMSTAGE
select SUPERIO_ITE_ENV_CTRL
select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG
select SUPERIO_ITE_ENV_CTRL_8BIT_PWM

1
src/superio/ite/it8728f/Makefile.inc
View File

@@ -14,5 +14,4 @@
## GNU General Public License for more details.
##
ramstage-$(CONFIG_SUPERIO_ITE_IT8728F) += it8728f_hwm.c
ramstage-$(CONFIG_SUPERIO_ITE_IT8728F) += superio.c

10
src/superio/ite/it8728f/chip.h
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@@ -17,14 +17,10 @@
#ifndef SUPERIO_ITE_IT8728F_CHIP_H
#define SUPERIO_ITE_IT8728F_CHIP_H
#include <superio/ite/common/env_ctrl_chip.h>
struct superio_ite_it8728f_config {
/* HWM configuration registers */
uint8_t hwm_ctl_register;
uint8_t hwm_main_ctl_register;
uint8_t hwm_adc_temp_chan_en_reg;
uint8_t hwm_fan1_ctl_pwm;
uint8_t hwm_fan2_ctl_pwm;
uint8_t hwm_fan3_ctl_pwm;
struct ite_ec_config ec;
};
#endif /* SUPERIO_ITE_IT8728F_CHIP_H */

71
src/superio/ite/it8728f/it8728f_hwm.c
View File

@@ -1,71 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
#include "chip.h"
#include "it8728f_internal.h"
/*
* FAN controller configuration register index's
*/
#define HWM_MAIN_CTL_REG 0x13 /* default 0x07 */
#define HWM_CTL_REG 0x14 /* default 0x40 */
#define HWM_FAN1_CTL_PWM 0x15 /* default 0x00 */
#define HWM_FAN2_CTL_PWM 0x16 /* default 0x00 */
#define HWM_FAN3_CTL_PWM 0x17 /* default 0x00 */
#define HWM_ADC_TEMP_CHAN_EN_REG 0x51 /* default 0x00 */
void it8728f_hwm_ec_init(struct device *dev)
{
struct superio_ite_it8728f_config *conf = dev->chip_info;
struct resource *res = find_resource(dev, PNP_IDX_IO0);
if (!res) {
printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n");
return;
}
/* I/O port for HWM is at base + 5 */
u16 port = res->base + 5;
printk(BIOS_INFO,
"ITE IT8728F Super I/O HWM: Initializing Hardware Monitor..\n");
printk(BIOS_DEBUG,
"ITE IT8728F Super I/O HWM: Base Address at 0x%x\n", port);
pnp_enter_conf_mode(dev);
pnp_set_logical_device(dev);
/* ITE IT8728F HWM (ordered) programming sequence. */
/* configure fan polarity */
pnp_write_index(port, HWM_CTL_REG, conf->hwm_ctl_register);
/* enable fans 1-3 */
pnp_write_index(port, HWM_MAIN_CTL_REG, conf->hwm_main_ctl_register);
/* enable termistor temps for temp1-temp3 */
pnp_write_index(port, HWM_ADC_TEMP_CHAN_EN_REG, conf->hwm_adc_temp_chan_en_reg);
/* configure which fanX uses which tempY */
pnp_write_index(port, HWM_FAN1_CTL_PWM, conf->hwm_fan1_ctl_pwm);
pnp_write_index(port, HWM_FAN2_CTL_PWM, conf->hwm_fan2_ctl_pwm);
pnp_write_index(port, HWM_FAN3_CTL_PWM, conf->hwm_fan3_ctl_pwm);
pnp_exit_conf_mode(dev);
}

11
src/superio/ite/it8728f/superio.c
View File

@@ -21,6 +21,7 @@
#include <console/console.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include <superio/ite/common/env_ctrl.h>
#include "chip.h"
#include "it8728f.h"
@@ -28,13 +29,19 @@
static void it8728f_init(struct device *dev)
{
const struct superio_ite_it8728f_config *conf = dev->chip_info;
const struct resource *res;
if (!dev->enabled)
return;
switch(dev->path.pnp.device) {
/* TODO: Might potentially need code for HWM or FDC etc. */
/* TODO: Might potentially need code for FDC etc. */
case IT8728F_EC:
it8728f_hwm_ec_init(dev);
res = find_resource(dev, PNP_IDX_IO0);
if (!conf || !res)
break;
ite_ec_init(res->base, &conf->ec);
break;
case IT8728F_KBCK:
set_kbc_ps2_mode();