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tgl mainboards: Move audio related settings into hda device scope

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Change-Id: I1992c20dcdc5e974143690d44ee199d7c3394cfd
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Felix Singer 2024-06-28 00:15:22 +02:00
parent 6ce6a5b369
commit 1f5a221a51
3 changed files with 26 additions and 21 deletions
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5
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
View File

@ -192,9 +192,6 @@ chip soc/intel/tigerlake
# - PM_CFG.SLP_LAN_MIN_ASST_WDTH
register "PchPmPwrCycDur" = "1" # 1s
# HD Audio
register "PchHdaDspEnable" = "1"
# TCSS USB3
register "UsbTcPortEn" = "0x3"
register "TcssXhciEn" = "1"
@ -513,6 +510,8 @@ chip soc/intel/tigerlake
end
end
device ref hda on
register "PchHdaDspEnable" = "1"
chip drivers/sof
register "spkr_tplg" = "max98373"
register "jack_tplg" = "rt5682"

21
src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
View File

@ -104,14 +104,6 @@ chip soc/intel/tigerlake
.tdp_pl4 = 105,
}"
#HD Audio
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkDmicEnable[0]" = "1"
register "PchHdaAudioLinkDmicEnable[1]" = "1"
register "PchHdaAudioLinkSspEnable[0]" = "1"
register "PchHdaAudioLinkSspEnable[2]" = "1"
register "PchHdaAudioLinkSndwEnable[0]" = "1"
# Intel Common SoC Config
register "common_soc_config" = "{
.gspi[1] = {
@ -332,7 +324,18 @@ chip soc/intel/tigerlake
end
end
end
device ref hda on end
device ref hda on
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkDmicEnable" = "{
[0] = 1,
[1] = 1,
}"
register "PchHdaAudioLinkSspEnable" = "{
[0] = 1,
[2] = 1,
}"
register "PchHdaAudioLinkSndwEnable[0]" = "1"
end
device ref smbus on end
device ref fast_spi on end
device ref gbe off end

21
src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
View File

@ -111,14 +111,6 @@ chip soc/intel/tigerlake
.tdp_pl4 = 83,
}"
#HD Audio
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkDmicEnable[0]" = "1"
register "PchHdaAudioLinkDmicEnable[1]" = "1"
register "PchHdaAudioLinkSspEnable[0]" = "1"
register "PchHdaAudioLinkSspEnable[2]" = "1"
register "PchHdaAudioLinkSndwEnable[0]" = "1"
# Intel Common SoC Config
register "common_soc_config" = "{
.gspi[1] = {
@ -337,7 +329,18 @@ chip soc/intel/tigerlake
end
end
end
device ref hda on end
device ref hda on
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkDmicEnable" = "{
[0] = 1,
[1] = 1,
}"
register "PchHdaAudioLinkSspEnable" = "{
[0] = 1,
[2] = 1,
}"
register "PchHdaAudioLinkSndwEnable[0]" = "1"
end
device ref smbus on end
device ref fast_spi on end
device ref gbe off end