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cpu/x86/smm/smihandler: use existing LAPIC ID register definition

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Instead of redefining the register address in smihandler.c, use the
existing definitions from include/cpu/x86/lapic_def.h.

TEST=Timeless build for lenovo/g505s which includes this file in the
build results in identical firmware image.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id22f9b5ce53c7bced6bbcc3f5026d4c793b34f78
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67776
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2022-09-22 12:35:46 +02:00
parent 3c705fa35d
commit 1f5c5da812
1 changed files with 2 additions and 2 deletions
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4
src/cpu/x86/smm/smihandler.c
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@ -8,6 +8,7 @@
#include <cpu/amd/amd64_save_state.h>
#include <cpu/intel/em64t100_save_state.h>
#include <cpu/intel/em64t101_save_state.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/x86/legacy_save_state.h>
#if CONFIG(SPI_FLASH_SMM)
@ -49,10 +50,9 @@ static void smi_release_lock(void)
);
}
#define LAPIC_ID 0xfee00020
static __always_inline unsigned long nodeid(void)
{
return (*((volatile unsigned long *)(LAPIC_ID)) >> 24);
return (*((volatile unsigned long *)(LAPIC_DEFAULT_BASE + LAPIC_ID)) >> 24);
}
void io_trap_handler(int smif)