AMD-8111: Add TINY_BOOTBLOCK support.
Also, add missing license header to amd8111_enable_rom.c, add some more code comments and use PCI IDs from pci_ids.h instead of hardcoding. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
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#include "cpu/amd/dualcore/dualcore.c"
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#include "cpu/amd/car/post_cache_as_ram.c"
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#include "cpu/amd/model_fxx/init_cpus.c"
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#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
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#include "northbridge/amd/amdk8/early_ht.c"
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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@@ -97,7 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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/* Nothing special needs to be done to find bus 0 */
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/* Allow the HT devices to be found */
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enumerate_ht_chain();
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amd8111_enable_rom();
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}
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if (bist == 0)
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@@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
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#include "cpu/amd/dualcore/dualcore.c"
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#include "cpu/amd/car/post_cache_as_ram.c"
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#include "cpu/amd/model_fxx/init_cpus.c"
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#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
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#include "northbridge/amd/amdk8/early_ht.c"
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void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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@@ -97,7 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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/* Nothing special needs to be done to find bus 0 */
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/* Allow the HT devices to be found */
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enumerate_ht_chain();
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amd8111_enable_rom();
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}
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if (bist == 0)
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