soc/qualcomm: move code to common

This commit includes makefile cleanup to exclude common source file
compilation in each stage by using all-y flag.

BUG=b:182963902
TEST=trogdor validated on limozeen

Change-Id: I48464567974a0729c1c6b6157bcce4fac39a8b38
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
Ravi Kumar Bokka 2021-03-31 08:05:24 +05:30 committed by Patrick Georgi
parent 6fce9cd97d
commit 1faaa16a08
7 changed files with 39 additions and 114 deletions

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@ -16,14 +16,10 @@ DECLARE_REGION(dcb)
DECLARE_REGION(pmic)
DECLARE_REGION(limits_cfg)
DECLARE_REGION(aop)
DECLARE_REGION(shrm)
DECLARE_REGION(dram_cpucp)
DECLARE_REGION(modem_id)
DECLARE_REGION(aop_code_ram)
DECLARE_REGION(aop_data_ram)
DECLARE_REGION(dram_wlan)
DECLARE_REGION(dram_wpss)
DECLARE_REGION(dram_modem_wifi_only)
DECLARE_REGION(dram_modem_extra)
DECLARE_REGION(modem_id)
#endif // _SOC_QUALCOMM_SYMBOLS_COMMON_H_

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@ -139,6 +139,24 @@ void qclib_load_and_run(void)
qclib_add_if_table_entry(QCLIB_TE_DDR_TRAINING_DATA,
_ddr_training, REGION_SIZE(ddr_training), 0);
/* Attempt to load PMICCFG Blob */
data_size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg",
_pmic, REGION_SIZE(pmic));
if (!data_size) {
printk(BIOS_ERR, "[%s] /pmiccfg failed\n", __func__);
goto fail;
}
qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, data_size, 0);
/* Attempt to load DCB Blob */
data_size = cbfs_load(CONFIG_CBFS_PREFIX "/dcb",
_dcb, REGION_SIZE(dcb));
if (!data_size) {
printk(BIOS_ERR, "[%s] /dcb failed\n", __func__);
goto fail;
}
qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, data_size, 0);
/* hook for SoC specific binary blob loads */
if (qclib_soc_blob_load()) {
printk(BIOS_ERR, "qclib_soc_blob_load failed\n");

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@ -1,51 +1,27 @@
ifeq ($(CONFIG_SOC_QUALCOMM_QCS405),y)
################################################################################
all-y += clock.c
all-y += spi.c
all-y += ../common/timer.c
all-y += gpio.c
all-y += i2c.c
all-y += qup.c
all-y += blsp.c
all-$(CONFIG_DRIVERS_UART) += uart.c
################################################################################
bootblock-y += bootblock.c
bootblock-y += timer.c
bootblock-y += spi.c
bootblock-y += mmu.c
bootblock-y += gpio.c
bootblock-y += clock.c
bootblock-y += i2c.c
bootblock-y += qup.c
bootblock-y += blsp.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
################################################################################
verstage-y += timer.c
verstage-y += spi.c
verstage-y += gpio.c
verstage-y += clock.c
verstage-y += i2c.c
verstage-y += qup.c
verstage-y += blsp.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c
################################################################################
romstage-y += timer.c
romstage-y += spi.c
romstage-y += cbmem.c
romstage-y += gpio.c
romstage-y += clock.c
romstage-y += usb.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += i2c.c
romstage-y += qup.c
romstage-y += blsp.c
################################################################################
ramstage-y += soc.c
ramstage-y += timer.c
ramstage-y += spi.c
ramstage-y += gpio.c
ramstage-y += clock.c
ramstage-y += i2c.c
ramstage-y += qup.c
ramstage-y += blsp.c
ramstage-y += usb.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
################################################################################

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@ -3,68 +3,40 @@ ifeq ($(CONFIG_SOC_QUALCOMM_SC7180),y)
decompressor-y += decompressor.c
decompressor-y += mmu.c
decompressor-y += timer.c
decompressor-y += ../common/timer.c
all-y += ../common/timer.c
all-y += spi.c
all-y += gpio.c
all-y += qupv3_i2c.c
all-y += qupv3_spi.c
all-y += clock.c
all-$(CONFIG_SC7180_QSPI) += qspi.c
all-y += qcom_qup_se.c
all-y += qupv3_config.c
################################################################################
bootblock-y += bootblock.c
bootblock-y += mmu.c
bootblock-y += timer.c
bootblock-y += spi.c
bootblock-y += qupv3_spi.c
bootblock-y += gpio.c
bootblock-y += qupv3_i2c.c
bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
bootblock-y += clock.c
bootblock-$(CONFIG_SC7180_QSPI) += qspi.c
bootblock-y += qupv3_config.c
bootblock-y += qcom_qup_se.c
################################################################################
verstage-y += timer.c
verstage-y += spi.c
verstage-y += qupv3_spi.c
verstage-y += gpio.c
verstage-y += qupv3_i2c.c
verstage-y += clock.c
verstage-$(CONFIG_SC7180_QSPI) += qspi.c
verstage-y += qcom_qup_se.c
verstage-y += qupv3_config.c
verstage-$(CONFIG_DRIVERS_UART) += qupv3_uart.c
################################################################################
romstage-y += cbmem.c
romstage-y += watchdog.c
romstage-y += timer.c
romstage-y += ../common/qclib.c
romstage-y += qclib.c
romstage-y += ../common/mmu.c
romstage-y += mmu.c
romstage-y += usb.c
romstage-y += spi.c
romstage-y += qupv3_spi.c
romstage-y += gpio.c
romstage-y += qupv3_i2c.c
romstage-y += clock.c
romstage-y += carve_out.c
romstage-$(CONFIG_SC7180_QSPI) += qspi.c
romstage-y += qcom_qup_se.c
romstage-y += qupv3_config.c
romstage-$(CONFIG_DRIVERS_UART) += qupv3_uart.c
################################################################################
ramstage-y += soc.c
ramstage-y += carve_out.c
ramstage-y += timer.c
ramstage-y += spi.c
ramstage-y += qupv3_spi.c
ramstage-y += gpio.c
ramstage-y += qupv3_i2c.c
ramstage-y += clock.c
ramstage-$(CONFIG_SC7180_QSPI) += qspi.c
ramstage-y += aop_load_reset.c
ramstage-y += usb.c
ramstage-y += qupv3_config.c
ramstage-y += qcom_qup_se.c
ramstage-$(CONFIG_DRIVERS_UART) += qupv3_uart.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi_phy_pll.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi_phy.c

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@ -1,27 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbfs.h>
#include <fmap.h>
#include <soc/symbols_common.h>
#include <soc/qclib_common.h>
int qclib_soc_blob_load(void)
{
size_t size;
/* Attempt to load PMICCFG Blob */
size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg",
_pmic, REGION_SIZE(pmic));
if (!size)
return -1;
qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, size, 0);
/* Attempt to load DCB Blob */
size = cbfs_load(CONFIG_CBFS_PREFIX "/dcb",
_dcb, REGION_SIZE(dcb));
if (!size)
return -1;
qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0);
return 0;
}

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@ -1,10 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <delay.h>
#include <arch/lib_helpers.h>
#include <commonlib/helpers.h>
void init_timer(void)
{
raw_write_cntfrq_el0(19200*KHz);
}