soc/intel/cannonlake: Enable FSP-S compression

Use LZMA compression technique to compress FSP-S. This provides some
SPI ROM space savings(~27 KiB) in each CBFS. FSP-M is XIP and hence not
compressed. LZMA is chosen over LZ4 since it provides extra space
savings of ~1 KiB for the decompression overhead of ~7 ms.

LZMA Compression:
fsps.bin	0xd1fc0	fsp	190132 LZMA (217088 decompressed)
LZMA Decompression:
 15:starting LZMA decompress (ignore for x86)         343,289 (417)
 16:finished LZMA decompress (ignore for x86)         373,922 (30,632)

LZ4 Compression:
fsps.bin	0xd1fc0	fsp	191310 LZ4  (217088 decompressed)
LZ4 Decompression:
 17:starting LZ4 decompress (ignore for x86)          345,676 (581)
 18:finished LZ4 decompress (ignore for x86)          369,101 (23,424)

BUG=b:158034451
TEST=Build and boot helios mainboard.

Change-Id: Ic0d0d81c81eaa365f3dbfdd2e00ac76cea287387
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42446
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian
2020-06-17 00:12:31 -06:00
committed by Patrick Georgi
parent 0be23eda13
commit 203af60464

View File

@@ -67,6 +67,7 @@ config CPU_SPECIFIC_OPTIONS
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select FSP_COMPRESS_FSP_S_LZMA
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP