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mb/starlabs/labtop/kbl: Organise USB ports by hardware port

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Group the USB ports by hardware ports, rather than separate USB 2.0 and
3.0 interfaces.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ib5fec81a7a04f2f5ab13784435944601902904d5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Sean Rhodes
2022-05-30 10:39:00 +01:00
committed by Felix Held
parent 840915bb8a
commit 220a47d12c
1 changed files with 9 additions and 10 deletions
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19
src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb
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@ -58,27 +58,26 @@ chip soc/intel/skylake
device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 on end # SA Thermal Device
device pci 14.0 on # USB xHCI
### USB 2.0 Devices
# Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB 3.0
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Daughterboard USB 3.0
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Internal Webcam
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
# Internal Bluetooth
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"
# Daughterboard SD Card
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
### USB 3.0 Devices
# Motherboard USB Type C
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB 3.0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Daughterboard USB 3.0
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Internal Bluetooth
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
end
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.2 on end # Thermal Subsystem