driver/uart: Introduce a way for mainboard to override the baudrate

The rationale is to allow the mainboard to override the default
baudrate for instance by sampling GPIOs at boot.

A new configuration option is available for mainboards to select
this behaviour. It will then have to define the function
get_uart_baudrate to return the computed baudrate.

Change-Id: I970ee788bf90b9e1a8c6ccdc5eee8029d9af0ecc
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/23713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/console/Kconfig

@@ -76,6 +76,14 @@ depends on UART_FOR_CONSOLE = 2
 comment "Serial port base address = 0x2e8"
 depends on UART_FOR_CONSOLE = 3
 
+config UART_OVERRIDE_BAUDRATE
+	boolean
+	help
+	  Set to "y" when the platform overrides the baudrate by providing
+	  a get_uart_baudrate routine.
+
+if !UART_OVERRIDE_BAUDRATE
+
 choice
 	prompt "Baud rate"
 	default CONSOLE_SERIAL_115200
@@ -129,6 +137,8 @@ config TTYS0_BAUD
 	help
 	  Map the Baud rates to an integer.
 
+endif
+
 # TODO: Allow user-friendly selection of settings other than 8n1.
 config TTYS0_LCS
 	int

src/cpu/allwinner/a10/uart.c

@@ -105,7 +105,7 @@ void uart_init(int idx)
 	struct a10_uart *uart_base = uart_platform_baseptr(idx);
 
 	/* Use default 8N1 encoding */
-	a10_uart_configure(uart_base, CONFIG_TTYS0_BAUD,
+	a10_uart_configure(uart_base, get_uart_baudrate(),
 		8, UART_PARITY_NONE, 1);
 	a10_uart_enable_fifos(uart_base);
 }

src/cpu/allwinner/a10/uart_console.c

@@ -44,7 +44,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
 	serial.uart_pci_addr = 0;

src/cpu/ti/am335x/uart.c

@@ -163,7 +163,7 @@ void uart_init(int idx)
 {
 	struct am335x_uart *uart = uart_platform_baseptr(idx);
 	uint16_t div = (uint16_t) uart_baudrate_divisor(
-		CONFIG_TTYS0_BAUD, uart_platform_refclk(), 16);
+		get_uart_baudrate(), uart_platform_refclk(), 16);
 	am335x_uart_init(uart, div);
 }
 
@@ -189,7 +189,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 2;
 	lb_add_serial(&serial, data);
 

src/drivers/uart/pl011.c

@@ -51,7 +51,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
 	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;

src/drivers/uart/uart8250io.c

@@ -107,7 +107,7 @@ void uart_init(int idx)
 {
 	if (!IS_ENABLED(CONFIG_DRIVERS_UART_8250IO_SKIP_INIT)) {
 		unsigned int div;
-		div = uart_baudrate_divisor(CONFIG_TTYS0_BAUD,
+		div = uart_baudrate_divisor(get_uart_baudrate(),
 			uart_platform_refclk(), uart_input_clock_divider());
 		uart8250_init(uart_platform_base(idx), div);
 	}
@@ -134,7 +134,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_IO_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
 	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;

src/drivers/uart/uart8250mem.c

@@ -119,7 +119,7 @@ void uart_init(int idx)
 		return;
 
 	unsigned int div;
-	div = uart_baudrate_divisor(CONFIG_TTYS0_BAUD,
+	div = uart_baudrate_divisor(get_uart_baudrate(),
 		uart_platform_refclk(), uart_input_clock_divider());
 	uart8250_mem_init(base, div);
 }
@@ -156,7 +156,7 @@ void uart_fill_lb(void *data)
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
 	if (!serial.baseaddr)
 		return;
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	if (IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32))
 		serial.regwidth = sizeof(uint32_t);
 	else

src/include/console/uart.h

@@ -23,6 +23,17 @@
  * baudrate generator. */
 unsigned int uart_platform_refclk(void);
 
+#if IS_ENABLED(CONFIG_UART_OVERRIDE_BAUDRATE)
+/* Return the baudrate, define this in your platform when using the above
+   configuration. */
+unsigned int get_uart_baudrate(void);
+#else
+static inline unsigned int get_uart_baudrate(void)
+{
+	return CONFIG_TTYS0_BAUD;
+}
+#endif
+
 /* Returns the divisor value for a given baudrate.
  * The formula to satisfy is:
  *    refclk / divisor = baudrate * oversample

src/soc/broadcom/cygnus/ns16550.c

@@ -120,7 +120,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = (uintptr_t)regs;
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 

src/soc/imgtec/pistachio/uart.c

@@ -124,7 +124,7 @@ void uart_init(int idx)
 		return;
 
 	unsigned int div;
-	div = uart_baudrate_divisor(CONFIG_TTYS0_BAUD,
+	div = uart_baudrate_divisor(get_uart_baudrate(),
 				    uart_platform_refclk(), 16);
 	uart8250_mem_init(base, div);
 }
@@ -150,7 +150,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1 << UART_SHIFT;
 	lb_add_serial(&serial, data);
 

src/soc/mediatek/mt8173/uart.c

@@ -87,7 +87,7 @@ static void mtk_uart_init(void)
 {
 	/* Use a hardcoded divisor for now. */
 	const unsigned uartclk = 26 * MHz;
-	const unsigned baudrate = CONFIG_TTYS0_BAUD;
+	const unsigned baudrate = get_uart_baudrate();
 	const uint8_t line_config = UART8250_LCR_WLS_8;	/* 8n1 */
 	unsigned highspeed, quot, divisor, remainder;
 
@@ -177,7 +177,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = UART0_BASE;
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 

src/soc/nvidia/tegra124/uart.c

@@ -136,7 +136,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 

src/soc/nvidia/tegra210/uart.c

@@ -123,7 +123,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS;
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 

src/soc/qualcomm/ipq40xx/uart.c

@@ -297,7 +297,7 @@ void uart_fill_lb(void *data)
 
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = (uint32_t)UART1_DM_BASE;
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 
 	lb_add_serial(&serial, data);

src/soc/samsung/exynos5250/uart.c

@@ -61,7 +61,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart)
 
 	// All UARTs share the same clock.
 	uclk = clock_get_periph_rate(PERIPH_ID_UART3);
-	val = uclk / CONFIG_TTYS0_BAUD;
+	val = uclk / get_uart_baudrate();
 
 	write32(&uart->ubrdiv, val / 16 - 1);
 
@@ -191,7 +191,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	lb_add_serial(&serial, data);
 

src/soc/samsung/exynos5420/uart.c

@@ -61,7 +61,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart)
 
 	// All UARTs share the same clock.
 	uclk = clock_get_periph_rate(PERIPH_ID_UART3);
-	val = uclk / CONFIG_TTYS0_BAUD;
+	val = uclk / get_uart_baudrate();
 
 	write32(&uart->ubrdiv, val / 16 - 1);
 
@@ -182,7 +182,7 @@ void uart_fill_lb(void *data)
 	struct lb_serial serial;
 	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
 	serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
-	serial.baud = CONFIG_TTYS0_BAUD;
+	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	serial.input_hertz = uart_platform_refclk();
 	serial.uart_pci_addr = 0;