spd.h: Move enum ddr4_module_type to ddr4.h

Move specific enum ddr4_module_type to <device/dram/ddr4.h>.

Change-Id: Ia538d2c73affa6560fa1533a40c02b3677588f5a
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes Haouas
2024-05-06 05:19:20 +02:00
parent 78ba7a7865
commit 239347a909
4 changed files with 15 additions and 43 deletions

View File

@@ -272,25 +272,7 @@ enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot, const u16 sel
dimm->dimm_num = slot; dimm->dimm_num = slot;
memcpy(dimm->module_part_number, info->part_number, SPD_DDR4_PART_LEN); memcpy(dimm->module_part_number, info->part_number, SPD_DDR4_PART_LEN);
dimm->mod_id = info->manufacturer_id; dimm->mod_id = info->manufacturer_id;
dimm->mod_type = info->dimm_type;
switch (info->dimm_type) {
case SPD_DDR4_DIMM_TYPE_SO_DIMM:
dimm->mod_type = DDR4_SPD_SODIMM;
break;
case SPD_DDR4_DIMM_TYPE_72B_SO_RDIMM:
dimm->mod_type = DDR4_SPD_72B_SO_RDIMM;
break;
case SPD_DDR4_DIMM_TYPE_UDIMM:
dimm->mod_type = DDR4_SPD_UDIMM;
break;
case SPD_DDR4_DIMM_TYPE_RDIMM:
dimm->mod_type = DDR4_SPD_RDIMM;
break;
default:
dimm->mod_type = SPD_UNDEFINED;
break;
}
dimm->bus_width = info->bus_width; dimm->bus_width = info->bus_width;
memcpy(dimm->serial, info->serial_number, memcpy(dimm->serial, info->serial_number,
MIN(sizeof(dimm->serial), sizeof(info->serial_number))); MIN(sizeof(dimm->serial), sizeof(info->serial_number)));

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@@ -2,6 +2,7 @@
#include <device/dram/ddr2.h> #include <device/dram/ddr2.h>
#include <device/dram/ddr3.h> #include <device/dram/ddr3.h>
#include <device/dram/ddr4.h>
#include <device/dram/ddr5.h> #include <device/dram/ddr5.h>
#include <device/dram/spd.h> #include <device/dram/spd.h>
#include <spd.h> #include <spd.h>
@@ -109,22 +110,22 @@ static void convert_ddr3_module_type_to_spd_info(enum spd_dimm_type_ddr3 module_
} }
} }
static void convert_ddr4_module_type_to_spd_info(enum ddr4_module_type module_type, static void convert_ddr4_module_type_to_spd_info(enum spd_dimm_type_ddr4 module_type,
struct spd_info *info) struct spd_info *info)
{ {
switch (module_type) { switch (module_type) {
case DDR4_SPD_RDIMM: case SPD_DDR4_DIMM_TYPE_RDIMM:
case DDR4_SPD_MINI_RDIMM: case SPD_DDR4_DIMM_TYPE_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM; info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED; info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break; break;
case DDR4_SPD_UDIMM: case SPD_DDR4_DIMM_TYPE_UDIMM:
case DDR4_SPD_MINI_UDIMM: case SPD_DDR4_DIMM_TYPE_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM; info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED; info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break; break;
case DDR4_SPD_SODIMM: case SPD_DDR4_DIMM_TYPE_SO_DIMM:
case DDR4_SPD_72B_SO_UDIMM: case SPD_DDR4_DIMM_TYPE_72B_SO_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM; info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN; info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break; break;

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@@ -201,20 +201,6 @@ enum spd_memory_type {
#define SPD_ECC_8BIT (1<<3) #define SPD_ECC_8BIT (1<<3)
#define SPD_ECC_8BIT_LP5_DDR5 (1<<4) #define SPD_ECC_8BIT_LP5_DDR5 (1<<4)
/* Byte 3 [3:0]: DDR4 Module type information */
enum ddr4_module_type {
DDR4_SPD_RDIMM = 0x01,
DDR4_SPD_UDIMM = 0x02,
DDR4_SPD_SODIMM = 0x03,
DDR4_SPD_LRDIMM = 0x04,
DDR4_SPD_MINI_RDIMM = 0x05,
DDR4_SPD_MINI_UDIMM = 0x06,
DDR4_SPD_72B_SO_RDIMM = 0x08,
DDR4_SPD_72B_SO_UDIMM = 0x09,
DDR4_SPD_16B_SO_DIMM = 0x0c,
DDR4_SPD_32B_SO_RDIMM = 0x0d,
};
enum lpx_module_type { enum lpx_module_type {
LPX_SPD_LPDIMM = 0x07, LPX_SPD_LPDIMM = 0x07,
LPX_SPD_NONDIMM = 0x0e, LPX_SPD_NONDIMM = 0x0e,

View File

@@ -2,6 +2,7 @@
#include <device/dram/ddr2.h> #include <device/dram/ddr2.h>
#include <device/dram/ddr3.h> #include <device/dram/ddr3.h>
#include <device/dram/ddr4.h>
#include <device/dram/ddr5.h> #include <device/dram/ddr5.h>
#include <dimm_info_util.h> #include <dimm_info_util.h>
#include <spd.h> #include <spd.h>
@@ -157,9 +158,11 @@ static void test_smbios_form_factor_to_spd_mod_type(void **state)
}, },
{ {
.memory_type = MEMORY_TYPE_DDR4, .memory_type = MEMORY_TYPE_DDR4,
.udimm_allowed = {DDR4_SPD_UDIMM, DDR4_SPD_MINI_UDIMM}, .udimm_allowed = {SPD_DDR4_DIMM_TYPE_UDIMM,
.rdimm_allowed = {DDR4_SPD_RDIMM, DDR4_SPD_MINI_RDIMM}, SPD_DDR4_DIMM_TYPE_MINI_UDIMM},
.expected_module_type = DDR4_SPD_SODIMM, .rdimm_allowed = {SPD_DDR4_DIMM_TYPE_RDIMM,
SPD_DDR4_DIMM_TYPE_MINI_RDIMM},
.expected_module_type = SPD_DDR4_DIMM_TYPE_SO_DIMM,
}, },
{.memory_type = MEMORY_TYPE_DDR5, {.memory_type = MEMORY_TYPE_DDR5,
.udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM}, .udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM},