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soc/amd/cezanne: Add modern standby option to chip config

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BUG=b:178728116

Change-Id: I0d09bd4361f5f47360daf750efbc993010804902
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52041
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Mathew King 2021-04-14 15:29:44 -06:00 committed by Patrick Georgi
parent 9623f7bb1c
commit 23cc165d6a
1 changed files with 3 additions and 0 deletions
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3
src/soc/amd/cezanne/chip.h
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@ -11,6 +11,9 @@ struct soc_amd_cezanne_config {
struct soc_amd_common_config common_config;
u8 i2c_scl_reset;
struct dw_i2c_bus_config i2c[I2C_CTRLR_COUNT];
/* Enable S0iX support */
bool s0ix_enable;
};
#endif /* CEZANNE_CHIP_H */