soc/marvell/bg4cd: remove cosmos mainboard and bg4cd soc
The SoC code was never completed. It's just a skeleton that gets in the way of refactoring other code. Likewise, the mainboard was never completed either. Just remove them both. Change-Id: I8faaa9bb1b90ad2936dcdbaf2882651ebba6630c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19823 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
committed by
Furquan Shaikh
parent
0fb6568444
commit
250715eb2f
@@ -1,56 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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if BOARD_GOOGLE_COSMOS
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select BOARD_ID_AUTO
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select BOARD_ROMSIZE_KB_2048
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select COMMON_CBFS_SPI_WRAPPER
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select HAVE_HARD_RESET
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select MAINBOARD_HAS_CHROMEOS
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select SOC_MARVELL_BG4CD
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select SPI_FLASH
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select SPI_FLASH_SPANSION
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config VBOOT
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select VBOOT_VBNV_FLASH
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config MAINBOARD_DIR
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string
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default google/cosmos
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config MAINBOARD_PART_NUMBER
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string
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default "Cosmos"
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config MAINBOARD_VENDOR
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string
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default "Google"
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config BOOT_DEVICE_SPI_FLASH_BUS
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int
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default 2
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config DRAM_SIZE_MB
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int
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default 1024
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config GBB_HWID
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string
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depends on CHROMEOS
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default "Cosmos TEST 1"
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endif # BOARD_GOOGLE_COSMOS
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@@ -1,2 +0,0 @@
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config BOARD_GOOGLE_COSMOS
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bool "Cosmos"
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@@ -1,37 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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bootblock-y += bootblock.c
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bootblock-y += boardid.c
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bootblock-y += chromeos.c
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bootblock-y += reset.c
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verstage-y += boardid.c
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verstage-y += chromeos.c
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verstage-y += reset.c
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romstage-y += boardid.c
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romstage-y += chromeos.c
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romstage-y += romstage.c
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romstage-y += reset.c
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ramstage-y += boardid.c
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ramstage-y += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += reset.c
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bootblock-y += memlayout.ld
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verstage-y += memlayout.ld
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romstage-y += memlayout.ld
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ramstage-y += memlayout.ld
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@@ -1,5 +0,0 @@
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Vendor name: Google
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Board name: Cosmos Marvell BG4CD reference board
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Category: eval
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ROM protocol: SPI
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ROM socketed: n
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@@ -1,21 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <boardid.h>
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uint8_t board_id(void)
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{
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return -1;
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}
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@@ -1,20 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <bootblock_common.h>
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void bootblock_mainboard_init(void)
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{
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}
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@@ -1,31 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <boot/coreboot_tables.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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}
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int get_recovery_mode_switch(void)
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{
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return 0;
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}
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int get_write_protect_state(void)
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{
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return 0;
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}
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@@ -1,28 +0,0 @@
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FLASH@0x0 0x200000 {
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WP_RO@0x0 0x100000 {
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RO_SECTION@0x0 0xf0000 {
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BOOTBLOCK@0 128K
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COREBOOT(CBFS)@0x20000 0x60000
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FMAP@0x80000 0x1000
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GBB@0x81000 0x6ef00
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RO_FRID@0xeff00 0x100
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}
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RO_VPD@0xf0000 0x10000
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}
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RW_SECTION_A@0x100000 0x68000 {
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VBLOCK_A@0x0 0x2000
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FW_MAIN_A(CBFS)@0x2000 0x65f00
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RW_FWID_A@0x67f00 0x100
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}
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RW_SHARED@0x168000 0x4000 {
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SHARED_DATA@0x0 0x4000
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}
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RW_ELOG@0x16c000 0x4000
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RW_SECTION_B@0x180000 0x68000 {
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VBLOCK_B@0x0 0x2000
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FW_MAIN_B(CBFS)@0x2000 0x65f00
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RW_FWID_B@0x67f00 0x100
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}
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RW_VPD@0x1e8000 0x8000
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RW_NVRAM@0x1f0000 0x10000
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}
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@@ -1,19 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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# TODO fill with Versatile Express board data in QEMU.
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chip soc/marvell/bg4cd
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device cpu_cluster 0 on end
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end
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@@ -1,34 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <boot/coreboot_tables.h>
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static void mainboard_init(device_t dev)
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{
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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void lb_board(struct lb_header *header)
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{
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}
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@@ -1,14 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/memlayout.ld>
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@@ -1,22 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <reset.h>
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void hard_reset(void)
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{
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while (1)
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;
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}
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@@ -1,53 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/cache.h>
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#include <arch/exception.h>
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#include <arch/stages.h>
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#include <armv7.h>
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#include <cbfs.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <delay.h>
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#include <program_loading.h>
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#include <soc/sdram.h>
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#include <stdlib.h>
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#include <symbols.h>
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#include <timestamp.h>
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#include <types.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include "timer.h"
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void main(void)
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{
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timestamp_add_now(TS_START_ROMSTAGE);
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console_init();
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timestamp_add_now(TS_BEFORE_INITRAM);
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sdram_init();
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timestamp_add_now(TS_AFTER_INITRAM);
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mmu_init();
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mmu_config_range(0, 4096, DCACHE_OFF);
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dcache_mmu_enable();
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cbmem_initialize_empty();
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run_ramstage();
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}
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@@ -1,34 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
|
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## it under the terms of the GNU General Public License as published by
|
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## the Free Software Foundation; version 2 of the License.
|
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##
|
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SOC_MARVELL_BG4CD
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bool
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default n
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select ARCH_BOOTBLOCK_ARMV7_M
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select BOOTBLOCK_CUSTOM if VBOOT
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select ARCH_RAMSTAGE_ARMV7
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select ARCH_ROMSTAGE_ARMV7
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select ARCH_VERSTAGE_ARMV7_M
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select BOOTBLOCK_CONSOLE
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select GENERIC_UDELAY
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select HAVE_MONOTONIC_TIMER
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select GENERIC_GPIO_LIB
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if SOC_MARVELL_BG4CD
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config VBOOT
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select VBOOT_STARTS_IN_BOOTBLOCK
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endif
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@@ -1,49 +0,0 @@
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##
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## This file is part of the coreboot project.
|
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##
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## Copyright 2014 Google Inc.
|
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##
|
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## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; version 2 of the License.
|
||||
##
|
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## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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## GNU General Public License for more details.
|
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##
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ifeq ($(CONFIG_SOC_MARVELL_BG4CD),y)
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bootblock-$(CONFIG_VBOOT) += bootblock_asm.S
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bootblock-$(CONFIG_VBOOT) += bootblock.c
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bootblock-y += cbmem.c
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bootblock-y += i2c.c
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bootblock-y += monotonic_timer.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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verstage-y += i2c.c
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verstage-y += monotonic_timer.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-y += romstage.S
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romstage-y += cbmem.c
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romstage-y += i2c.c
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romstage-y += monotonic_timer.c
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romstage-y += sdram.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-y += cbmem.c
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ramstage-y += i2c.c
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ramstage-y += monotonic_timer.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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CPPFLAGS_common += -Isrc/soc/marvell/bg4cd/include/
|
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|
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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@printf "Generating: $(subst $(obj)/,,$(@))\n"
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@mkdir -p $(dir $@)
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@mv $< $@
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endif
|
@@ -1,26 +0,0 @@
|
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/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <console/console.h>
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#include <program_loading.h>
|
||||
#include <timestamp.h>
|
||||
#include <vendorcode/google/chromeos/chromeos.h>
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|
||||
void main(void)
|
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{
|
||||
console_init();
|
||||
timestamp_init(timestamp_get());
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run_romstage();
|
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}
|
@@ -1,54 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <arch/asm.h>
|
||||
|
||||
ENTRY(_start)
|
||||
/*
|
||||
* Initialize the stack to a known value. This is used to check for
|
||||
* stack overflow later in the boot process.
|
||||
*/
|
||||
ldr r0, =_stack
|
||||
ldr r1, =_estack
|
||||
ldr r2, =0xdeadbeef
|
||||
init_stack_loop:
|
||||
str r2, [r0]
|
||||
add r0, #4
|
||||
cmp r0, r1
|
||||
bne init_stack_loop
|
||||
|
||||
call_verstage:
|
||||
ldr sp, =_estack /* Set up stack pointer */
|
||||
/*
|
||||
* we don't bl here to preserve lr so that we can return to the caller
|
||||
* of the bootblock
|
||||
*/
|
||||
b main
|
||||
ENDPROC(_start)
|
@@ -1,22 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <cbmem.h>
|
||||
#include <stddef.h>
|
||||
|
||||
void *cbmem_top(void)
|
||||
{
|
||||
return NULL;
|
||||
}
|
@@ -1,26 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <device/i2c.h>
|
||||
#include <soc/i2c.h>
|
||||
|
||||
int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void i2c_init(unsigned int bus, unsigned int hz)
|
||||
{
|
||||
}
|
@@ -1,21 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __SOC_MARVELL_BG4CD_GPIO_H__
|
||||
#define __SOC_MARVELL_BG4CD_GPIO_H__
|
||||
|
||||
#include <types.h>
|
||||
|
||||
typedef u32 gpio_t;
|
||||
|
||||
#endif /* __SOC_MARVELL_BG4CD_GPIO_H__ */
|
@@ -1,21 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __SOC_MARVELL_BG4CD_I2C_H__
|
||||
#define __SOC_MARVELL_BG4CD_I2C_H__
|
||||
|
||||
void i2c_init(unsigned int bus, unsigned int hz);
|
||||
|
||||
#endif
|
@@ -1,40 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <memlayout.h>
|
||||
|
||||
#include <arch/header.ld>
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
SRAM_START(0x20000)
|
||||
|
||||
BOOTBLOCK(0x20000, 40K)
|
||||
/* there is no VERSTAGE because it's built into bootblock */
|
||||
|
||||
PRERAM_CBFS_CACHE(0x2A000, 8K)
|
||||
STACK(0x2C000, 8K)
|
||||
VBOOT2_WORK(0x2E000, 16K)
|
||||
|
||||
SRAM_END(0x40000)
|
||||
|
||||
DRAM_START(0x40000)
|
||||
|
||||
RAMSTAGE(0x40000, 128K)
|
||||
POSTRAM_CBFS_CACHE(0x60000, 1M)
|
||||
|
||||
ROMSTAGE(0xF7A40000, 32K)
|
||||
TTB(0xF7A48000, 16K)
|
||||
}
|
@@ -1,20 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__
|
||||
#define __SOC_MARVELL_BG4CD_SDRAM_H__
|
||||
|
||||
void sdram_init(void);
|
||||
#endif
|
@@ -1,21 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <delay.h>
|
||||
#include <timer.h>
|
||||
|
||||
void timer_monotonic_get(struct mono_time *mt)
|
||||
{
|
||||
}
|
@@ -1,79 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <arch/asm.h>
|
||||
|
||||
.arm
|
||||
ENTRY(stage_entry)
|
||||
/*
|
||||
* Set the CPU to System mode with IRQ and FIQ disabled. Prefetch/Data
|
||||
* aborts may happen early and crash before the abort handlers are
|
||||
* installed, but at least the problem will show up near the code that
|
||||
* causes it.
|
||||
*/
|
||||
msr cpsr_cxf, #0xdf
|
||||
bl _thumb_start
|
||||
ENDPROC(stage_entry)
|
||||
|
||||
.thumb
|
||||
ENTRY(_thumb_start)
|
||||
bl arm_init_caches
|
||||
|
||||
/*
|
||||
* From Cortex-A Series Programmer's Guide:
|
||||
* Only CPU 0 performs initialization. Other CPUs go into WFI
|
||||
* to do this, first work out which CPU this is
|
||||
* this code typically is run before any other initialization step
|
||||
*/
|
||||
mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register
|
||||
and r1, r1, #0x3 @ Extract CPU ID bits
|
||||
cmp r1, #0
|
||||
bne wait_for_interrupt @ If this is not core0, wait
|
||||
|
||||
/*
|
||||
* Initialize the stack to a known value. This is used to check for
|
||||
* stack overflow later in the boot process.
|
||||
*/
|
||||
ldr r0, =_stack
|
||||
ldr r1, =_estack
|
||||
ldr r2, =0xdeadbeef
|
||||
init_stack_loop:
|
||||
str r2, [r0]
|
||||
add r0, #4
|
||||
cmp r0, r1
|
||||
bne init_stack_loop
|
||||
|
||||
ldr sp, =_estack /* Set up stack pointer */
|
||||
bl main
|
||||
|
||||
wait_for_interrupt:
|
||||
wfi
|
||||
mov pc, lr @ back to my caller
|
||||
ENDPROC(_thumb_start)
|
@@ -1,22 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include <console/console.h>
|
||||
#include <soc/sdram.h>
|
||||
|
||||
void sdram_init(void)
|
||||
{
|
||||
printk(BIOS_INFO, "Starting SDRAM initialization...\n");
|
||||
printk(BIOS_INFO, "Finish SDRAM initialization...\n");
|
||||
}
|
@@ -1,21 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
* Copyright 2014 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <stddef.h>
|
||||
#include <spi-generic.h>
|
||||
|
||||
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
|
||||
{
|
||||
return -1;
|
||||
}
|
Reference in New Issue
Block a user