sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src: Don't use a #defines like Kconfig symbols

Browse Source 
This is spotted using ./util/lint/kconfig_lint
To work around the issue, rename the prefix from `CONFIG_` to `CONF_`.

Change-Id: Ia31aed366bf768ab167ed5f8595bee8234aac46b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes HAOUAS 2019-01-23 11:36:44 +01:00 committed by Patrick Georgi
parent 9e946079e8
commit 251514d986
10 changed files with 42 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/arch/x86/pci_ops_conf1.c
View File

@ -19,10 +19,10 @@
*/ */
#if !IS_ENABLED(CONFIG_PCI_IO_CFG_EXT) #if !IS_ENABLED(CONFIG_PCI_IO_CFG_EXT)
#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ #define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \
(devfn << 8) | (where & ~3)) (devfn << 8) | (where & ~3))
#else #else
#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ #define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \
(devfn << 8) | ((where & 0xff) & ~3) |\ (devfn << 8) | ((where & 0xff) & ~3) |\
((where & 0xf00)<<16)) ((where & 0xf00)<<16))
#endif #endif
@ -30,46 +30,46 @@
static uint8_t pci_conf1_read_config8(struct bus *pbus, int bus, int devfn, static uint8_t pci_conf1_read_config8(struct bus *pbus, int bus, int devfn,
int where) int where)
{ {
outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outl(CONF_CMD(bus, devfn, where), 0xCF8);
return inb(0xCFC + (where & 3)); return inb(0xCFC + (where & 3));
} }
static uint16_t pci_conf1_read_config16(struct bus *pbus, int bus, int devfn, static uint16_t pci_conf1_read_config16(struct bus *pbus, int bus, int devfn,
int where) int where)
{ {
outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outl(CONF_CMD(bus, devfn, where), 0xCF8);
return inw(0xCFC + (where & 2)); return inw(0xCFC + (where & 2));
} }
static uint32_t pci_conf1_read_config32(struct bus *pbus, int bus, int devfn, static uint32_t pci_conf1_read_config32(struct bus *pbus, int bus, int devfn,
int where) int where)
{ {
outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outl(CONF_CMD(bus, devfn, where), 0xCF8);
return inl(0xCFC); return inl(0xCFC);
} }
static void pci_conf1_write_config8(struct bus *pbus, int bus, int devfn, static void pci_conf1_write_config8(struct bus *pbus, int bus, int devfn,
int where, uint8_t value) int where, uint8_t value)
{ {
outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outl(CONF_CMD(bus, devfn, where), 0xCF8);
outb(value, 0xCFC + (where & 3)); outb(value, 0xCFC + (where & 3));
} }
static void pci_conf1_write_config16(struct bus *pbus, int bus, int devfn, static void pci_conf1_write_config16(struct bus *pbus, int bus, int devfn,
int where, uint16_t value) int where, uint16_t value)
{ {
outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outl(CONF_CMD(bus, devfn, where), 0xCF8);
outw(value, 0xCFC + (where & 2)); outw(value, 0xCFC + (where & 2));
} }
static void pci_conf1_write_config32(struct bus *pbus, int bus, int devfn, static void pci_conf1_write_config32(struct bus *pbus, int bus, int devfn,
int where, uint32_t value) int where, uint32_t value)
{ {
outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outl(CONF_CMD(bus, devfn, where), 0xCF8);
outl(value, 0xCFC); outl(value, 0xCFC);
} }
#undef CONFIG_CMD #undef CONF_CMD
const struct pci_bus_operations pci_cf8_conf1 = { const struct pci_bus_operations pci_cf8_conf1 = {
.read8 = pci_conf1_read_config8, .read8 = pci_conf1_read_config8,

8
src/drivers/spi/spi_flash_internal.h
View File

@ -11,10 +11,10 @@
* is a problem (and well your system already is broken), so err on the side * is a problem (and well your system already is broken), so err on the side
* of caution in case we're dealing with slower SPI buses and/or processors. * of caution in case we're dealing with slower SPI buses and/or processors.
*/ */
#define CONFIG_SYS_HZ 100 #define CONF_SYS_HZ 100
#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) #define SPI_FLASH_PROG_TIMEOUT (2 * CONF_SYS_HZ)
#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONF_SYS_HZ)
#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONF_SYS_HZ)
/* Common commands */ /* Common commands */
#define CMD_READ_ID 0x9f #define CMD_READ_ID 0x9f

10
src/include/console/uart.h
View File

@ -87,16 +87,16 @@ static inline void __uart_tx_flush(void) {}
#endif #endif
#if IS_ENABLED(CONFIG_GDB_STUB) && (ENV_ROMSTAGE || ENV_RAMSTAGE) #if IS_ENABLED(CONFIG_GDB_STUB) && (ENV_ROMSTAGE || ENV_RAMSTAGE)
#define CONFIG_UART_FOR_GDB CONFIG_UART_FOR_CONSOLE #define CONF_UART_FOR_GDB CONFIG_UART_FOR_CONSOLE
static inline void __gdb_hw_init(void) { uart_init(CONFIG_UART_FOR_GDB); } static inline void __gdb_hw_init(void) { uart_init(CONF_UART_FOR_GDB); }
static inline void __gdb_tx_byte(u8 data) static inline void __gdb_tx_byte(u8 data)
{ {
uart_tx_byte(CONFIG_UART_FOR_GDB, data); uart_tx_byte(CONF_UART_FOR_GDB, data);
} }
static inline void __gdb_tx_flush(void) { uart_tx_flush(CONFIG_UART_FOR_GDB); } static inline void __gdb_tx_flush(void) { uart_tx_flush(CONF_UART_FOR_GDB); }
static inline u8 __gdb_rx_byte(void) static inline u8 __gdb_rx_byte(void)
{ {
return uart_rx_byte(CONFIG_UART_FOR_GDB); return uart_rx_byte(CONF_UART_FOR_GDB);
} }
#endif #endif

6
src/northbridge/amd/amdfam10/util.c
View File

@ -38,8 +38,8 @@
#define MMIO_ROUTE_END 0xb8 #define MMIO_ROUTE_END 0xb8
#define PCIIO_ROUTE_START 0xc0 #define PCIIO_ROUTE_START 0xc0
#define PCIIO_ROUTE_END 0xd8 #define PCIIO_ROUTE_END 0xd8
#define CONFIG_ROUTE_START 0xe0 #define CONF_ROUTE_START 0xe0
#define CONFIG_ROUTE_END 0xec #define CONF_ROUTE_END 0xec
#define PCI_IO_BASE0 0xc0 #define PCI_IO_BASE0 0xc0
#define PCI_IO_BASE1 0xc8 #define PCI_IO_BASE1 0xc8
@ -246,7 +246,7 @@ static void showallpciio(int level, struct device *dev)
static void showallconfig(int level, struct device *dev) static void showallconfig(int level, struct device *dev)
{ {
u8 reg; u8 reg;
for (reg = CONFIG_ROUTE_START; reg <= CONFIG_ROUTE_END; reg += 4) { for (reg = CONF_ROUTE_START; reg <= CONF_ROUTE_END; reg += 4) {
u32 val = pci_read_config32(dev, reg); u32 val = pci_read_config32(dev, reg);
if (val) if (val)
showconfig(level, reg, val); showconfig(level, reg, val);

14
src/soc/rockchip/rk3288/sdram.c
View File

@ -381,8 +381,8 @@ static struct rk3288_msch_regs * const rk3288_msch[2] = {
#define LP_TRIG_VAL(n) (((n) >> 4) & 7) #define LP_TRIG_VAL(n) (((n) >> 4) & 7)
#define PCTL_STAT_MSK (7) #define PCTL_STAT_MSK (7)
#define INIT_MEM (0) #define INIT_MEM (0)
#define CONFIG (1) #define CONF (1)
#define CONFIG_REQ (2) #define CONF_REQ (2)
#define ACCESS (3) #define ACCESS (3)
#define ACCESS_REQ (4) #define ACCESS_REQ (4)
#define LOW_POWER (5) #define LOW_POWER (5)
@ -760,10 +760,10 @@ static void move_to_config_state(struct rk3288_ddr_publ_regs *ddr_publ_regs,
case INIT_MEM: case INIT_MEM:
write32(&ddr_pctl_regs->sctl, CFG_STATE); write32(&ddr_pctl_regs->sctl, CFG_STATE);
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK) while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
!= CONFIG) != CONF)
; ;
break; break;
case CONFIG: case CONF:
return; return;
default: default:
break; break;
@ -907,12 +907,12 @@ static void move_to_access_state(u32 chnum)
case INIT_MEM: case INIT_MEM:
write32(&ddr_pctl_regs->sctl, CFG_STATE); write32(&ddr_pctl_regs->sctl, CFG_STATE);
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK) while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
!= CONFIG) != CONF)
; ;
case CONFIG: case CONF:
write32(&ddr_pctl_regs->sctl, GO_STATE); write32(&ddr_pctl_regs->sctl, GO_STATE);
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK) while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
== CONFIG) == CONF)
; ;
break; break;
case ACCESS: case ACCESS:

4
src/soc/samsung/exynos5250/clock.c
View File

@ -22,7 +22,7 @@
#include <timer.h> #include <timer.h>
/* input clock of PLL: SMDK5250 has 24MHz input clock */ /* input clock of PLL: SMDK5250 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONF_SYS_CLK_FREQ 24000000
static struct arm_clk_ratios arm_clk_ratios[] = { static struct arm_clk_ratios arm_clk_ratios[] = {
{ {
@ -213,7 +213,7 @@ unsigned long get_pll_clk(int pllreg)
/* SDIV [2:0] */ /* SDIV [2:0] */
s = r & 0x7; s = r & 0x7;
freq = CONFIG_SYS_CLK_FREQ; freq = CONF_SYS_CLK_FREQ;
if (pllreg == EPLL) { if (pllreg == EPLL) {
k = k & 0xffff; k = k & 0xffff;

4
src/soc/samsung/exynos5420/clock.c
View File

@ -22,7 +22,7 @@
#include <timer.h> #include <timer.h>
/* input clock of PLL: SMDK5420 has 24MHz input clock */ /* input clock of PLL: SMDK5420 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONF_SYS_CLK_FREQ 24000000
/* Epll Clock division values to achieve different frequency output */ /* Epll Clock division values to achieve different frequency output */
static struct st_epll_con_val epll_div[] = { static struct st_epll_con_val epll_div[] = {
@ -96,7 +96,7 @@ unsigned long get_pll_clk(int pllreg)
/* SDIV [2:0] */ /* SDIV [2:0] */
s = r & 0x7; s = r & 0x7;
freq = CONFIG_SYS_CLK_FREQ; freq = CONF_SYS_CLK_FREQ;
if (pllreg == EPLL || pllreg == RPLL) { if (pllreg == EPLL || pllreg == RPLL) {
k = k & 0xffff; k = k & 0xffff;

2
src/superio/acpi/pnp.asl
View File

@ -40,7 +40,7 @@
#define PNP_IRQ1 IRQ1 #define PNP_IRQ1 IRQ1
#define PNP_DMA0 DMA0 #define PNP_DMA0 DMA0
#define CONFIG_MODE_MUTEX CMMX #define CONF_MODE_MUTEX CMMX
#define ENTER_CONFIG_MODE ENCM #define ENTER_CONFIG_MODE ENCM
#define EXIT_CONFIG_MODE EXCM #define EXIT_CONFIG_MODE EXCM
#define SWITCH_LDN SWLD #define SWITCH_LDN SWLD

8
src/superio/acpi/pnp_config.asl
View File

@ -37,7 +37,7 @@
* Mutex for accesses to the configuration ports (prolog and * Mutex for accesses to the configuration ports (prolog and
* epilog commands are used, so synchronization is useful) * epilog commands are used, so synchronization is useful)
*/ */
Mutex(CONFIG_MODE_MUTEX, 1) Mutex(CONF_MODE_MUTEX, 1)
/* /*
* Enter configuration mode (and aquire mutex) * Enter configuration mode (and aquire mutex)
@ -47,7 +47,7 @@ Mutex(CONFIG_MODE_MUTEX, 1)
*/ */
Method (ENTER_CONFIG_MODE, 1) Method (ENTER_CONFIG_MODE, 1)
{ {
Acquire (CONFIG_MODE_MUTEX, 0xFFFF) Acquire (CONF_MODE_MUTEX, 0xFFFF)
#ifdef PNP_ENTER_MAGIC_1ST #ifdef PNP_ENTER_MAGIC_1ST
Store (PNP_ENTER_MAGIC_1ST, PNP_ADDR_REG) Store (PNP_ENTER_MAGIC_1ST, PNP_ADDR_REG)
#ifdef PNP_ENTER_MAGIC_2ND #ifdef PNP_ENTER_MAGIC_2ND
@ -77,12 +77,12 @@ Method (EXIT_CONFIG_MODE)
#if defined(PNP_EXIT_SPECIAL_REG) && defined(PNP_EXIT_SPECIAL_VAL) #if defined(PNP_EXIT_SPECIAL_REG) && defined(PNP_EXIT_SPECIAL_VAL)
Store (PNP_EXIT_SPECIAL_VAL, PNP_EXIT_SPECIAL_REG) Store (PNP_EXIT_SPECIAL_VAL, PNP_EXIT_SPECIAL_REG)
#endif #endif
Release (CONFIG_MODE_MUTEX) Release (CONF_MODE_MUTEX)
} }
/* /*
* Just change the LDN. Make sure that you are in config mode (or * Just change the LDN. Make sure that you are in config mode (or
* have otherwise acquired CONFIG_MODE_MUTEX), when calling. * have otherwise acquired CONF_MODE_MUTEX), when calling.
*/ */
Method (SWITCH_LDN, 1) Method (SWITCH_LDN, 1)
{ {

10
src/superio/smsc/lpc47n207/early_serial.c
View File

@ -49,16 +49,16 @@ void try_enabling_LPC47N207_uart(void)
u16 lpc_port; u16 lpc_port;
int i, j; int i, j;
#define CONFIG_ENABLE 0x55 #define CONF_ENABLE 0x55
#define CONFIG_DISABLE 0xaa #define CONF_DISABLE 0xaa
for (j = 0; j < ARRAY_SIZE(lpc_ports); j++) { for (j = 0; j < ARRAY_SIZE(lpc_ports); j++) {
lpc_port = lpc_ports[j]; lpc_port = lpc_ports[j];
/* enable CONFIG mode */ /* enable CONFIG mode */
outb(CONFIG_ENABLE, lpc_port); outb(CONF_ENABLE, lpc_port);
reg_value = inb(lpc_port); reg_value = inb(lpc_port);
if (reg_value != CONFIG_ENABLE) { if (reg_value != CONF_ENABLE) {
continue; /* There is no LPC device at this address */ continue; /* There is no LPC device at this address */
} }
@ -94,6 +94,6 @@ void try_enabling_LPC47N207_uart(void)
outb(reg_value, lpc_port + 1); outb(reg_value, lpc_port + 1);
} }
} while (0); } while (0);
outb(CONFIG_DISABLE, lpc_port); outb(CONF_DISABLE, lpc_port);
} }
} }