mb/intel/kblrvp: Make use of chipset devicetree
Use the references from the chipset devicetree as this makes the comments superfluous and remove devices which are turned off. Built all variants with BUILD_TIMELESS=1 and the resulting binaries remain the same. Change-Id: I1fd5f2a1c8adb5f379d7f3d0b54dca9c3ee6e2b3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Signed-off-by: Marvin Evers <marvin.evers@stud.hs-bochum.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79325 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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Felix Singer
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Felix Singer
Felix Singer
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6b02a20f17
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2dff4f0688
@@ -111,50 +111,23 @@ chip soc/intel/skylake
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device cpu_cluster 0 on end
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device domain 0 on
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device pci 00.0 on end # Host Bridge
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device pci 02.0 on end # Integrated Graphics Device
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device pci 04.0 on end # SA thermal subsystem
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device pci 14.0 on end # USB xHCI
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.2 on end # Thermal Subsystem
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device pci 15.0 on end # I2C #0
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device pci 15.1 on end # I2C #1
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device pci 15.2 on end # I2C #2
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device pci 15.3 on end # I2C #3
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 17.0 off end # SATA
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device pci 19.0 on end # UART #2
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device pci 19.1 off end # I2C #5
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device pci 19.2 on end # I2C #4
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device pci 1c.0 on end # PCI Express Port 1
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device pci 1c.1 off end # PCI Express Port 2
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device pci 1c.2 off end # PCI Express Port 3
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device pci 1c.3 off end # PCI Express Port 4
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device pci 1c.4 off end # PCI Express Port 5
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 on end # PCI Express Port 9
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1e.0 on end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1e.4 on end # eMMC
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device pci 1e.5 off end # SDIO
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device pci 1e.6 on end # SDCard
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device pci 1f.0 on end # LPC Interface
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device pci 1f.1 on end # P2SB
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device pci 1f.2 on end # Power Management Controller
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device pci 1f.3 off end # Intel HDA
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device pci 1f.4 on end # SMBus
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device pci 1f.5 on end # PCH SPI
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device pci 1f.6 off end # GbE
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device ref igpu on end
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device ref sa_thermal on end
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device ref south_xhci on end
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device ref thermal on end
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device ref i2c0 on end
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device ref i2c1 on end
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device ref i2c2 on end
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device ref i2c3 on end
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device ref heci1 on end
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device ref uart2 on end
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device ref i2c4 on end
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device ref pcie_rp1 on end
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device ref pcie_rp9 on end
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device ref uart0 on end
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device ref emmc on end
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device ref sdxc on end
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device ref smbus on end
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device ref fast_spi on end
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end
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end
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@@ -107,14 +107,14 @@ chip soc/intel/skylake
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}"
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device domain 0 on
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device pci 04.0 off end # SA thermal subsystem
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 17.0 on end # SATA
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device pci 19.2 off end # I2C #4
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device pci 1e.4 off end # eMMC
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device pci 1e.6 off end # SDCard
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device pci 1f.3 on end # Intel HDA
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device pci 1f.6 on end # GbE
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device ref sa_thermal off end
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device ref i2c2 off end
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device ref i2c3 off end
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device ref sata on end
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device ref i2c4 off end
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device ref emmc off end
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device ref sdxc off end
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device ref hda on end
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device ref gbe on end
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end
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end
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@@ -113,18 +113,18 @@ chip soc/intel/skylake
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}"
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device domain 0 on
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device pci 05.0 on end # SA IMGU
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device pci 14.3 on end # Camera
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device pci 1c.0 on end # PCI Express Port 1 x4 SLOT1
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device pci 1c.4 on end # PCI Express Port 5 x1 SLOT2/LAN
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device pci 1c.5 on end # PCI Express Port 6 x1 SLOT3
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device pci 1d.0 on end # PCI Express Port 9 x1 WLAN
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device pci 1d.1 on end # PCI Express Port 10 x1 WIGIG
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device pci 1f.0 on
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device ref imgu on end
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device ref cio on end
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device ref pcie_rp1 on end # x4 SLOT1
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device ref pcie_rp5 on end # x1 SLOT2/LAN
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device ref pcie_rp6 on end # x1 SLOT3
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device ref pcie_rp9 on end # x1 WLAN
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device ref pcie_rp10 on end # x1 WIGIG
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device ref lpc_espi on
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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end # LPC Interface
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device pci 1f.3 on end # Intel HDA
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end
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device ref hda on end
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end
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end
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@@ -155,17 +155,17 @@ chip soc/intel/skylake
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device cpu_cluster 0 on end
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device domain 0 on
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 17.0 on end # SATA
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device pci 1c.2 on end # PCI Express Port 3
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device pci 1c.3 on end # PCI Express Port 4
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device pci 1c.4 on end # PCI Express Port 5
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device pci 1c.5 on end # PCI Express Port 6
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device pci 1f.0 on
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device ref i2c2 off end
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device ref i2c3 off end
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device ref sata on end
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device ref pcie_rp3 on end
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device ref pcie_rp4 on end
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device ref pcie_rp5 on end
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device ref pcie_rp6 on end
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device ref lpc_espi on
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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end # LPC Interface
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end
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end
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end
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@@ -160,21 +160,21 @@ chip soc/intel/skylake
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}"
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device domain 0 on
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 17.0 on end # SATA
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device pci 19.2 off end # I2C #4
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device pci 1c.0 off end # PCI Express Port 1
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device pci 1c.2 on end # PCI Express Port 3
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device pci 1c.3 on end # PCI Express Port 4
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device pci 1c.4 on end # PCI Express Port 5
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device pci 1e.4 off end # eMMC
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device pci 1e.6 off end # SDXC
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device pci 1f.0 on
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device ref i2c2 off end
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device ref i2c3 off end
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device ref sata on end
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device ref i2c4 off end
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device ref pcie_rp1 off end
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device ref pcie_rp3 on end
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device ref pcie_rp4 on end
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device ref pcie_rp5 on end
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device ref emmc off end
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device ref sdxc off end
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device ref lpc_espi on
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#chip drivers/pc80/tpm
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# device pnp 0c31.0 on end
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#end
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end # LPC Interface
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device pci 1f.6 on end # GbE
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end
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device ref gbe on end
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end
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end
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