soc/amd/genoa: Parse APOB for DRAM layout
Use the xPRF call to report holes in memory and report those regions as reserved. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5605499e39931e1a1592318310112666f8a0f144 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76522 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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@@ -8,8 +8,22 @@
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#include <device/device.h>
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#include <types.h>
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#include <vendorcode/amd/opensil/genoa_poc/opensil.h>
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#define IOHC_IOAPIC_BASE_ADDR_LO 0x2f0
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static void genoa_domain_read_resources(struct device *domain)
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{
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amd_pci_domain_read_resources(domain);
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// We only want to add the DRAM memory map once
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if (domain->link_list->secondary == 0) {
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/* 0x1000 is a large enough first index to be sure to not overlap with the
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resources added by amd_pci_domain_read_resources */
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add_opensil_memmap(domain, 0x1000);
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}
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}
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static void genoa_domain_set_resources(struct device *domain)
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{
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if (domain->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
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@@ -35,7 +49,7 @@ static void genoa_domain_set_resources(struct device *domain)
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}
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struct device_operations genoa_pci_domain_ops = {
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.read_resources = amd_pci_domain_read_resources,
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.read_resources = genoa_domain_read_resources,
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.set_resources = genoa_domain_set_resources,
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.scan_bus = amd_pci_domain_scan_bus,
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};
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