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soc/intel/lpss: Provide common LPSS clock config

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Since there are multiple controllers in the LPSS and all use the same
frequency, provide a single Kconfig option for LPSS_CLOCK_MHZ.

BUG=b:35583330

Change-Id: I3c0cb62d56916e6e5f671fb5f40210f4cb33316f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19115
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Furquan Shaikh
2017-04-04 11:47:19 -07:00
committed by Furquan Shaikh
parent dd63f5978e
commit 340908aecf
5 changed files with 14 additions and 16 deletions
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15
src/soc/intel/common/Kconfig
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@@ -67,6 +67,13 @@ config ACPI_CONSOLE
help
Provide a mechanism for serial console based ACPI debug.
config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ
int
help
The clock speed that the controllers in LPSS(GSPI, I2C) are running
at, in MHz. No default is set here as this is an SOC-specific value
and must be provided by the SOC.
config SOC_INTEL_COMMON_LPSS_I2C
bool
default n
@@ -74,14 +81,6 @@ config SOC_INTEL_COMMON_LPSS_I2C
This driver supports the Intel Low Power Subsystem (LPSS) I2C
controllers that are based on Synopsys DesignWare IP.
config SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ
int
depends on SOC_INTEL_COMMON_LPSS_I2C
help
The clock speed that the I2C controller is running at, in MHz.
No default is set here as this is an SOC-specific value and must
be provided by the SOC when it selects this driver.
config SOC_INTEL_COMMON_LPSS_I2C_DEBUG
bool "Enable debug output for LPSS I2C transactions"
default n