intel cache-as-ram: Unify stack setup
No need to have %ebx reserved here. Change-Id: I9fe9292ddc610079b876019a71c69af5b1bcf2a2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17357 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@@ -324,8 +324,9 @@ no_msr_11e:
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andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
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movl %eax, %cr0
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/* Set up the stack pointer. */
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movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %esp
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/* Setup the stack. */
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movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
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movl %eax, %esp
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/* Restore the BIST result. */
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movl %ebp, %eax
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@@ -340,7 +341,7 @@ before_romstage:
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/* Save return value from romstage_main. It contains the stack to use
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* after cache-as-ram is torn down.
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*/
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movl %eax, %ebx
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movl %eax, %esp
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post_code(0x30)
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@@ -424,11 +425,7 @@ before_romstage:
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__main:
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post_code(POST_PREPARE_RAMSTAGE)
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cld /* Clear direction flag. */
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/* Setup stack as indicated by return value from romstage_main(). */
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movl %ebx, %esp
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movl %esp, %ebp
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call copy_and_run
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call romstage_after_car
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.Lhlt:
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post_code(POST_DEAD_CODE)
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@@ -177,7 +177,7 @@ before_romstage:
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/* Save return value from romstage_main. It contains the stack to use
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* after cache-as-ram is torn down. It also contains the information
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* for setting up MTRRs. */
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movl %eax, %ebx
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movl %eax, %esp
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post_code(0x30)
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@@ -225,9 +225,6 @@ before_romstage:
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post_code(0x38)
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/* Setup stack as indicated by return value from romstage_main(). */
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movl %ebx, %esp
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/* Get number of MTRRs. */
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popl %ebx
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movl $MTRR_PHYS_BASE(0), %ecx
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@@ -156,8 +156,8 @@ clear_var_mtrrs:
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andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
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movl %eax, %cr0
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/* Set up the stack pointer below the end of CAR. */
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movl $(CACHE_AS_RAM_SIZE + CACHE_AS_RAM_BASE - 4), %eax
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/* Setup the stack. */
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movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
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movl %eax, %esp
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/* Restore the BIST result. */
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@@ -169,11 +169,10 @@ before_romstage:
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post_code(0x29)
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/* Call romstage.c main function. */
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call romstage_main
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/* Save return value from romstage_main. It contains the stack to use
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* after cache-as-ram is torn down.
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*/
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movl %eax, %ebx
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movl %eax, %esp
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post_code(0x30)
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@@ -272,11 +271,7 @@ before_romstage:
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__main:
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post_code(POST_PREPARE_RAMSTAGE)
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cld /* Clear direction flag. */
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/* Setup stack as indicated by return value from romstage_main(). */
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movl %ebx, %esp
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movl %esp, %ebp
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call copy_and_run
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call romstage_after_car
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.Lhlt:
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post_code(POST_DEAD_CODE)
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@@ -178,7 +178,7 @@ before_romstage:
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/* Save return value from romstage_main. It contains the stack to use
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* after cache-as-ram is torn down.
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*/
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movl %eax, %ebx
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movl %eax, %esp
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post_code(0x30)
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@@ -285,11 +285,7 @@ before_romstage:
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__main:
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post_code(POST_PREPARE_RAMSTAGE)
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cld /* Clear direction flag. */
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/* Setup stack as indicated by return value from romstage_main(). */
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movl %ebx, %esp
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movl %esp, %ebp
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call copy_and_run
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call romstage_after_car
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.Lhlt:
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post_code(POST_DEAD_CODE)
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@@ -125,8 +125,8 @@ clear_mtrrs:
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andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
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movl %eax, %cr0
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/* Set up the stack pointer. */
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movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
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/* Setup the stack. */
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movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
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movl %eax, %esp
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/* Restore the BIST result. */
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@@ -142,7 +142,7 @@ before_romstage:
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/* Save return value from romstage_main. It contains the stack to use
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* after cache-as-ram is torn down.
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*/
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movl %eax, %ebx
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movl %eax, %esp
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post_code(0x30)
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@@ -226,11 +226,7 @@ before_romstage:
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__main:
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post_code(POST_PREPARE_RAMSTAGE)
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cld /* Clear direction flag. */
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/* Setup stack as indicated by return value from romstage_main(). */
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movl %ebx, %esp
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movl %esp, %ebp
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call copy_and_run
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call romstage_after_car
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.Lhlt:
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post_code(POST_DEAD_CODE)
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