intel cache-as-ram: Unify stack setup
No need to have %ebx reserved here. Change-Id: I9fe9292ddc610079b876019a71c69af5b1bcf2a2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17357 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@@ -177,7 +177,7 @@ before_romstage:
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/* Save return value from romstage_main. It contains the stack to use
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* after cache-as-ram is torn down. It also contains the information
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* for setting up MTRRs. */
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movl %eax, %ebx
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movl %eax, %esp
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post_code(0x30)
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@@ -225,9 +225,6 @@ before_romstage:
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post_code(0x38)
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/* Setup stack as indicated by return value from romstage_main(). */
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movl %ebx, %esp
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/* Get number of MTRRs. */
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popl %ebx
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movl $MTRR_PHYS_BASE(0), %ecx
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