intel cache-as-ram: Unify stack setup

No need to have %ebx reserved here.

Change-Id: I9fe9292ddc610079b876019a71c69af5b1bcf2a2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17357
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2016-11-08 12:13:15 +02:00
parent a4ffe9dda0
commit 39915bc290
5 changed files with 16 additions and 35 deletions

View File

@@ -178,7 +178,7 @@ before_romstage:
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down.
*/
movl %eax, %ebx
movl %eax, %esp
post_code(0x30)
@@ -285,11 +285,7 @@ before_romstage:
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
movl %esp, %ebp
call copy_and_run
call romstage_after_car
.Lhlt:
post_code(POST_DEAD_CODE)