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Add support for the AXUS TC320 thin client.

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This board uses nearly the same devices as the BCOM Winnet100, so most of
the new code here is from the BCOM Winnet100. They differ in the IRQ routing
table only.

BTW: The AXUS board uses standard DIMM memory and can be run at 100MHz SDRAM
clock speed (it runs reliably here since month).

Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Juergen Beisert 2007-10-26 14:42:21 +00:00 committed by Uwe Hermann
parent 5384dac57e
commit 3d02e1e0d8
7 changed files with 505 additions and 0 deletions
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135
src/mainboard/axus/tc320/Config.lb Normal file
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##
## This file is part of the LinuxBIOS project.
##
## Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if USE_FALLBACK_IMAGE
default ROM_SECTION_SIZE = FALLBACK_SIZE
default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
else
default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
default ROM_SECTION_OFFSET = 0
end
default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE
+ ROM_SECTION_OFFSET + 1)
default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
default XIP_ROM_SIZE = 64 * 1024
default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
arch i386 end
driver mainboard.o
if HAVE_PIRQ_TABLE object irq_tables.o end
makerule ./failover.E
depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
end
makerule ./failover.inc
depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc"
action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
end
makerule ./auto.E
# depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
depends "$(MAINBOARD)/auto.c ./romcc"
action "./romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
makerule ./auto.inc
# depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
depends "$(MAINBOARD)/auto.c ./romcc"
action "./romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
mainboardinit cpu/x86/16bit/entry16.inc
mainboardinit cpu/x86/32bit/entry32.inc
ldscript /cpu/x86/16bit/entry16.lds
ldscript /cpu/x86/32bit/entry32.lds
if USE_FALLBACK_IMAGE
mainboardinit cpu/x86/16bit/reset16.inc
ldscript /cpu/x86/16bit/reset16.lds
else
mainboardinit cpu/x86/32bit/reset32.inc
ldscript /cpu/x86/32bit/reset32.lds
end
mainboardinit arch/i386/lib/cpu_reset.inc
mainboardinit arch/i386/lib/id.inc
ldscript /arch/i386/lib/id.lds
if USE_FALLBACK_IMAGE
ldscript /arch/i386/lib/failover.lds
mainboardinit ./failover.inc
end
mainboardinit cpu/x86/fpu/enable_fpu.inc
mainboardinit cpu/amd/model_gx1/cpu_setup.inc
mainboardinit cpu/amd/model_gx1/gx_setup.inc
mainboardinit ./auto.inc
dir /pc80
config chip.h
chip northbridge/amd/gx1 # Northbridge
device pci_domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
chip southbridge/amd/cs5530 # Southbridge
device pci 12.0 on # ISA bridge
chip superio/nsc/pc97317 # Super I/O
device pnp 2e.0 on # PS/2 keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
end
device pnp 2e.1 on # PS/2 mouse
irq 0x70 = 12
end
device pnp 2e.2 on # RTC, advanced power control (APC)
io 0x60 = 0x70
irq 0x70 = 8
end
device pnp 2e.3 off # Floppy (N/A on this board)
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.4 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.5 off # COM2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.6 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.7 on # GPIO
io 0x60 = 0xe0
end
device pnp 2e.8 on # Power management
io 0x60 = 0xe800
end
end
end
device pci 12.1 off end # SMI
device pci 12.2 off end # IDE
device pci 12.3 on end # Audio
device pci 12.4 on end # VGA (onboard)
device pci 13.0 on end # USB
# register "ide0_enable" = "1"
# register "ide1_enable" = "1"
end
end
chip cpu/amd/model_gx1 # CPU
end
end

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src/mainboard/axus/tc320/Options.lb Normal file
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##
## This file is part of the LinuxBIOS project.
##
## Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
uses HAVE_OPTION_TABLE
uses USE_OPTION_TABLE
uses CONFIG_ROM_PAYLOAD
uses IRQ_SLOT_COUNT
uses MAINBOARD
uses MAINBOARD_VENDOR
uses MAINBOARD_PART_NUMBER
uses LINUXBIOS_EXTRA_VERSION
uses ARCH
uses FALLBACK_SIZE
uses STACK_SIZE
uses HEAP_SIZE
uses ROM_SIZE
uses ROM_SECTION_SIZE
uses ROM_IMAGE_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses CONFIG_ROM_PAYLOAD_START
uses PAYLOAD_SIZE
uses _ROMBASE
uses _RAMBASE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses CROSS_COMPILE
uses CC
uses HOSTCC
uses OBJCOPY
uses DEFAULT_CONSOLE_LOGLEVEL
uses MAXIMUM_CONSOLE_LOGLEVEL
uses CONFIG_CONSOLE_SERIAL8250
uses TTYS0_BAUD
uses TTYS0_BASE
uses TTYS0_LCS
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
uses CONFIG_UDELAY_TSC
uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
uses CONFIG_VIDEO_MB
uses CONFIG_SPLASH_GRAPHIC
uses CONFIG_GX1_VIDEO
uses CONFIG_GX1_VIDEOMODE
## Enable VGA with a splash screen (only 640x480 to run on most monitors).
## We want to support up to 1024x768@16 so we need 2MiB video memory.
## Note: Higher resolutions might need faster SDRAM speed.
default CONFIG_GX1_VIDEO = 1
default CONFIG_GX1_VIDEOMODE = 0
default CONFIG_SPLASH_GRAPHIC = 1
default CONFIG_VIDEO_MB = 2
default ROM_SIZE = 256 * 1024
default MAINBOARD_VENDOR = "AXUS"
default MAINBOARD_PART_NUMBER = "TC320"
default HAVE_FALLBACK_BOOT = 1
default HAVE_MP_TABLE = 0
default HAVE_HARD_RESET = 0
default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default HAVE_PIRQ_TABLE = 1
default IRQ_SLOT_COUNT = 2 # Soldered NIC, internal USB, no real slots
default HAVE_OPTION_TABLE = 0
default ROM_IMAGE_SIZE = 64 * 1024
default FALLBACK_SIZE = 128 * 1024
default STACK_SIZE = 8 * 1024
default HEAP_SIZE = 16 * 1024
default USE_OPTION_TABLE = 0
default _RAMBASE = 0x00004000
default CONFIG_ROM_PAYLOAD = 1
default CROSS_COMPILE = ""
default CC = "$(CROSS_COMPILE)gcc "
default HOSTCC = "gcc"
default CONFIG_CONSOLE_SERIAL8250 = 1
default TTYS0_BAUD = 115200
default TTYS0_BASE = 0x3f8
default TTYS0_LCS = 0x3 # 8n1
default DEFAULT_CONSOLE_LOGLEVEL = 6
default MAXIMUM_CONSOLE_LOGLEVEL = 6
end

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/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define ASSEMBLY 1
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "northbridge/amd/gx1/raminit.c"
#include "superio/nsc/pc97317/pc97317_early_serial.c"
#include "cpu/x86/bist.h"
#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
static void main(unsigned long bist)
{
pc97317_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
report_bist_failure(bist);
sdram_init();
/* ram_check(0, 640 * 1024); */
}

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/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations mainboard_axus_tc320_ops;
struct mainboard_axus_tc320_config {};

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src/mainboard/axus/tc320/irq_tables.c Normal file
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/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/**
* @file
* Interrupt routing description for the AXUS TC320 board.
* It was not possible to read back the PIRQ table. There was no BIOS to ask
* for it, only a bootloader for an embedded OS.
* But with the method described here:
* http://linuxbios.org/Creating_Valid_IRQ_Tables
* it was possible to detect the physical IRQ routing on this board.
*
* This is the physical routing on this board:
*
* IRQ 5530 USB Network
* controller northbridge device device
* 00.13.0 00.0e.00
* --------------------------------------------
* 11 INTA# INTA# n.c.
* 15 INTB# n.c. INTA#
* INTC# n.c. n.c.
* INTD# n.c. n.c.
*/
#include <arch/pirq_routing.h>
#define INT_A 0x01
#define INT_B 0x02
#define INT_C 0x03
#define INT_D 0x04
/*
* The USB controller should be connected to IRQ11,
* the network controller should be connected to IRQ15.
*/
#define IRQ_BITMAP_LINK0 0x0800
#define IRQ_BITMAP_LINK1 0x8000
#define IRQ_BITMAP_LINK2 0x0000
#define IRQ_BITMAP_LINK3 0x0000
/** Reserved interrupt channels for exclusive PCI usage. */
#define IRQ_DEVOTED_TO_PCI (IRQ_BITMAP_LINK0 | IRQ_BITMAP_LINK1)
/**
* Routing description.
* Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx
*/
const struct irq_routing_table intel_irq_routing_table = {
.signature = PIRQ_SIGNATURE, /* PIRQ signature */
.version = PIRQ_VERSION, /* PIRQ version */
.size = 32 + 16 * IRQ_SLOT_COUNT,/* Max. IRQ_SLOT_COUNT devices */
.rtr_bus = 0x00, /* Interrupt router bus */
.rtr_devfn = (0x12 << 3) | 0x0, /* Interrupt router device */
.exclusive_irqs = IRQ_DEVOTED_TO_PCI, /* IRQs devoted to PCI */
.rtr_vendor = 0x1078, /* Vendor */
.rtr_device = 0x0100, /* Device */
.miniport_data = 0, /* Crap (miniport) */
.checksum = 0xe3, /* Checksum */
.slots = {
/*
* Definition for "slot#1". There is no real slot,
* the USB device is embedded...
*/
[0] = {
.bus = 0x00,
.devfn = (0x13 << 3) | 0x0,
.irq = {
/* Link Bitmap */
[0] = { INT_A, IRQ_BITMAP_LINK0 },
[1] = { INT_B, IRQ_BITMAP_LINK1 },
[2] = { INT_C, IRQ_BITMAP_LINK2 },
[3] = { INT_D, IRQ_BITMAP_LINK3 },
},
.slot = 0x0,
},
/*
* Definition for "slot#2". There is no real slot,
* the network device is soldered...
*/
[1] = {
.bus = 0x00,
.devfn = (0x0e << 3) | 0x0,
.irq = {
/* Link Bitmap */
[0] = { INT_B, IRQ_BITMAP_LINK1 },
[1] = { INT_C, IRQ_BITMAP_LINK2 },
[2] = { INT_D, IRQ_BITMAP_LINK3 },
[3] = { INT_A, IRQ_BITMAP_LINK0 },
},
.slot = 0x0,
}
}
};
/**
* Copy the IRQ routing table to memory.
*
* @param[in] addr Destination address (between 0xF0000...0x100000).
* @return TODO.
*/
unsigned long write_pirq_routing_table(unsigned long addr)
{
return copy_pirq_routing_table(addr);
}

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src/mainboard/axus/tc320/mainboard.c Normal file
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/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include "chip.h"
struct chip_operations mainboard_axus_tc320_ops = {
CHIP_NAME("AXUS TC320 Mainboard")
};

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targets/axus/tc320/Config.lb Normal file
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##
## This file is part of the LinuxBIOS project.
##
## Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
## See also: http://linuxbios.org/AXUS_WINTERM_Build_Tutorial
target tc320
mainboard axus/tc320
option ROM_SIZE = 256 * 1024
## Enable VGA with a splash screen (only 640x480 to run on most monitors).
## We want to support up to 1024x768@16 so we need 2MiB video memory.
## Note: Higher resolutions might need faster SDRAM speed.
option CONFIG_GX1_VIDEO = 1
option CONFIG_GX1_VIDEOMODE = 0
option CONFIG_SPLASH_GRAPHIC = 1
option CONFIG_VIDEO_MB = 2
option DEFAULT_CONSOLE_LOGLEVEL = 6
option MAXIMUM_CONSOLE_LOGLEVEL = 6
romimage "normal"
option USE_FALLBACK_IMAGE = 0
option LINUXBIOS_EXTRA_VERSION = ".0Normal"
payload ../../../../../../../images/etherboot.elf
end
romimage "fallback"
option USE_FALLBACK_IMAGE = 1
option LINUXBIOS_EXTRA_VERSION = ".0Fallback"
payload ../../../../../../../images/etherboot.elf
end
buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"