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src: Fix typo

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Change-Id: I689c5663ef59861f79b68220abd146144f7618de
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS
2018-08-09 18:55:58 +02:00
committed by Martin Roth
parent 1895838e7a
commit 3d45000c9c
20 changed files with 27 additions and 27 deletions
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4
src/northbridge/intel/gm45/raminit.c
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@@ -869,7 +869,7 @@ static void configure_dram_control_mode(const timings_t *const timings, const di
static void rcomp_initialization(const stepping_t stepping, const int sff)
{
/* Programm RCOMP codes. */
/* Program RCOMP codes. */
if (sff)
die("SFF platform unsupported in RCOMP initialization.\n");
/* Values are for DDR3. */
@@ -1825,7 +1825,7 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
/* Some last optimizations. */
dram_optimizations(timings, dimms);
/* Mark raminit beeing finished. :-) */
/* Mark raminit being finished. :-) */
u8 tmp8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa2) & ~(1 << 7);
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, tmp8);