cpu/x86: Rename paging structure variables for clarity
The following variables have been renamed: * PDPE_table -> PDPT (Page Directory Pointer Table) * PDE_tables -> PDT (Page Directory Table) This change improves the consistency and clarity of the code as per AMD Architecture Programmer's Manual document. PML4 -> PDPT -> PDT -> 2MB Physical Page TEST=Able to build and boot google/rex64. Change-Id: Ib57d1d54c2c1f4fcce2315b508ed7643251a20c5 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
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@ -20,16 +20,16 @@
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.global PM4LE
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.align 4096
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PM4LE:
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.quad _GEN_DIR(PDPE_table)
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.quad _GEN_DIR(PDPT)
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.align 4096
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PDE_tables: /* identity map 2MiB pages */
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PDT: /* identity map 2MiB pages */
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.rept 2048
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.quad _GEN_PAGE(0x200000 * ((. - PDE_tables) >> 3))
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.quad _GEN_PAGE(0x200000 * ((. - PDT) >> 3))
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.endr
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.align 4096
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PDPE_table: /* Point to PDE */
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PDPT: /* Point to PDT */
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.rept 4
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.quad _GEN_DIR(PDE_tables + 4096 * ((. - PDPE_table) >> 3))
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.quad _GEN_DIR(PDT + 4096 * ((. - PDPT) >> 3))
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.endr
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