mb/starlabs/starbook/rpl: Disconnect SCI/SMI GPIOs

The platform uses eSPI so these are not needed.

Change-Id: I81470658263f4b601c9964ff5bed86b22d24df3b
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83624
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2024-07-23 20:50:16 +01:00 committed by Felix Held
parent 31afd9afe9
commit 40e48a2659

View File

@ -53,7 +53,7 @@ const struct pad_config gpio_table[] = {
/* A6: Not Connected */
PAD_NC(GPP_A6, NONE),
/* A7: Embedded Controller SCI */
PAD_CFG_GPI_SCI_LOW(GPP_A7, NONE, PLTRST, LEVEL),
PAD_NC(GPP_A7, NONE),
/* A8: Not Connected */
PAD_NC(GPP_A8, NONE),
/* A9: ESPI Clock */
@ -254,7 +254,7 @@ const struct pad_config gpio_table[] = {
High: Enabled */
PAD_CFG_GPO(GPP_E6, 0, DEEP),
/* E7: Embedded Controller SMI */
PAD_CFG_GPI_SMI_LOW(GPP_E7, NONE, DEEP, EDGE_SINGLE),
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
/* E9: USB OverCurrent 0 */