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device/pci_ids: Add new Intel PTL device IDs for Fast-SPI and GSPIx

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This patch adds new Fast-SPI and GSPIx PCI device IDs for Intel PTL-U
and PTL-H.

Additionally, updates the SPI driver's `pci_device_ids` list to
include these new IDs.

Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2

BUG=b:347669091
TEST=Able to build google/fatcat.

Change-Id: I5c7c0be6f219c93d4520494857d31ce1cf939f36
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83511
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2024-07-17 10:27:56 +00:00
parent 661382960f
commit 42c1f9c5fa
2 changed files with 16 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/include/device/pci_ids.h
View File

@ -4102,10 +4102,14 @@
#define PCI_DID_INTEL_LNL_GSPI1 0xa830
#define PCI_DID_INTEL_LNL_GSPI2 0xa846
#define PCI_DID_INTEL_PTL_HWSEQ_SPI 0xe423
#define PCI_DID_INTEL_PTL_SPI0 0xe427
#define PCI_DID_INTEL_PTL_SPI1 0xe430
#define PCI_DID_INTEL_PTL_SPI2 0xe446
#define PCI_DID_INTEL_PTL_H_HWSEQ_SPI 0xe423
#define PCI_DID_INTEL_PTL_H_SPI0 0xe427
#define PCI_DID_INTEL_PTL_H_SPI1 0xe430
#define PCI_DID_INTEL_PTL_H_SPI2 0xe446
#define PCI_DID_INTEL_PTL_U_H_HWSEQ_SPI 0xe323
#define PCI_DID_INTEL_PTL_U_H_SPI0 0xe327
#define PCI_DID_INTEL_PTL_U_H_SPI1 0xe330
#define PCI_DID_INTEL_PTL_U_H_SPI2 0xe346
/* Intel IGD device Ids */
#define PCI_DID_INTEL_SKL_GT1F_DT2 0x1902

12
src/soc/intel/common/block/spi/spi.c
View File

@ -123,10 +123,14 @@ struct device_operations spi_dev_ops = {
};
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_PTL_HWSEQ_SPI,
PCI_DID_INTEL_PTL_SPI0,
PCI_DID_INTEL_PTL_SPI1,
PCI_DID_INTEL_PTL_SPI2,
PCI_DID_INTEL_PTL_H_HWSEQ_SPI,
PCI_DID_INTEL_PTL_H_SPI0,
PCI_DID_INTEL_PTL_H_SPI1,
PCI_DID_INTEL_PTL_H_SPI2,
PCI_DID_INTEL_PTL_U_H_HWSEQ_SPI,
PCI_DID_INTEL_PTL_U_H_SPI0,
PCI_DID_INTEL_PTL_U_H_SPI1,
PCI_DID_INTEL_PTL_U_H_SPI2,
PCI_DID_INTEL_LNL_GSPI0,
PCI_DID_INTEL_LNL_GSPI1,
PCI_DID_INTEL_LNL_GSPI2,