drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum
Proposed in the comment of commit29030d0f3d
("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"), during sanitize_cmos(), only reset CMOS range covered by checksum and the checksum itself from the file cmos.default in CBFS, in order to prevent other runtime data in CMOS (e.g. the DRAM training data on GM45 platforms for s3 resume) being erased. Tested: cherry-pick this commit before commit44a48ce7a4
("Kconfig: Bring HEAP_SIZE to a common, large value"), which is already before my commit29030d0f3d
, Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from s3 again, indicating that DRAM training data are no longer erased. Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Co-authored-by: Jonathon Hall <jonathon.hall@puri.sm> Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/78906 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
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@@ -213,9 +213,12 @@ void sanitize_cmos(void)
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return;
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u8 control_state = cmos_disable_rtc();
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/* Max length of 256 spans bank 0 and bank 1 */
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for (i = 14; i < MIN(256, length); i++)
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/* Copy checked range and the checksum from the default */
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for (i = LB_CKS_RANGE_START; i < MIN(LB_CKS_RANGE_END + 1, length); i++)
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cmos_write_inner(cmos_default[i], i);
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/* CMOS checksum takes 2 bytes */
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cmos_write_inner(cmos_default[LB_CKS_LOC], LB_CKS_LOC);
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cmos_write_inner(cmos_default[LB_CKS_LOC + 1], LB_CKS_LOC + 1);
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cmos_restore_rtc(control_state);
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}
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}
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