oryp6: set reset config of TBT GPIO pins to RSMRST, and configure them early

This commit is contained in:
Jeremy Soller
2020-06-29 14:15:38 -06:00
parent 04c88e9113
commit 4459b6355f

View File

@@ -15,10 +15,12 @@
static const struct pad_config early_gpio_table[] = {
PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, RSMRST), // M.2_PLT_RST_CNTRL1#
PAD_CFG_TERM_GPO(GPP_C15, 1, NONE, RSMRST), // M.2_PLT_RST_CNTRL2#
PAD_CFG_TERM_GPO(GPP_F0, 1, NONE, RSMRST), // TBT_PERST_N
PAD_CFG_TERM_GPO(GPP_F22, 0, NONE, DEEP), // DGPU_RST_N
PAD_CFG_TERM_GPO(GPP_F23, 0, NONE, DEEP), // DGPU_PWR_EN
PAD_CFG_TERM_GPO(GPP_K8, 1, NONE, RSMRST), // SATA_M2_PWR_EN1
PAD_CFG_TERM_GPO(GPP_K9, 1, NONE, RSMRST), // SATA_M2_PWR_EN2
PAD_CFG_TERM_GPO(GPP_H16, 1, NONE, RSMRST), // TBT_RTD3_PWR_EN_R
PAD_CFG_TERM_GPO(GPP_K11, 1, NONE, RSMRST), // GPIO_LANRTD3
};
@@ -145,7 +147,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_E10, UP_20K, DEEP), // USB_OC1# (test point)
PAD_CFG_GPI(GPP_E11, UP_20K, DEEP), // USB_OC2# (test point)
PAD_CFG_GPI(GPP_E12, UP_20K, DEEP), // USB_OC3# (test point)
PAD_CFG_TERM_GPO(GPP_F0, 1, NONE, PLTRST), // TBT_PERST_N
PAD_CFG_TERM_GPO(GPP_F0, 1, NONE, RSMRST), // TBT_PERST_N
PAD_CFG_GPI(GPP_F1, NONE, DEEP), // M.2_SSD2_PEDET (board error)
PAD_CFG_GPI(GPP_F2, NONE, DEEP), // TBTA_HRESET
PAD_CFG_GPI(GPP_F3, UP_20K, DEEP), // NC
@@ -193,7 +195,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_H13, NONE, DEEP), // 100k pull up
PAD_CFG_GPI(GPP_H14, UP_20K, DEEP), // NC
PAD_CFG_GPI(GPP_H15, NONE, DEEP), // 20k pull up
PAD_CFG_TERM_GPO(GPP_H16, 1, NONE, DEEP), // TBT_RTD3_PWR_EN_R
PAD_CFG_TERM_GPO(GPP_H16, 1, NONE, RSMRST), // TBT_RTD3_PWR_EN_R
PAD_CFG_TERM_GPO(GPP_H17, 1, NONE, PLTRST), // TBT_FORCE_PWR_R
PAD_CFG_GPI(GPP_H18, UP_20K, DEEP), // NC
PAD_CFG_TERM_GPO(GPP_H19, 1, NONE, DEEP), // GPIO_CARD_AUX