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haswell: Relocate mainboard_romstage_entry to northbridge

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This is what sandybridge does, and if done properly allows factoring out
common settings. Said refactoring will be handled in subsequent commits.

Change-Id: I075eba1324a9e7cbd47e776b097eb940102ef4fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43108
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
This commit is contained in:
Angel Pons
2020-07-03 14:46:47 +02:00
parent c05c2b3fb2
commit 45f448f4a4
10 changed files with 42 additions and 40 deletions
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8
src/mainboard/intel/baskingridge/romstage.c
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@@ -2,7 +2,6 @@
#include <stdint.h>
#include <stddef.h>
#include <arch/romstage.h>
#include <cpu/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
@@ -45,9 +44,9 @@ void mainboard_config_rcba(void)
RCBA16(D22IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD);
}
void mainboard_romstage_entry(void)
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data = {
struct pei_data mainboard_pei_data = {
.pei_version = PEI_VERSION,
.mchbar = (uintptr_t)DEFAULT_MCHBAR,
.dmibar = (uintptr_t)DEFAULT_DMIBAR,
@@ -112,6 +111,5 @@ void mainboard_romstage_entry(void)
},
};
/* Call into the real romstage main with this board's attributes. */
romstage_common(&pei_data);
*pei_data = mainboard_pei_data; /* FIXME: Do not overwrite everything */
}