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oryp11: Fix DGPU GPIOs

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Change-Id: Ibcac2cc95fd15b6d34f90804730ae0aab461ebef
This commit is contained in:
Jeremy Soller
2023-02-22 12:32:20 -07:00
parent e319f594fc
commit 46ef7b3b19
2 changed files with 3 additions and 3 deletions
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4
src/mainboard/system76/rpl/variants/oryp11/gpio.c
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@@ -30,7 +30,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_A11, 1, DEEP),
PAD_CFG_GPO(GPP_A12, 1, DEEP),
PAD_CFG_GPO(GPP_A13, 1, PLTRST),
PAD_CFG_GPO(GPP_A14, 1, DEEP),
// GPP_A14 (DGPU_PWR_EN) configured in bootblock
_PAD_CFG_STRUCT(GPP_A15, 0x86880100, 0x0000),
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_A17, 0x80100100, 0x0000),
@@ -42,7 +42,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_A23, 1, DEEP),
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_B2, 1, DEEP),
// GPP_B2 (DGPU_RST#_PCH) configured in bootblock
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_B5, 0x44000a01, 0x0000),

2
src/mainboard/system76/rpl/variants/oryp11/gpio_early.c
View File

@@ -5,7 +5,7 @@
static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPO(GPP_A14, 0, DEEP), // DGPU_PWR_EN
PAD_CFG_GPO(GPP_B2, 1, DEEP), // DGPU_RST#_PCH
PAD_CFG_GPO(GPP_B2, 0, DEEP), // DGPU_RST#_PCH
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1), // UART0_RX
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1), // UART0_TX
};