cpu/intel/model_206ax: Allow PL1/PL2 configuration
Tested on ThinkPad T420 with the i7-3940XM. Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Signed-off-by: Anastasios Koutian <akoutian2@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83269 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
committed by
Felix Held
parent
048bffc365
commit
47a7fb3921
@@ -42,6 +42,10 @@ struct cpu_intel_model_206ax_config {
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enum cpu_acpi_level acpi_c3;
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enum cpu_acpi_level acpi_c3;
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int tcc_offset; /* TCC Activation Offset */
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int tcc_offset; /* TCC Activation Offset */
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unsigned int pl1_mw; /* Long-term power limit in milliwatts */
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unsigned int pl2_mw; /* Short-term power limit in milliwatts */
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int pp0_current_limit; /* Primary Plane Current Limit (Icc) in Amps */
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int pp0_current_limit; /* Primary Plane Current Limit (Icc) in Amps */
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int pp1_current_limit; /* Secondary Plane Current Limit (IAXG) in Amps */
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int pp1_current_limit; /* Secondary Plane Current Limit (IAXG) in Amps */
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@@ -96,6 +96,7 @@ int cpu_config_tdp_levels(void)
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*/
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*/
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void set_power_limits(u8 power_limit_1_time)
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void set_power_limits(u8 power_limit_1_time)
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{
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{
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struct cpu_intel_model_206ax_config *conf = DEV_PTR(cpu_bus)->chip_info;
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msr_t msr = rdmsr(MSR_PLATFORM_INFO);
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msr_t msr = rdmsr(MSR_PLATFORM_INFO);
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msr_t limit;
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msr_t limit;
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unsigned int power_unit;
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unsigned int power_unit;
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@@ -132,16 +133,26 @@ void set_power_limits(u8 power_limit_1_time)
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power_limit_1_val = power_limit_time_sec_to_msr[power_limit_1_time];
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power_limit_1_val = power_limit_time_sec_to_msr[power_limit_1_time];
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/* Set long term power limit to TDP */
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limit.lo = 0;
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limit.lo = 0;
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limit.lo |= tdp & PKG_POWER_LIMIT_MASK;
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if (conf->pl1_mw) {
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printk(BIOS_DEBUG, "Setting PL1 to %u milliwatts\n", conf->pl1_mw);
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limit.lo |= ((conf->pl1_mw * power_unit) / 1000) & PKG_POWER_LIMIT_MASK;
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} else {
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/* Set long term power limit to TDP */
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limit.lo |= tdp & PKG_POWER_LIMIT_MASK;
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}
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limit.lo |= PKG_POWER_LIMIT_EN;
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limit.lo |= PKG_POWER_LIMIT_EN;
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limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) <<
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limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) <<
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PKG_POWER_LIMIT_TIME_SHIFT;
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PKG_POWER_LIMIT_TIME_SHIFT;
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/* Set short term power limit to 1.25 * TDP */
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limit.hi = 0;
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limit.hi = 0;
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limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK;
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if (conf->pl2_mw) {
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printk(BIOS_DEBUG, "Setting PL2 to %u milliwatts\n", conf->pl2_mw);
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limit.hi |= ((conf->pl2_mw * power_unit) / 1000) & PKG_POWER_LIMIT_MASK;
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} else {
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/* Set short term power limit to 1.25 * TDP */
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limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK;
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}
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limit.hi |= PKG_POWER_LIMIT_EN;
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limit.hi |= PKG_POWER_LIMIT_EN;
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/* Power limit 2 time is only programmable on SNB EP/EX */
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/* Power limit 2 time is only programmable on SNB EP/EX */
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