mb/google/brya/var/xol: Update Kconfig and devicetree
Upload the initial devicetree and update Kconfig for xol following proto schematics. BUG=b:319506033 BRANCH=firmware-brya-14505.B TEST=FW_NAME=xol emerge-brya coreboot Change-Id: I411932eb4872d77993394a290e8afdd1a0038faf Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80324 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Seunghwan Kim
Jakub Czapiga
parent
10942bfb21
commit
49d9b18f4d
@ -475,6 +475,8 @@ config BOARD_GOOGLE_XIVU
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config BOARD_GOOGLE_XOL
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select BOARD_GOOGLE_BASEBOARD_BRYA
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select DRIVERS_I2C_DA7219
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select DRIVERS_INTEL_ISH
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select SOC_INTEL_RAPTORLAKE
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config BOARD_GOOGLE_YAVIKS
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@ -583,6 +585,7 @@ config DRIVER_TPM_I2C_BUS
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default 0x1 if BOARD_GOOGLE_DOCHI
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default 0x0 if BOARD_GOOGLE_QUANDISO
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default 0x0 if BOARD_GOOGLE_ANRAGGAR
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default 0x1 if BOARD_GOOGLE_XOL
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config DRIVER_TPM_I2C_ADDR
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hex
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@ -1,6 +1,430 @@
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chip soc/intel/alderlake
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register "domain_vr_config[VR_DOMAIN_IA]" = "{
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.enable_fast_vmode = 1,
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}"
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device domain 0 on
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end
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register "sagv" = "SaGv_Enabled"
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register "pch_slp_a_min_assertion_width" = "SLP_A_ASSERTION_DEFAULT"
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# As per Intel Advisory doc#723158, the change is required to prevent possible
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# display flickering issue.
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register "disable_dynamic_tccold_handshake" = "true"
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register "platform_pmax" = "145"
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register "usb2_ports[0]" = "{
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.enable = 1,
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.ocpin = OC0,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_PRE_EMP_ON,
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.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
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.type_c = 1,
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}" # USB2_C0
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register "usb2_ports[1]" = "USB2_PORT_EMPTY"
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register "usb2_ports[2]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_PRE_EMP_ON,
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.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
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.type_c = 1,
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}" # USB2_C2
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register "usb2_ports[3]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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}" # uSD
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register "usb2_ports[4]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_11P25MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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}" # USB2_A1
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register "usb2_ports[5]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.tx_bias = USB2_BIAS_0MV,
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.tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
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.pre_emp_bit = USB2_FULL_BIT_PRE_EMP,
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}" # Camera
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register "usb2_ports[6]" = "USB2_PORT_EMPTY"
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register "usb2_ports[7]" = "USB2_PORT_EMPTY"
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register "usb2_ports[8]" = "USB2_PORT_EMPTY"
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register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
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register "usb3_ports[0]" = "USB3_PORT_EMPTY"
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register "usb3_ports[1]" = "USB3_PORT_EMPTY"
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3_A1
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register "usb3_ports[3]" = "USB3_PORT_EMPTY"
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)"
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register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
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register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "tcss_ports[3]" = "TCSS_PORT_EMPTY"
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register "tcss_aux_ori" = "0x11"
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register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
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register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_A19, .pad_auxn_dc = GPP_A20}"
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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register "serial_io_gspi_mode" = "{
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[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
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[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
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}"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| I2C0 | Audio |
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#| I2C1 | cr50 TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| I2C5 | Trackpad |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.i2c[0]= {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 175,
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.fall_time_ns = 8,
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},
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.i2c[1] = {
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.early_init = 1,
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 600,
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.fall_time_ns = 400,
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.data_hold_time_ns = 50,
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 650,
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.fall_time_ns = 400,
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.data_hold_time_ns = 50,
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},
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}"
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device domain 0 on
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device ref igpu on
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chip drivers/gfx/generic
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register "device_count" = "6"
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# DDIA for eDP
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register "device[0].name" = ""LCD""
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# DDIB for HDMI
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register "device[1].name" = ""DD01""
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# TCP0 (DP-1) for port C0
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register "device[2].name" = ""DD02""
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register "device[2].use_pld" = "true"
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register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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# TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
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register "device[3].name" = ""DD03""
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# TCP2 (DP-3) for port C2
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register "device[4].name" = ""DD04""
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register "device[4].use_pld" = "true"
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register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
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# TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
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register "device[5].name" = ""DD05""
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device generic 0 on end
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end
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end # Integrated Graphics Device
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DRAM_SOC""
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register "options.tsr[1].desc" = ""Ambient""
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register "options.tsr[2].desc" = ""Charger""
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# TODO: below values are initial reference values only
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## Active Policy
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register "policies.active" = "{
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[0] = {
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.target = DPTF_TEMP_SENSOR_0,
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.thresholds = {
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TEMP_PCT(75, 97),
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TEMP_PCT(70, 93),
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TEMP_PCT(60, 86),
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TEMP_PCT(52, 80),
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TEMP_PCT(47, 64),
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TEMP_PCT(43, 52),
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TEMP_PCT(40, 40),
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}
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},
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[1] = {
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.target = DPTF_TEMP_SENSOR_1,
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.thresholds = {
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TEMP_PCT(75, 97),
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TEMP_PCT(70, 93),
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TEMP_PCT(60, 86),
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TEMP_PCT(52, 80),
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TEMP_PCT(47, 64),
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TEMP_PCT(43, 52),
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TEMP_PCT(40, 40),
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}
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},
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[2] = {
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.target = DPTF_TEMP_SENSOR_2,
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.thresholds = {
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TEMP_PCT(82, 97),
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TEMP_PCT(78, 93),
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TEMP_PCT(72, 86),
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TEMP_PCT(60, 80),
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}
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}
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}"
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
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[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
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}"
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 15000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 55000,
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.max_power = 55000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{
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[0] = { 90, 6700, 220, 2200, },
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[1] = { 80, 5800, 180, 1800, },
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[2] = { 70, 5000, 145, 1450, },
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[3] = { 60, 4900, 115, 1150, },
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[4] = { 50, 3838, 90, 900, },
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[5] = { 40, 2904, 55, 550, },
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[6] = { 30, 2337, 30, 300, },
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[7] = { 20, 1608, 15, 150, },
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[8] = { 10, 800, 10, 100, },
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[9] = { 0, 0, 0, 50, }
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}"
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## Fan options
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 alias dptf_policy on end
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end
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end
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device ref pcie4_0 on
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# Enable CPU PCIE RP 1 using CLK 1
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register "cpu_pcie_rp[CPU_RP(1)]" = "{
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.clk_req = 1,
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.clk_src = 1,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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}"
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end # SSD
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device ref tbt_pcie_rp0 off end
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device ref tbt_pcie_rp1 off end
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device ref tbt_pcie_rp2 off end
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device ref tbt_pcie_rp3 off end
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device ref tcss_dma0 off end
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device ref tcss_dma1 off end
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device ref ish on
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chip drivers/intel/ish
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register "add_acpi_dma_property" = "true"
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device generic 0 on end
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end
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end
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device ref ufs on end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "GPE0_PME_B0"
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register "enable_cnvi_ddr_rfim" = "true"
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device generic 0 on end
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end
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end
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device ref i2c0 on
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chip drivers/i2c/da7219
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
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register "btn_cfg" = "50"
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register "mic_det_thr" = "200"
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register "jack_ins_deb" = "20"
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register "jack_det_rate" = ""32ms_64ms""
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register "jack_rem_deb" = "1"
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register "a_d_btn_thr" = "0xa"
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register "d_b_btn_thr" = "0x16"
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register "b_c_btn_thr" = "0x21"
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register "c_mic_btn_thr" = "0x3e"
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register "btn_avg" = "4"
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register "adc_1bit_rpt" = "1"
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register "micbias_lvl" = "2600"
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register "mic_amp_in_sel" = ""diff""
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device i2c 1a on end
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end
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end #I2C0
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device ref i2c1 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
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device i2c 50 on end
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end
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end #I2C1
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device ref i2c5 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ZNT0000""
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register "generic.desc" = ""Zinitix Touchpad""
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register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
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register "generic.wake" = "GPE0_DW2_14"
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register "generic.detect" = "1"
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register "hid_desc_reg_offset" = "0xE"
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device i2c 40 on end
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end
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end #I2C5
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device ref hda on
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chip drivers/generic/max98357a
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register "hid" = ""MX98360A""
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register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
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register "sdmode_delay" = "5"
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device generic 0 on end
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end
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chip drivers/sof
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register "spkr_tplg" = "max98360a"
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register "jack_tplg" = "da7219"
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register "mic_tplg" = "_2ch_pdm0"
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device generic 0 on end
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end
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end
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device ref pch_espi on
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chip ec/google/chromeec
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use conn0 as mux_conn[0]
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use conn1 as mux_conn[1]
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device pnp 0c09.0 on end
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end
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end
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device ref pmc hidden
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chip drivers/intel/pmc_mux
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device generic 0 on
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chip drivers/intel/pmc_mux/conn
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use usb2_port1 as usb2_port
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use tcss_usb3_port1 as usb3_port
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device generic 0 alias conn0 on end
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end
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chip drivers/intel/pmc_mux/conn
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use usb2_port3 as usb2_port
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use tcss_usb3_port3 as usb3_port
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device generic 1 alias conn1 on end
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end
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end
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end
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end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C2 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
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device ref tcss_usb3_port3 on end
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end
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end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port1 on end
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end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-C Port C2 (MLB)""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
|
||||
device ref usb2_port3 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 MMC""
|
||||
register "type" = "UPC_TYPE_EXPRESSCARD"
|
||||
device ref usb2_port4 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-A Port A1 (DB)""
|
||||
register "type" = "UPC_TYPE_A"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
|
||||
device ref usb2_port5 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Camera""
|
||||
register "type" = "UPC_TYPE_INTERNAL"
|
||||
device ref usb2_port6 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Bluetooth""
|
||||
register "type" = "UPC_TYPE_INTERNAL"
|
||||
register "reset_gpio" =
|
||||
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
|
||||
device ref usb2_port10 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-A Port A1 (DB)""
|
||||
register "type" = "UPC_TYPE_USB3_A"
|
||||
register "use_custom_pld" = "true"
|
||||
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
|
||||
device ref usb3_port3 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user