Add DTBT _DSD
Change-Id: I8a478d0e714dcde1e7fa30db0b617fb056c210aa
This commit is contained in:
@@ -1,10 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "chip.h"
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#include <acpi/acpigen.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pciexp.h>
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#include <device/pci_ids.h>
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#define PCIE2TBT 0x54C
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@@ -50,6 +52,61 @@ static void dtbt_cmd(struct device *dev, u32 command) {
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}
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}
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static void dtbt_fill_ssdt(const struct device *dev) {
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printk(BIOS_INFO, "DTBT fill SSDT\n");
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const char *dev_scope = acpi_device_path(dev->bus->dev);
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if (!dev_scope) {
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return;
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}
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{ /* Scope */
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printk(BIOS_INFO, " Scope %s\n", dev_scope);
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acpigen_write_scope(dev_scope);
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struct acpi_dp *dsd = acpi_dp_new_table("_DSD");
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/* Indicate that device supports hotplug in D3. */
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acpi_device_add_hotplug_support_in_d3(dsd);
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/* Indicate that port is external. */
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acpi_device_add_external_facing_port(dsd);
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acpi_dp_write(dsd);
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{ /* Device */
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const char *dev_name = acpi_device_name(dev);
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printk(BIOS_INFO, " Device %s\n", dev_name);
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acpigen_write_device(dev_name);
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acpigen_write_name_integer("_ADR", 0);
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acpigen_write_device_end();
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}
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acpigen_write_scope_end();
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}
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}
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static const char *dtbt_acpi_name(const struct device *dev) {
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return "DTBT";
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}
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static struct pci_operations dtbt_device_ops_pci = {
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.set_subsystem = 0,
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};
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static struct device_operations dtbt_device_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_bus_enable_resources,
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.acpi_fill_ssdt = dtbt_fill_ssdt,
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.acpi_name = dtbt_acpi_name,
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.scan_bus = pciexp_scan_bridge,
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.reset_bus = pci_bus_reset,
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.ops_pci = &dtbt_device_ops_pci,
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};
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static void dtbt_enable(struct device *dev)
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{
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if (!is_dev_enabled(dev) || dev->path.type != DEVICE_PATH_PCI)
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@@ -60,6 +117,8 @@ static void dtbt_enable(struct device *dev)
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//TODO: check device ID
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dev->ops = &dtbt_device_ops;
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printk(BIOS_INFO, "DTBT controller found at %s\n", dev_path(dev));
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printk(BIOS_INFO, "DTBT get security level\n");
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